KR102120120B1 - Solar cell and manufacturing method thereof - Google Patents

Abstract

The solar cell includes a substrate having a first conductivity type; An emitter portion located on the front surface of the substrate and having a second conductivity type opposite to the first conductivity type; A front electrode electrically connected to the emitter portion; A first passivation layer located on the front side of the emitter portion of the region where the front electrode is not located; A plurality of rear electric field portions locally located on the rear side of the substrate; A second passivation layer located on the back side of the substrate in a region where the rear electric field is not located; And a rear electrode having a first rear electrode portion connected to the rear electric field portion and a second rear electrode portion connected to the second protective layer, wherein the width of the rear electric field portion is the same as the width of the first rear electrode portion. do.

Description

SOLAR CELL AND MANUFACTURING METHOD THEREOF}

The present invention relates to a solar cell and its manufacturing method.

Photovoltaic power generation, which converts light energy into electric energy using a photoelectric conversion effect, is widely used as a means of obtaining pollution-free energy. And with the improvement of the photoelectric conversion efficiency of the solar cell, a photovoltaic power generation system using a plurality of solar cell modules is also installed in a private house.

A typical solar cell includes a substrate, an emitter portion forming a pn junction with the substrate, and an electric field portion containing impurities of the same conductivity type as the impurities contained in the substrate at a higher concentration than the substrate, and the electric field portion is partially formed on the rear surface of the substrate. To improve the electrical properties of the solar cell.

Technical problem to be achieved by the present invention is to provide a solar cell with improved efficiency and a method for manufacturing the same.

According to an embodiment of the present invention, a solar cell includes a substrate having a first conductivity type; An emitter portion located on the front surface of the substrate and having a second conductivity type opposite to the first conductivity type; A front electrode electrically connected to the emitter portion; A first passivation layer located on the front side of the emitter portion of the region where the front electrode is not located; A plurality of rear electric field portions locally located on the rear side of the substrate; A second passivation layer located on the back side of the substrate in a region where the rear electric field is not located; And a rear electrode having a first rear electrode portion connected to the rear electric field portion and a second rear electrode portion connected to the second protective layer, wherein a width of the rear electric field portion is formed equal to the width of the first rear electrode portion. .

The thickness of the first rear electrode portion is preferably formed thicker than the thickness of the second rear electrode portion.

Preferably, the first rear electrode portion is formed to a thickness of 20 µm to 30 µm, and the second rear electrode portion is formed to a thickness of 100 nm to 1 µm.

The plurality of rear electric field units may be formed at positions corresponding to the front electrode.

The width of the rear electric field may be formed to be the same as the width of the front electrode.

The back electrode may be formed on the entire back surface of the substrate.

The first rear electrode portion and the second rear electrode portion are formed of the same material, and may be formed of a different material from the rear electric field portion.

Here, the back electrode is preferably formed of silver (Ag) or copper (Cu).

A solar cell having such a configuration includes forming an emitter portion on a front surface of a semiconductor substrate; Forming a plurality of rear electric fields on the rear surface of the semiconductor substrate; Forming a protective film on the back surface of the semiconductor substrate; Forming a plurality of holes exposing a plurality of rear electric fields by irradiating a protective film with a laser; And a rear electrode filled in the hole and including a first rear electrode portion contacting a rear electric field portion and a second rear electrode portion contacting a protective film.

Here, it is preferable that the width of the rear electric field portion and the width of the first rear electrode portion are formed to be the same as each other.

In addition, in the step of forming the back electrode, a PVD method may be used.

According to these features, in the solar cell having a local back surface field (LBSF: Local Back Surface Field), the alignment process of the back electrode and the back surface field (BSF) is not required. It can reduce the margin region of the rear electric field required for alignment.

Therefore, since the formation area of the rear electric field portion can be reduced, the open voltage Voc increases, and the efficiency of the solar cell is improved.

In addition, by using a metal having a large reflecting effect, for example, silver (Ag) or copper (Cu) as a back electrode material, light incident on the incident surface of the semiconductor substrate is reflected from the back electrode and then re-enters the semiconductor substrate. Since the amount of light used for conversion can be increased, the short-circuit current density can be increased.

Therefore, the efficiency of the solar cell can be further improved.

1 is a partial perspective view of a solar cell according to an embodiment of the present invention.
FIG. 2 is a schematic cross-sectional view of the solar cell illustrated in FIG. 1 taken along line II-II.
3 to 9 are process charts sequentially showing a method of manufacturing a solar cell according to an embodiment of the present invention.

The present invention can be applied to various changes and can have various embodiments, and specific embodiments will be illustrated in the drawings and described in detail in the detailed description. This is not intended to limit the present invention to specific embodiments, and can be understood to include all modifications, equivalents, and substitutes included in the spirit and scope of the present invention.

In describing the present invention, terms such as first and second may be used to describe various components, but the components may not be limited by the terms. The terms may be used only for the purpose of distinguishing one component from other components.

For example, the first component may be referred to as a second component without departing from the scope of the present invention, and similarly, the second component may be referred to as a first component.

The term “and/or” can include any combination of a plurality of related described items or any of a plurality of related described items.

When a component is said to be "connected" or "coupled" to another component, it may be directly connected to or coupled to the other component, but other components may exist in the middle. Can be understood.

On the other hand, when a component is said to be "directly connected" or "directly coupled" to another component, it can be understood that no other component exists in the middle.

The terms used in this application are only used to describe specific embodiments, and are not intended to limit the present invention. Singular expressions may include plural expressions unless the context clearly indicates otherwise.

In this application, terms such as “include” or “have” are intended to designate the presence of features, numbers, steps, actions, components, parts, or combinations thereof described in the specification, one or more other features. It may be understood that the existence or addition possibilities of fields or numbers, steps, operations, components, parts or combinations thereof are not excluded in advance.

In the drawings, thicknesses are enlarged to clearly represent various layers and regions. When a portion of a layer, film, region, plate, or the like is said to be “above” another portion, this includes not only the case “directly above” other portions, but also other portions in between. Conversely, when one part is "just above" another part, it means that there is no other part in the middle.

Unless defined otherwise, all terms used herein, including technical or scientific terms, may have the same meaning as commonly understood by a person skilled in the art to which the present invention pertains.

Terms, such as those defined in a commonly used dictionary, may be interpreted as having meanings that are consistent with meanings in the context of related technologies, and are interpreted as ideal or excessively formal meanings unless explicitly defined in the present application. It may not be.

In addition, the following embodiments are provided to more fully explain to those having average knowledge in the art, and the shapes and sizes of elements in the drawings may be exaggerated for more clear explanation.

Then, a solar cell and a method of manufacturing the same according to embodiments of the present invention will be described with reference to the accompanying drawings.

1 and 2, the solar cell 1 includes a substrate 110, an emitter portion 120, an emitter portion 120 positioned on one side of the substrate 110, for example, a front surface. Above the first protective film 130, the first protective film 130, the anti-reflection film 140, the first protective film 130 and the anti-reflection film 140 on the emitter portion 120 of the area is not located Located front electrode 150, a back surface field (BSF) portion 160 located on a back surface of the substrate 110, and a second protective film located on the back side of the substrate 110 (170), the second protective film 170, the rear electrode of the rear electric field 160 in the region where it is not located and the rear electrode (back electrode) 180 located on the entire rear surface of the second protective film 170.

The substrate 110 is made of a silicon wafer of a first conductivity type, for example, an n-type conductivity type. In this case, the silicon may be monocrystalline silicon, polycrystalline silicon substrate, or amorphous silicon.

Since the substrate 110 has an n-type conductivity type, the substrate 110 contains impurities of a pentavalent element such as phosphorus (P), arsenic (As), and antimony (Sb).

The substrate 110 has a textured surface with a textured surface. More specifically, the substrate 110 has a front surface on which the emitter portion 120 is located and a rear surface on the opposite side of the front surface is formed as a texturing surface, respectively.

The emitter portion 120 is located on the texturing surface of the substrate 110 and is an impurity portion having a second conductivity type, for example, a p-type conductivity type, opposite to the conductivity type of the substrate 110, and the substrate 110 And pn junctions. At this time, since the emitter portion 121 is formed by diffusion of impurities into the substrate 110, the bonding surface between the substrate 110 and the emitter portion 121 is affected by the shape of the textured surface of the substrate 110, not the flat surface. It has an uneven surface.

Due to the built-in potential difference due to the pn junction, electron-hole pairs, which are charges generated by the light incident on the substrate 110, are separated into electrons and holes, and electrons move toward the n-type and holes Moves toward p-type.

Therefore, when the substrate 110 is n-type and the emitter portion 120 is p-type, the separated electrons move toward the substrate 110 and the separated holes move toward the emitter portion 120.

When the emitter portion 120 has a p-type conductivity type, the emitter portion 120 is doped with impurities of a trivalent element such as boron (B), gallium (Ga), indium (In), etc. to the substrate 110 Can form.

The first passivation layer 130 is formed on the emitter portion 120 on the front surface of the substrate 110, and has a negative fixed charge, for example, aluminum oxide (AlO _x ) or yttrium It may be formed of oxide (Y ₂ O ₃ ).

The material is excellent in chemical passivation characteristics according to low interface trap density and field effect passivation characteristics due to negative fixed charge. In addition, it has excellent stability, moisture permeability, and wear resistance properties.

Therefore, it is possible to improve the efficiency of the solar cell 1 by reducing the surface recombination rate, and to improve long-term reliability.

The anti-reflection layer 140 is positioned on the first passivation layer 130 and is made of a material having a positive (+) fixed charge, for example, silicon nitride (SiN _x ), silicon oxide (SiOx), or silicon oxide nitride (SiOxN _x ). It can be done.

The anti-reflection layer 140 increases the efficiency of the solar cell 1 by reducing the reflectivity of light incident through the front surface of the substrate 110 and increasing the selectivity of a specific wavelength region.

The front electrode 150 is located on the emitter portion 120 in front of the substrate 110 and is electrically and physically connected to the emitter portion 120. In this case, the front electrode 150 may be formed in a grid pattern including a plurality of finger electrodes extending in one direction and a plurality of busbar electrodes extending in a direction intersecting the plurality of finger electrodes.

The front electrode 150 collects electric charges, for example holes, moved toward the emitter unit 120.

The front electrode 150 is at least selected from the group consisting of nickel (Ni), copper (Cu), tin (Sn), zinc (Zn), indium (In), titanium (Ti), gold (Au), and combinations thereof. It is formed of one conductive material. As an example, the front electrode 150 may be formed of AgAl including aluminum (Al) and silver (Ag).

The rear electric field 160 is electrically and physically connected to the back electrode 180, is located locally on the back of the substrate 110 in a position corresponding to the front electrode 150, and is the same conductivity type as the substrate 110 The dopant is formed in a region doped with a higher concentration than the substrate 110, for example, an n+ region.

Here, the fact that the rear electric field 160 is locally located means that a certain distance is maintained between the rear electric fields 160, and each rear electric field 160 is dot or line. It can be formed in a pattern. At this time, the gap of the rear electric field 160 may be formed narrowly, and when it is formed narrowly, a contact area with the rear electrode 180 increases, so that a fill factor (FF) may increase.

The rear electric field 160 may be formed at a position corresponding to the front electrode 150 as described above, but the formation position of the rear electric field 160 is not limited. In addition, the width W1 of the rear electric field 160 may be the same as or different from the width W2 of the front electrode 150.

The rear electric field 160 forms a potential barrier due to a difference in the concentration of impurities with the substrate 110, thereby preventing hole movement toward the rear surface of the substrate 110. Accordingly, electrons and holes are recombined and disappeared near the rear surface of the substrate 110.

The second passivation layer 170 is positioned on the rear surface of the substrate 110 in a region where the rear electrode 180 and the rear electric field 160 are not located.

In this embodiment, the second passivation layer 170 may be formed of the same material as the first passivation layer 130, and may have the same thickness as the first passivation layer 130.

Alternatively, the second passivation layer 170 may be formed of a different material from the first passivation layer 130 and may have a different thickness from the first passivation layer 130.

In addition, at least one of the first passivation layer 130 and the second passivation layer 170 may be formed of a plurality of layers.

The back electrode 180 penetrates through the second passivation layer 170 and the second back electrode part formed on the back surface of the first back electrode part 182 and the second passivation film 170 directly contacting the back electric field 160. 184, the first rear electrode portion 182 and the second rear electrode portion 184 are formed of the same material, but have different thicknesses. The rear electrode 180 collects electric charges moving toward the substrate 110, for example, electrons, and outputs them to an external device.

In this embodiment, the thickness T1 of the first rear electrode portion 182 is greater than the thickness T2 of the second rear electrode portion 184. For example, the first rear electrode portion 182 may have a thickness T1 of about 20 μm to 30 μm from the rear surface of the rear electric field unit 160, and the second rear electrode portion 184 may have a second protective film. It has a thickness (T2) of about 100nm to 1㎛ from the rear surface of (170).

As such, since the thickness T1 of the first rear electrode portion 182 is formed to be larger than the thickness T2 of the second rear electrode portion 184, the rear electric field 160 from the rear surface of the rear electrode 180 The shortest distance to the lower surface (equal to T1) is longer than the shortest distance to the lower surface of the second passivation layer 170 (the same as T2).

The back electrode 180 is aluminum (Al), nickel (Ni), copper (Cu), silver (Ag), tin (Sn), zinc (Zn), indium (In), titanium (Ti), gold (Au) And it may be made of at least one conductive material selected from the group consisting of a combination thereof. In this embodiment, the back electrode 180 is formed of silver (Ag) or copper (Cu) having excellent reflection characteristics.

The operation of the solar cell 1 according to the present embodiment having such a structure is as follows.

When light irradiated onto the solar cell 1 is incident into the interior of the substrate 110 through the emitter unit 120, electron-hole pairs are generated by light energy incident on the substrate 110.

At this time, since the surface of the substrate 110 is formed as a texturing surface, light reflectivity at the front and rear surfaces of the substrate 110 decreases, and incident and reflection operations are performed at the texturing surface to trap light inside the solar cell 1. . Therefore, the light absorption rate is increased, and the efficiency of the solar cell 1 is improved.

In addition, the reflection loss of light incident on the substrate 110 by the first passivation layer 130 and the anti-reflection layer 140 positioned on the front surface of the substrate 110 is reduced, so that the amount of light incident on the substrate 110 is further increased. Increases.

These electron-hole pairs are separated from each other by a pn junction of the substrate 110 and the emitter portion 120, and the electrons move toward the substrate 110 having an n-type conductivity type, and the hole is a p-type conductivity type. Move toward the emitter portion 120 having.

As described above, electrons moved toward the substrate 110 move to the rear electrode 180 through the rear electric field 160, and holes moved toward the emitter portion 120 move to the front electrode 150. Therefore, when the front electrode 150 of any one solar cell 1 and the rear electrode 180 of the adjacent solar cell 1 are connected by a conductor or the like, an electric current flows, and this is used as power from the outside. .

Hereinafter, a method of manufacturing the solar cell 1 shown in FIGS. 1 and 2 will be described with reference to FIGS. 3 to 9.

Referring to FIG. 3, first, an n-type semiconductor substrate 110 is prepared, and both front and back surfaces are textured.

In general, the substrate 110 made of a silicon wafer is manufactured by slicing a silicon block or an ingot with a blade or a multi wire saw.

When the silicon wafer is prepared, an impurity of a pentavalent element, such as phosphorus (P), is doped into the silicon wafer to manufacture an n-type semiconductor substrate 110.

On the other hand, when slicing a silicon block or ingot, a mechanical damage layer is formed on the silicon wafer.

Therefore, in order to prevent the deterioration of the characteristics of the solar cell 1 due to the mechanical damage layer, a wet etching process is performed to remove the mechanical damage layer. At this time, in the wet etching process, an alkali or acid etchant is used.

After removing the mechanical damage layer, both surfaces of the substrate 110 are formed as texturing surfaces using a wet etching process or a dry etching process using plasma.

Next, as shown in FIG. 4, the p-type emitter portion 120 is formed on the n-type semiconductor substrate 110. The emitter unit 120 may be formed on the substrate 110 by a lamination process such as, for example, chemical vapor deposition (CVD) or physical vapor deposition (PVD), but is not limited thereto. It may be formed by implanting or diffusing an impurity of a trivalent element on one surface of the substrate 110, for example, a textured surface using ion implantation or heat diffusion. At this time, the emitter portion 120 has an uneven surface under the influence of the shape of the textured surface of the substrate 110.

Next, as shown in FIG. 5, after forming an impurity layer 1100 containing impurities of a pentavalent element on the other surface of the substrate 110, for example, a back surface, a partial region of the impurity layer 1100 In particular, a plurality of rear electric field parts 160 are formed by locally irradiating a laser to an area where the first back electrode part 182 of the back electrode 180 is to be located. As described above, the impurity layer 1100 in the corresponding region is heated by the irradiated laser, and n-type impurity located in the heated portion is injected into the substrate 110 to form the rear electric field 160. When forming the 160, an ion implantation method may be used instead of using a laser.

In the solar cell 1 of this embodiment, the rear electrode 180 is formed on the entire rear surface of the substrate 110. Accordingly, when forming the rear electrode 180, it is not necessary to perform an alignment process between the first rear electrode portion 182 and the rear electric field 160, thereby minimizing the width W1 of the rear electric field 160. can do. Accordingly, since the width W1 of the rear electric field unit 160 is minimized, the open voltage Voc increases.

Next, as shown in FIG. 6, the impurity layer 1100 is removed, and the first passivation layer 130 and the second passivation layer 170 are formed on the front and rear surfaces of the substrate 110, respectively. At this time, the first passivation layer 130 is formed on the front surface of the emitter unit 120, and the second passivation layer 170 is formed on the back surface of the substrate 110.

The first passivation layer 130 and the second passivation layer 170 may be formed by a method such as plasma deposition (PECVD) or sputtering.

Next, as shown in FIG. 7, an anti-reflection layer 140 is formed by depositing silicon nitride on the first passivation layer 130. At this time, the anti-reflection film 140 is formed on the entire front surface of the first protective film 130.

The anti-reflection layer 140 may be formed by a method such as plasma deposition (PECVD) or sputtering.

Next, as shown in FIG. 8, the front electrode 150 is formed on the front surface of the substrate 110. Specifically, when the paste for forming the front electrode is applied on the anti-reflection layer 140, and the firing process is performed, the front electrode (through the anti-reflection layer 140 and the first passivation layer 130 and contacting the emitter unit 120) 150) is formed. In this case, the front electrode 150 may be formed at a position facing the rear electric field 160.

Next, as illustrated in FIG. 9, a hole 1800 is formed by irradiating a laser on the rear surface of the second passivation layer 170. The hole 1800 is positioned corresponding to the rear electric field 160, and the width of the hole 1800 is formed to be the same as the width W1 of the rear electric field 160.

Subsequently, the rear electric field part is filled in the inside of the second rear electrode part 184 and the hole 1800 in physical contact with the rear surface of the second passivation layer 170 using a physical vapor deposition method (PVD) such as sputtering and electron beam deposition. The back electrode 180 including the first back electrode portion 182 in physical contact with the 160 is formed. At this time, the first rear electrode portion 182 and the second rear electrode portion 184 are formed of the same material.

In this embodiment, the thickness T1 of the first rear electrode portion 182 is greater than the thickness T2 of the second rear electrode portion 184. For example, the first rear electrode portion 182 may penetrate the second protective layer 170 and have a thickness T1 of about 20 μm to 30 μm from the rear surface of the rear electric field 160, and the second rear surface The electrode portion 184 has a thickness T2 of about 100 nm to 1 μm from the back surface of the second passivation layer 170.

As such, since the thickness T1 of the first rear electrode portion 182 is formed to be larger than the thickness T2 of the second rear electrode portion 184, the rear electric field 160 from the rear surface of the rear electrode 180 The shortest distance to the lower surface (equal to T1) is longer than the shortest distance to the lower surface of the second passivation layer 170 (the same as T2).

As described above, after forming the rear electric field 160 first, the second protective layer 170 is formed, and after forming the hole 1800 exposing the rear electric field 160 to the second protective layer 170, the rear electrode is formed. Since the 180 is formed, the material forming the rear electrode 180 does not need to include impurities contained in the rear electric field 160. The back electrode 180 is aluminum (Al), nickel (Ni), copper (Cu), silver (Ag), tin (Sn), zinc (Zn), indium (In), titanium (Ti), gold (Au) And it may be made of at least one conductive material selected from the group consisting of a combination thereof. In this embodiment, the back electrode 180 is formed of silver (Ag) or copper (Cu) having excellent reflection characteristics.

Accordingly, the back electrode 180 may be formed of a material having excellent reflective properties and conductivity, such as silver (Ag) or copper (Cu).

In addition, since the width of the hole 1800 in which the first rear electrode portion 182 is formed is the same as the width W1 of the rear electric field portion 160, the width of the first rear electrode portion 182 is the rear electric field portion 160 ) Is formed equal to the width W1. Therefore, it is not necessary to form the width of the rear electric field 160 larger than the width of the first rear electrode portion 182 in order to align the rear electric field 160 and the rear electrode 180.

In addition, since the back electrode 180 is formed using a physical vapor deposition method (PVD), a low temperature process is possible, thereby reducing thermal damage to the semiconductor substrate.

Although the embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concept of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

110: substrate 120: emitter portion
130: first protective film 140: anti-reflection film
150: front electrode 160: rear electric field
170: second protective film 180: back electrode
182: first rear electrode portion 184: second rear electrode portion

Claims (13)

delete delete delete delete delete delete delete delete delete delete Forming an emitter portion on the front surface of the semiconductor substrate;
Forming an impurity layer containing impurities on the rear surface of the semiconductor substrate and locally irradiating a laser to diffuse the impurities on the rear surface of the semiconductor substrate to locally form a plurality of rear electric field parts;
Removing the impurity layer, and forming a protective film on the rear surface of the semiconductor substrate and the rear surface of the plurality of rear electric field parts;
Forming a plurality of holes exposing the plurality of rear electric fields by irradiating the protective film with a laser; And
It is located between the plurality of first rear electrode parts and the plurality of rear electric fields that are filled in the plurality of holes and contact the plurality of rear electric fields and do not contain the impurities contained in the plurality of rear electric fields. And forming a rear electrode including a second rear electrode portion that does not contain conductive impurities contained in the plurality of rear electric field portions in contact with the protective layer on the entire rear surface of the substrate by physical vapor deposition (PVD method). ,
Each of the plurality of holes is formed to have the same width as each of the plurality of rear electric field parts,
The step of forming the back electrode is a solar cell manufacturing method performed by a low temperature process. delete delete

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