KR102108071B1 - Power transforming apparatus and air conditioner including the same - Google Patents

Abstract

The present invention relates to a power conversion device, and more particularly, to an electric power conversion device and an air conditioner including the same, which can prevent false senses during operation of the overcurrent protection operation. The present invention, an inverter including a plurality of switching elements for generating a three-phase alternating current for driving a motor; A current detection unit for sensing the current of the inverter; A gate driver for driving a plurality of switching elements of the inverter and generating an error signal at an output terminal when a signal according to an overcurrent is detected from the input terminal through the current detector; A control unit controlling the gate driver and receiving an error signal generated at an output terminal of the gate driver; And a false detection prevention unit connected between the current detection unit and the control unit to determine whether an actual overcurrent is generated when the error signal is generated, and output a signal according to whether an overcurrent is generated to the control unit.

Description

Power transforming apparatus and air conditioner including the same}

The present invention relates to a power conversion device, and more particularly, to an electric power conversion device and an air conditioner including the same, which can prevent false senses during operation of the overcurrent protection operation.

Generally, a compressor of an air conditioner uses a motor as a driving source. AC power is supplied to the motor from the power converter.

It is generally known that such a power conversion device mainly includes a rectifier, a power factor controller, and an inverter.

First, the commercial voltage of the AC output from the commercial power supply is rectified by the rectifying unit. The voltage rectified by the rectifying unit is supplied to the inverter. At this time, the inverter generates AC power for driving the motor using the voltage output from the rectifier.

The inverter may be controlled by the inverter control unit, and the inverter control unit may control switching elements included in the inverter by a PWM signal.

As described above, when the inverter control unit drives the inverter, when an overcurrent occurs, the inverter stops driving to protect the inverter and devices, and an error signal (a fault signal) is transmitted to the inverter control unit.

However, if noise is generated on the transmission line of the error signal (Fault signal) for other reasons such as surge, the inverter control unit controls to stop the operation by detecting the error signal even if no overcurrent actually occurs. That is, false detection may occur in overcurrent detection.

Due to this false detection, an overcurrent has not actually occurred, but the inverter may be abnormally stopped, and operation reliability may be deteriorated.

In addition, the inverter control unit implemented as a microcomputer cannot receive a peak-type signal with a short duration, and it is determined whether or not the overcurrent is caused only by an error signal (a fault signal).

Technical problem to be achieved by the present invention, when driving the inverter, when performing an operation to protect from overcurrent, the power conversion device and air conditioner including the same to improve the operational reliability by preventing false detection due to noise, etc. Want to provide.

As a first aspect for achieving the above technical problem, the present invention, an inverter including a plurality of switching elements for generating a three-phase alternating current for driving a motor; A current detection unit for sensing the current of the inverter; A gate driver for driving a plurality of switching elements of the inverter and generating an error signal at an output terminal when a signal according to an overcurrent is detected from the input terminal through the current detector; A control unit controlling the gate driver and receiving an error signal generated at an output terminal of the gate driver; And a false detection prevention unit connected between the current detection unit and the control unit to determine whether an actual overcurrent is generated when the error signal is generated, and output a signal according to whether an overcurrent is generated to the control unit.

Here, the control unit may stop driving of the inverter when receiving the error signal and receiving the signal according to the occurrence of the overcurrent from the false detection prevention unit.

Here, the erroneous detection unit is connected to the current detection unit, a comparator for outputting a high (high) or low (low) signal according to whether the overcurrent is detected; And a D flip-flop connected between the comparator and the control unit.

In this case, the first input signal of the D flip-flop is the comparator output signal, and the second input signal of the D flip-flop may be high and low signals output from the controller.

At this time, the high and low signals output from the control unit may be switched when the error signal is received by the control unit or when the output signal of the D flip-flop is received.

Here, a bias voltage may be connected to the output terminal of the gate driver through a pull-up resistor.

At this time, when noise is detected through the pull-up resistor side and the error signal is generated, the erroneous detection preventing unit may operate.

Here, the current detection unit may be connected to the input terminal of the gate driver and the false detection prevention unit through an RC filter.

At this time, when receiving a signal according to overcurrent generation through the RC filter, the false detection preventing unit may operate.

Here, the error signal may be a signal having a duration detectable by the control unit that is transmitted to the control unit when an overcurrent is detected through the current detection unit.

As a second aspect for achieving the above technical problem, the present invention can provide a power conversion device having the above characteristics.

The present invention has the following effects.

First, in the operation of the inverter, it is possible to secure the operational reliability of the power conversion device including the inverter by preventing false detection due to noise of an overcurrent error signal.

In addition, by using the D flip flop of the false detection prevention unit, the current detection unit can recognize the occurrence of overcurrent in the form of a peak.

1 is a block diagram showing a power conversion apparatus according to an embodiment of the present invention.
2 is a circuit diagram showing a power conversion apparatus according to an embodiment of the present invention.
3 is a circuit diagram showing details of a power conversion apparatus according to an embodiment of the present invention.
4 is a view showing a timetable of the D flip-flop used in an embodiment of the present invention.
5 is a truth table of a D flip-flop used in an embodiment of the present invention.
6 to 9 are circuit diagrams showing an operation example of the power conversion apparatus according to an embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

While the invention allows for various modifications and variations, specific embodiments thereof are illustrated and illustrated in the drawings, which will be described in detail below. However, it is not intended to limit the invention to the particular forms disclosed, but rather the invention includes all modifications, equivalents, and substitutes consistent with the spirit of the invention as defined by the claims.

When an element, such as a layer, region, or substrate, is referred to as being “on” another component, it will be understood that it may be directly on another element or intermediate elements may be present therebetween. .

Although the terms first, second, etc. can be used to describe various elements, components, regions, layers and / or regions, these elements, components, regions, layers and / or regions It will be understood that it should not be limited by these terms.

1 is a block diagram showing a power conversion apparatus according to an embodiment of the present invention, Figure 2 is a circuit diagram showing a power conversion apparatus according to an embodiment of the present invention.

1 and 2, the power converter 100 is a rectifier 110 for rectifying the AC power supply 10, a converter for controlling the power factor in the process of raising / decreasing the DC voltage rectified by the rectifying unit 110 (120), a converter control unit 130 for controlling the converter 120, an inverter 140 for outputting three-phase alternating current, an inverter control unit 150 for controlling the inverter 140, and a converter 120 and an inverter ( 140) between the DC-link (DC-link) capacitor (C).

The inverter 140 outputs a three-phase alternating current, and this output current is supplied to the motor 200. Here, the motor 200 may be a compressor motor that drives the air conditioner. Hereinafter, it will be described as an example that the motor 200 is a compressor motor driving the air conditioner, and the power converter 100 is a motor driving device driving the compressor motor.

However, the motor 200 is not limited to the compressor motor, and may be used in a variety of application products using alternating frequency variable voltage, for example, an AC motor such as a refrigerator, a washing machine, an electric vehicle, a car, and a vacuum cleaner.

Meanwhile, the motor driving apparatus 100 may further include a DC terminal voltage detector (B), an input voltage detector (A), an input current detector (D), and an (output) current detector (E).

The motor driving apparatus 100 receives AC power from the system, converts power, and supplies the converted power to the motor 200.

The converter 120 converts the input AC power supply 10 to a DC power supply. The converter 120 may use a DC-DC converter that operates as a power factor control (PFC) unit. In addition, the DC-DC converter may use a boost converter. In some cases, the converter 120 may be a concept including the rectifier 110. Hereinafter, the converter 120 will be described as an example using a boost converter.

The rectifying unit 110 receives the AC power supply 10 and rectifies it, and outputs the rectified power to the converter 120 side. To this end, the rectifying unit 110 may use a full-wave rectifying circuit using a bridge diode.

As such, the converter 120 may perform a power factor improvement operation in the process of boosting and smoothing the voltage signal rectified by the rectifying unit 110.

The converter 120 is connected to an inductor L1 connected to the rectifier 110, a switching element Q1 connected to the inductor L1, and a connection between the switching element Q1 and the DC-link capacitor C It may include a diode (D1).

The boost converter 120 is a converter capable of obtaining an output voltage higher than the input voltage. When the switching element Q1 is conducted, the diode D1 is cut off and energy is stored in the inductor L1, and the DC-link capacitor C ), The charge stored in the discharge is discharged to generate the output voltage.

In addition, when the switching element Q1 is blocked, the energy stored in the inductor L1 is added when the switching element Q1 conducts, and is transferred to the output terminal.

Here, the switching element Q1 may perform a switching operation by a separate pulse width modulation (PWM) signal. That is, the PWM signal transmitted from the converter control unit 130 is connected to a gate (or base) terminal of the switching element Q1, so that the PWM signal can perform a switching operation.

The converter controller 130 may be configured to include a gate driver for transmitting a PWM signal to the gate terminal of the switching element Q1 and a controller for transmitting a driving signal to the gate driver.

The switching element Q1 may use a power transistor, for example, an insulated gate bipolar mode transistor (IGBT).

IGBT is a switching device having a structure of a power metal oxide semi-conductor field effect transistor (MOSFET) and a bipolar transistor, and is a device capable of small driving power, high speed switching, high withstand voltage, and high current density.

As such, the converter control unit 130 may control the turn-on timing of the switching element Q1 in the converter 120. Accordingly, the converter control signal Sc for the turn-on timing of the switching element Q1 can be output.

To this end, the converter control unit 130 may receive the input voltage Vs and the input current Is from the input voltage detection unit A and the input current detection unit D, respectively.

In some cases, the converter 120 and the converter control unit 130 may be omitted. That is, the output voltage that has passed through the rectifying unit 110 may be charged to the DC-link capacitor C or drive the inverter 140 without going through the converter 120.

The input voltage detector A may detect the input voltage Vs from the input AC power supply 10. For example, it may be located at the front end of the rectifier 110.

The input voltage detector A may include a resistance element, an OP AMP, and the like for voltage detection. The detected input voltage Vs is a discrete signal in the form of a pulse, and may be applied to the converter control unit 130 to generate the converter control signal Sc.

Next, the input current detection unit D may detect the input current Is from the input AC power supply 10. Specifically, it may be located at the front end of the rectifier 110.

The input current detector D may include a current sensor, a current transformer (CT), and a shunt resistor for current detection. The detected input voltage Is is a discrete signal in the form of a pulse and may be applied to the converter control unit 130 to generate the converter control signal Sc.

The DC voltage detector B detects the pulsating voltage Vdc of the DC-link capacitor C. For detecting the power supply, a resistance element, OP AMP, or the like can be used. The detected voltage (Vdc) of the DC-link capacitor (C), as a discrete signal (discrete signal) in the form of a pulse, can be applied to the inverter control unit 150, DC voltage (Vdc) of the DC-link capacitor (C) ) May generate an inverter control signal (Si).

Meanwhile, unlike the drawings, the detected DC voltage may be applied to the converter control unit 130 and used to generate the converter control signal Sc.

The inverter 140 includes a plurality of inverter switching elements Qa, Qb, Qc, Qa ', Qb', Qc ', and is smoothed by the on / off operation of the switching element Q1 of the converter 120. The DC power supply (Vdc) may be converted into a three-phase AC power supply having a predetermined frequency, and output to the three-phase motor 200.

Specifically, the inverter 140 has a pair of upper switching elements (Qa, Qb, Qc) and lower switching elements (Qa ', Qb', Qc ') connected in series with each other, and a total of three pairs of upper and lower switching The elements can be connected in parallel to each other.

Similar to the converter 120, the switching elements of the inverter 140 (Qa, Qb, Qc, Q'a, Q'b, Q'c) can use a power transistor, for example, an insulated gate bipolar transistor (insulated gate bipolar mode transistor; IGBT) can be used.

The inverter controller 150 may output the inverter control signal Si to the inverter 140 in order to control the switching operation of the inverter 140. The inverter control signal Si is a pulse width modulation (PWM) switching control signal, based on an output current (io) flowing through the motor 200 and a DC-link voltage (Vdc) that is both ends of the DC-link capacitor (C). Can be generated and output. At this time, the output current io may be detected from the output current detector E, and the DC-link voltage Vdc may be detected from the DC-link voltage detector B.

2, the inverter control unit 150 is a gate for transmitting a PWM signal to the gate terminal of the switching elements (Qa, Qb, Qc, Q'a, Q'b, Q'c) included in the inverter 140 It may be a configuration including a driver (gate driver) 151, and a control unit 152 for transmitting a driving signal to the gate driver (151).

In some cases, the control unit 152 may control the converter 120. That is, when the converter control unit 130 is composed of a gate driver for transferring a PWM signal to the gate terminal of the switching element Q1 and a control unit for transmitting a driving signal to the gate driver, the converter control unit ( The control unit 130 and the control unit 152 of the inverter control unit 150 may have the same configuration. For example, the control unit 152 may be a MICOM implemented as a semiconductor integrated circuit (IC).

In addition, the gate driver 151 of the inverter controller 150 may also be implemented as a semiconductor integrated circuit. For example, it may be made of two or more metal oxide semiconductor (MOS) devices.

Hereinafter, a case where the gate driver 151 and the controller 152 of the inverter controller 150 are implemented as a semiconductor integrated circuit will be described as an example.

Meanwhile, the inverter 140 and the gate driver 151 may be manufactured as one module. Such a module may be referred to as an integrated power module (IPM) or power module.

The current detection unit E can detect the output current io flowing between the inverter 140 and the motor 200. That is, the current flowing through the motor 200 is detected. The current detector E may detect all the output currents ia, ib, and ic of each phase, or may also detect the output currents of two phases using three-phase balance.

The current detector E may be located between the inverter 140 and the motor 200, and for detecting current, a current transformer (CT), a shunt resistor, or the like may be used.

FIG. 2 shows an example in which the current detection unit is composed of a shunt resistor Rs installed on the current return side of the inverter. At this time, a single shunt resistor Rs may be provided between the DC-link capacitor C and the switching elements Qa, Qb, Qc, Q'a, Q'b, and Q'c constituting the inverter 140. . However, in some cases, a shunt resistor may be provided in the switching element corresponding to each phase.

At this time, when the overcurrent is detected through the current detection unit implemented by the shunt resistor Rs, the voltage applied to the shunt resistor Rs, that is, the voltage corresponding to the overcurrent is the input terminal of the gate driver 151 (Cin terminal; FIG. 3), the gate driver 151 may generate an error signal at the output terminal Fo (see FIG. 3) and transfer it to the control unit 152 to stop driving the inverter 140.

In addition, a false detection prevention unit 160 may be provided between the current detection unit Rs and the control unit 152. When the error signal is generated, the erroneous detection preventing unit 160 may determine whether an actual overcurrent has occurred, and output a signal according to whether an actual overcurrent has occurred.

For example, although the overcurrent did not occur in the actual inverter 140, the overcurrent may be detected due to noise due to a surge voltage, etc. In this case, whether the actual overcurrent is generated by the operation of the false detection prevention unit 160 It can inform the control unit 152.

Accordingly, when an actual overcurrent does not occur and an error signal is generated due to noise or the like, or when a false detection occurs on the output terminal Fo side, the control unit 152 is configured to detect the false detection by the operation of the false detection prevention unit 160. It is determined that the inverter 140 can be normally driven.

The main detailed configuration including the false detection prevention unit 160 will be described in detail with reference to FIG. 3.

3 is a circuit diagram showing details of a power conversion apparatus according to an embodiment of the present invention.

Referring to FIG. 3, a detailed configuration of the false detection prevention unit 160 is illustrated.

In addition, as mentioned above, the inverter 140 and the gate driver 151 represent a state provided as one module. In FIG. 3, a power module (IPM) 170 represents components that combine the inverter 140 and the gate driver 151. That is, FIG. 3 shows a configuration in which switching elements constituting the inverter 140 and the gate driver 151 are integrated.

3 mainly shows the configuration of the power module 170, the control unit 152, and the false detection prevention unit 160.

In this power module 170, Cin is an input terminal of the gate driver 151 for an overcurrent protection function, and Fo may be an output terminal that outputs an error signal when a voltage corresponding to an overcurrent is input to the Cin terminal.

The Fo terminal may output a high signal during normal operation of the inverter 140. The high signal may be generated using a bias voltage 5V supplied through a pull-up resistor R1. At this time, when a voltage corresponding to an overcurrent is input to the Cin terminal, the high signal may be converted to a low signal for a certain time. The duration of the low signal may be a minimum time (eg, approximately 30 s) that can be sensed by the microcomputer implemented by the controller 152.

In addition, even when a voltage corresponding to an overcurrent is input to the Cin terminal, the power module 170 may detect it as an overcurrent when a predetermined time (for example, 2 µs) is input.

That is, the Fo terminal may output a high signal at normal times, and when a voltage corresponding to the overcurrent is input to the Cin terminal for a predetermined time or more, the Fo terminal may determine the overcurrent and output a high signal for a predetermined time.

Referring to FIG. 3, the erroneous detection preventing unit 160 includes a comparator 161 connected to the current detection unit and a D Flip flop 162 connected between the comparator 161 and the control unit 152. It can contain.

As mentioned above, the current detector can be implemented with a shunt resistor (Rs). The resistance value of the shunt resistor Rs may be, for example, 10 mΩ. At this time, if a current corresponding to an overcurrent to the shunt resistor Rs, for example, a current of 50 A or more flows, a voltage of 0.5 V or more may be applied to both ends of the shunt resistor Rs, and this voltage is power. It can be input to the Cin stage of the module 170.

At this time, the voltage signal applied to both ends of the shunt resistor Rs may be connected to the Cin terminal through the RC filter 171. The RC filter 171 may primarily serve to reduce noise of the voltage signal input to the Cin terminal through the shunt resistor Rs.

Also, the voltage signal across both ends of the shunt resistor Rs may be input to the comparator 161. The resistors R2 and R3 for setting the time constant of the comparator 161 may be set to output a high signal when a voltage of 0.5 V or more is input to the + terminal, as illustrated above. In this case, the high signal may be a signal having a voltage of 5V, for example. The comparator 161 may include an OP amplifier 163.

The output signal of the comparator 161 may be input to the CK terminal of the D flip-flop 162. At this time, the CK terminal may be referred to as a first terminal, and a signal input through the CK terminal may be referred to as a first input signal. Also, a signal (“Signal”) output from the “Signal” terminal of the control unit 152 and input to the D flip-flop 162 may be input through the D terminal, and may be referred to as a second input signal.

The output of the D flip-flop 162 may be applied to the control unit 152 through the Q terminal. At this time, the RC filter 154 may be located between the Q terminal and the control unit 152. That is, the noise of the output of the D flip-flop 162 may be removed through the RC filter 154 and applied to the control unit 152.

4 is a view showing a timetable of a D flip-flop used in an embodiment of the present invention, and FIG. 5 is a truth table of a D flip-flop used in an embodiment of the present invention.

4 and 5, the D value at the rising point of CK is returned to the next Q value (Q +).

That is, according to the truth table, it can be seen that the Q value changes at the rising time of CK, and the next Q value (Q +) may depend on the D value at the time.

At this time, according to an embodiment of the present invention, "Signal", Fo and Q can detect the actual overcurrent (Fault detection) when the conditions shown in Table 1 below.

In addition, the rest of the cases can be judged as false senses. That is, it may be determined that noise has occurred in the signal of the Fo terminal side or the current detection unit Rs side of the power module 170.

As described above, when an overcurrent is detected through the current detector implemented by the shunt resistor Rs, the voltage applied to the shunt resistor Rs, that is, the voltage corresponding to the overcurrent is input to the Cin terminal of the gate driver 151 Can be.

Accordingly, the output signal of the Fo stage of the power module 170 may be converted from a high signal to a low signal for a predetermined time.

In addition, as described above, when the overcurrent is detected through the current detection unit implemented by the shunt resistor Rs, the voltage applied to the shunt resistor Rs, that is, the voltage corresponding to the overcurrent, the comparator of the false detection prevention unit 160 ( 161).

At this time, the comparator 161 outputs a high signal and a high signal is input to the CK terminal of the D flip-flop. The “Signal” transmitted from the control unit 152 may be a high signal or a low signal, and the high signal or low signal of the “Signal” is input to the D terminal of the D flip-flop.

That is, as shown in Table 1, when the output signal of the Fo terminal is low (low), when the D terminal ("Signal") is a high signal, a high signal is transmitted from the Q terminal, and the D terminal ("Signal") is In the case of the low signal, a low signal is transmitted from the Q terminal, and it can be determined that only these two cases have actually occurred.

As described above, when it is determined that an actual overcurrent has occurred, the control unit 152 may stop driving the inverter 140.

And, in other cases, even when a voltage corresponding to an overcurrent is input to the Cin terminal of the power module 170 or an overcurrent is sensed at the Fo terminal side (that is, when the Fo signal is switched to a low signal) It can be determined that this is due to noise, etc., rather than determining that an actual overcurrent has occurred. Then, the controller 152 can drive normally without stopping the drive of the inverter 140.

As described above, when an actual overcurrent does not occur and an error signal is generated due to noise or the like, or when a false detection occurs on the output terminal Fo side, the controller 152 senses this by the operation of the false detection prevention unit 160. It is determined that the inverter 140 can be driven normally.

6 to 9 are circuit diagrams showing an operation example of the power conversion apparatus according to an embodiment of the present invention.

Hereinafter, an overcurrent detection process according to each situation will be described in detail with reference to each drawing.

First, FIG. 6 shows a process of determining the occurrence of overcurrent when “Signal” is output from the control unit 152.

When an overcurrent (for example, 50A or more) occurs in the current (a) transmitted from the power module 170 including the inverter to the motor 200, a current detection unit implemented as a shunt resistor (Rs; for example, 10 mΩ) An overcurrent also occurs in the current b flowing through it.

Then, a voltage of 0.5 V or more applied to both ends of the shunt resistor Rs is applied to the Cin terminal of the power module 170, and is simultaneously applied to the false detection prevention unit 160.

When a voltage of 0.5 V or more is applied to the Cin terminal of the power module 170, an error signal d is output from the Fo terminal of the power module 170. Specifically, the output signal of the Fo terminal that maintains the high signal (for example, 5V) by the pull-up resistor R1 located at point c is a certain time (for example, the control unit 152 can detect) , Approximately 30 Hz). This low signal is applied to the control unit 152.

In addition, a voltage of 0.5 V or more applied to the false detection prevention unit 160 is input to the comparator 161, and the comparator 161 outputs a high signal (eg, 5 V).

The high signal output from the comparator 161 is input to the CK terminal of the D flip-flop 162. At this time, according to the truth table of FIG. 4, as described above, when a high signal is input to the CK terminal and the D signal (“Signal”) is output by the control unit 152 as a high signal, the D flip-flop 162 ), I.e., the Q signal e transitions from low to high.

Then, the control unit 152 detects the low signal of the Fo terminal output and the high signal of the Q signal, and according to Table 1, it senses that an actual overcurrent has occurred (Fault detection).

Accordingly, the control unit 152 may stop the operation of the power module 170 by not transmitting a signal to the power module 170.

Next, FIG. 7 shows a process in which the control unit 152 determines the false sense of the Fo stage when “Signal” is outputting a high signal.

If an overcurrent (for example, 50A or more) does not occur in the current a transferred from the power module 170 including the inverter to the motor 200, a voltage less than 0.5V is applied to both ends of the shunt resistor Rs. It is applied to the Cin end of the power module 170, and at the same time, it is applied to the false detection prevention unit 160.

When a voltage lower than 0.5 V is applied to the Cin terminal of the power module 170, an error signal is not output from the Fo terminal of the power module 170. That is, the output signal of the Fo terminal maintains a high signal.

However, when noise occurs on the pull-up resistor R1 side at point c due to surge voltage generation or the like, the power module 170 outputs an error signal d. Specifically, the output signal of the Fo terminal that maintains the high signal (for example, 5V) by the pull-up resistor R1 located at point c is a certain time (for example, the control unit 152 can detect) , Approximately 30 Hz). This low signal is applied to the control unit 152.

In addition, a voltage lower than 0.5V is input to the comparator 161 of the false detection prevention unit 160, and the comparator 161 outputs a low signal (eg, 0V).

The low signal output from the comparator 161 is input to the CK terminal of the D flip-flop 162. At this time, according to the truth table of FIG. 4, as described above, when the low signal is input to the CK terminal and the D signal (“Signal”) is output by the control unit 152 as a high signal, the D flip-flop 162 ) Output, that is, the Q signal (e) remains low.

Then, the control unit 152 detects the low signal of the Fo terminal output and the low signal of the Q signal, and according to Table 1, it detects that no actual overcurrent has occurred. That is, a false detection may occur due to noise or the like, but the control unit 152 may detect whether a false detection is detected using the output of the false detection prevention unit 160 and the Fo terminal.

Accordingly, the control unit 152 may transmit the signal to the power module 170 to operate the power module 170 normally.

8 illustrates a process in which the control unit 152 determines the false sense of the Cin stage when “Signal” is outputting a high signal.

If an overcurrent (for example, 50A or more) does not occur in the current a transferred from the power module 170 including the inverter to the motor 200, a voltage less than 0.5V is applied to both ends of the shunt resistor Rs. .

However, noise may be introduced from the RC filter 171 side for reasons such as surge generation. For example, when the ground is shaken due to surge voltage generation or the like, a voltage of 0.5 V or more may be applied to the Cin terminal of the power module 170, and the voltage of 0.5 V or more is simultaneously applied to the false detection prevention unit 160. .

Although a voltage of 0.5 V or more was applied to the Cin terminal of the power module 170, since the duration of the noise is very short, an error signal is not output from the Fo terminal of the power module 170. That is, the output signal (d) of the Fo terminal maintains a high signal because a voltage of 0.5 V or more is applied to the Cin terminal but the duration is not long (for example, shorter than 2 ms). This high signal is applied to the control unit 152.

Further, a voltage of 0.5 V or more is input to the comparator 161 of the false detection prevention unit 160, and the comparator 161 outputs a high signal (for example, 5 V).

The high signal output from the comparator 161 is input to the CK terminal of the D flip-flop 162. At this time, according to the truth table of FIG. 4, as described above, when a high signal is input to the CK terminal and the D signal (“Signal”) is output by the control unit 152 as a high signal, the D flip-flop 162 The output of Q, that is, the Q signal e is converted from a low signal to a high signal.

Then, the control unit 152 detects the high signal of the Fo terminal output and the high signal of the Q signal, and according to Table 1, it detects that no actual overcurrent has occurred. That is, a false detection may occur due to noise or the like, but the control unit 152 may detect whether a false detection is detected using the output of the false detection prevention unit 160 and the Fo terminal.

Accordingly, the control unit 152 may transmit the signal to the power module 170 to operate the power module 170 normally.

9 shows a process of determining the occurrence of overcurrent when “Signal” is output from the control unit 152.

When an overcurrent (for example, 50A or more) occurs in the current (a) transmitted from the power module 170 including the inverter to the motor 200, a current detection unit implemented as a shunt resistor (Rs; for example, 10 mΩ) An overcurrent also occurs in the current b flowing through it.

Then, a voltage of 0.5 V or more applied to both ends of the shunt resistor Rs is applied to the Cin terminal of the power module 170, and is simultaneously applied to the false detection prevention unit 160.

When a voltage of 0.5 V or more is applied to the Cin terminal of the power module 170, an error signal d is output from the Fo terminal of the power module 170. Specifically, the output signal of the Fo terminal that maintains the high signal (for example, 5V) by the pull-up resistor R1 located at point c is a certain time (for example, the control unit 152 can detect) , Approximately 30 Hz). This low signal is applied to the control unit 152.

In addition, a voltage of 0.5 V or more applied to the false detection prevention unit 160 is input to the comparator 161, and the comparator 161 outputs a high signal (eg, 5 V).

The high signal output from the comparator 161 is input to the CK terminal of the D flip-flop 162. At this time, according to the truth table of FIG. 4, as described above, when a high signal is input to the CK terminal and the D signal (“Signal”) is output by the control unit 152 as a low signal, the D flip-flop 162 ) Output, that is, the Q signal (e) transitions from high to low.

Then, the control unit 152 detects the low signal of the Fo terminal output and the low signal of the Q signal, and according to Table 1, it senses that the actual overcurrent has occurred (Fault detection).

Accordingly, the control unit 152 may stop the operation of the power module 170 by not transmitting a signal to the power module 170.

Table 2 below summarizes the sensing states for each of these situations. In Table 2, a state in which the operation of the power module 170 is stopped because an actual overcurrent has occurred is indicated as “Error”. In addition, the signal (Signal (t)) generated by the control unit 152 is converted to a subsequent signal (Signal (t + 1)) when a corresponding situation occurs, that is, when Fo or Q is changed.

As described above, the output signal of the Fo terminal of the power module 170 or the inverter 140 / gate driving unit 151 and the signal of the false detection prevention unit 160 using the signal of the current detection unit Rs are simultaneously controlled. Detected at 152, it is possible to protect the power converter by stopping driving of the inverter 140 only when a certain current or more is sensed at the same time.

In addition, by using the CK terminal of the D flip-flop 162, when the peak-type overcurrent occurs, the limit of the detection time of the control unit 152 implemented as a microcomputer (minimum holding time for signal detection; 25 ㎲) is removed. can do.

Accordingly, a signal in the form of a peak within the minimum sensing time of the microcomputer can be received and detected.

In this way, in the operation of the inverter 140, it is possible to prevent false detection due to noise of an overcurrent error signal, thereby ensuring operation reliability of the power conversion device including the inverter 140.

In addition, by using the D flip-flop of the false detection prevention unit 160, the current detection unit can recognize the occurrence of an overcurrent in the form of a peak.

On the other hand, the embodiments of the present invention disclosed in the specification and drawings are merely presented as specific examples to aid understanding, and are not intended to limit the scope of the present invention. It is obvious to those skilled in the art to which the present invention pertains that other modifications based on the technical spirit of the present invention can be implemented in addition to the embodiments disclosed herein.

100: power converter 110: rectifier
120: converter 130: converter control unit
140: inverter 150: inverter control
151: gate driver 152: control unit
160: erroneous detection unit 161: comparator
162: D flip-flop 163: OP amplifier
200: motor

Claims (11)

An inverter including a plurality of switching elements that generate a three-phase alternating current for driving the motor;
A current detection unit that senses the current of the inverter;
A gate driver for driving a plurality of switching elements of the inverter and generating an error signal at an output terminal when a signal according to an overcurrent is detected through the current detection unit from an input terminal for an overcurrent protection function;
A control unit controlling the gate driver and receiving an error signal generated at an output terminal of the gate driver; And
It is connected between the current detection unit and the control unit is configured to include a false detection prevention unit for determining whether an actual overcurrent occurs when the error signal is generated and outputting a signal according to whether the overcurrent has occurred.
The false detection prevention unit includes a comparator that is connected to the current detection unit and outputs a high or low signal according to whether overcurrent is detected, and a D flip-flop connected between the comparator and the control unit,
The current detection unit and the comparator power conversion device, characterized in that connected to the input terminal for the overcurrent protection function. The power conversion device of claim 1, wherein the control unit stops driving the inverter when receiving the error signal and receiving the signal according to the overcurrent generation from the false detection prevention unit. delete According to claim 1, wherein the first input signal of the D flip-flop is the comparator output signal, and the second input signal of the D flip-flop is a high and low signal output from the control unit. Power conversion device. The power conversion of claim 4, wherein the high and low signals output from the control unit are switched when the error signal is received by the control unit or when the output signal of the D flip-flop is received. Device. The power conversion device of claim 1, wherein a bias voltage is connected to an output terminal of the gate driver through a pull-up resistor. The power conversion device according to claim 6, wherein when the error signal is generated due to noise being sensed through the pull-up resistor side, the erroneous detection preventing unit operates. The power conversion device of claim 1, wherein the current detection unit is connected to an input terminal of the gate driving unit and the false detection prevention unit through an RC filter. The power conversion device of claim 8, wherein the false detection prevention unit operates when a signal according to overcurrent generation is received through the RC filter. The power conversion apparatus of claim 1, wherein the error signal is a signal having a duration detectable by the control unit that is transmitted to the control unit when an overcurrent is detected through the current detection unit. An air conditioner comprising the power conversion device of any one of claims 1, 2, and 4 to 10.

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