KR102107192B1 - Image sensing apparatus - Google Patents

Abstract

An image sensing device according to an embodiment of the present technology is connected between a ground and a first node, a photodiode, a power supply voltage supply line, and a second node, and in response to a reset signal applied to a gate in a reset mode, the second A reset transistor that resets a node to the power voltage, a transfer transistor connected between the second node and the floating diffusion region, and turned on or off according to a transfer control signal applied to the gate, and the first node and the second node And an isolation transistor having a gate connected to a power voltage supply line, wherein the transfer transistor resets the floating diffusion in the reset period and transfers the charge of the second node to the floating diffusion in the exposure period. , The isolation transistor after the exposure period starts After a certain period of time, the first node and the second node may be set to have the same voltage level.

Description

Image sensing device {IMAGE SENSING APPARATUS}

The present invention relates to an image sensing device.

An image sensor is a device that converts optical images into electrical signals. Recently, with the development of the computer industry and the communication industry, the demand for image sensors with improved performance in various fields such as digital cameras, camcorders, personal communication systems (PCS), game devices, security cameras, medical micro cameras, and robots has increased. have.

In addition, the image sensor is also used for fingerprint recognition.

An object of the present invention is to provide an image sensing device capable of sensing a subject more accurately even if the amount of light reflected from the subject varies depending on the position in the subject because the light from the light source is not uniformly irradiated to the surface of the subject.

The technical problems of the present invention are not limited to the technical problems mentioned above, and other technical problems not mentioned will be clearly understood by those skilled in the art from the following descriptions.

An image sensing device according to an embodiment of the present invention is connected between a ground and a first node, a photodiode, a power supply voltage supply line, and a second node, and according to a reset signal applied to a gate in a reset mode, the second A reset transistor that resets a node to the power voltage, a transfer transistor connected between the second node and the floating diffusion region, and turned on or off according to a transfer control signal applied to the gate, and the first node and the second node And an isolation transistor having a gate connected to a power voltage supply line, wherein the transfer transistor resets the floating diffusion in the reset period and transfers the charge of the second node to the floating diffusion in the exposure period. , The isolation transistor after the exposure period starts After a certain period of time, the first node and the second node may be set to have the same voltage level.

According to the present invention, the light from the light source is not uniformly irradiated to the surface of the subject, and thus, even if the amount of light reflected from the subject varies depending on the position in the subject, the subject can be more accurately sensed.

1 is a configuration diagram briefly showing a configuration in an image sensing device according to an embodiment of the present invention.
Figure 2 is a view showing an installation position of the image sensor in the case where the image sensing device of the present invention is applied to a display device.
3 is a view showing an example of a state of light amount (pixel value) according to a distance from a light source in a high exposure frame and a low exposure frame.
4 is a view for explaining a method for frame correction.
5 is a circuit diagram illustrating a structure of a pixel according to an embodiment of the image sensor of FIG. 1.
6 exemplarily shows a timing diagram for the driving signals of FIG. 5.
7 exemplarily shows a timing diagram for the driving signals of FIG. 5.
8 exemplarily shows a timing diagram for the driving signals of FIG. 5.
9 exemplarily shows a timing diagram for the driving signals of FIG. 5.
10 is a circuit diagram illustrating a structure of a pixel according to another embodiment of the image sensor of FIG. 1.
11 is a timing diagram for explaining the operation of the isolation transistor of FIG. 10.
12 is a view showing the structure and operation of a photodiode according to an embodiment of the present invention.
13 is a graph showing the relationship between accumulation time and output voltage in the structure of the photodiode of FIG. 12;
14 is a view showing a metal wall and a metal shielding structure according to an embodiment of the present invention.
15 is a configuration diagram briefly showing a configuration in an image sensing device according to another embodiment of the present invention.

Hereinafter, some embodiments of the present invention will be described in detail through exemplary drawings. It should be noted that in adding reference numerals to the components of each drawing, the same components have the same reference numerals as possible even though they are displayed on different drawings. In addition, in describing embodiments of the present invention, when it is determined that detailed descriptions of related well-known configurations or functions interfere with understanding of the embodiments of the present invention, detailed descriptions thereof will be omitted.

1 is a configuration diagram briefly showing a configuration in an image sensing device according to an embodiment of the present invention.

The image sensing device of FIG. 1 may include an image sensor 100 and an optical deviation compensation unit 200.

The image sensor 100 detects the strength and weakness of the optical image reflected from the subject, and generates and outputs an image frame converted to digital image data. In particular, the image sensor 100 of the present embodiment is to remove the gradation effect due to the position of the light source (eg, infrared LED light source) that irradiates light on the subject (eg, finger fingerprint), the exposure time (integration) for the same subject By photographing at different times, a high-input raw input signal (high exposure frame (FRAME_L)) and a low-exposure raw input signal (low exposure frame (FRAME_S)) are generated and output. For example, while the light source irradiates the subject, the image sensor 100 first generates a high exposure frame FRAME_L by photographing the subject with a longer exposure time, and then shortens the exposure time, and then photographs the subject again, resulting in a low exposure frame. Create (FRAME_S). The image sensor 100 may be a black and white image sensor for fingerprint sensing in which a color filter is not formed on the pixel array. In addition, the image sensor 100 of this embodiment may be installed on the lower side of the display panel to overlap with a display panel of a specific device (eg, a smartphone) (eg, an OLED panel of a mobile phone).

The optical deviation compensation unit 200 corrects and combines the high exposure frame FRAME_L and the low exposure frame FRAME_S output from the image sensor 100 to generate a final image frame FRAME_COM. For example, the optical deviation compensation unit 200 may be configured to remove a value of a region in which the pixel value (light amount) saturated with the highest value or the lowest value in each of the high exposure frame FRAME_L and the low exposure frame FRAME_S is removed. (FRAME_L) and the low exposure frame (FRAME_S) are corrected, and a corrected high exposure frame and a low exposure frame are combined to generate one image frame (FRAME_COM) with optical deviation compensation.

2 is a view showing an example of the installation position of the image sensor when the image sensing device of the present invention is applied to a display device. Here, (a) is a view showing a cross-sectional view of the display device, (b) is a view showing a plane view of the display device. In addition, FIG. 3 is a view showing an example of the amount of light (pixel value) according to the distance from the light source in the high exposure frame and the low exposure frame.

2 and 3, a method of compensating for optical deviation in an image sensing device according to an embodiment of the present invention will be described in more detail.

The display device of FIG. 2 may be, for example, a smartphone. The display device may include a main body 10, a display panel 20, a glass substrate 30 and an image sensor 100.

The main body 10 is a structure supporting a display device. The display panel 20 displays an image image generated according to the driving of the display device, and a fine hole is formed. The display panel 20 may include an OLED panel. The glass substrate 30 is positioned above the display panel 20 to protect the display panel 20.

The image sensor 100 is used for sensing a fingerprint, and is disposed under the display panel 20 to overlap with a portion of the display panel 20. The image sensor 100 detects light reflected from a fingerprint as high exposure and low exposure after being irradiated from a light source (not shown), and generates and outputs a high exposure frame and a low exposure frame each converted to digital image data. do.

In general, in the case of a sensing device for fingerprint recognition, the light source is located on the rear side of the image sensor so that light from the light source is evenly irradiated onto the fingerprint.

However, as in the present embodiment, when the image sensor 100 is disposed on the rear side of the display panel 20 so as to overlap with the display panel 20, the display panel 20 causes a light source for fingerprint recognition as in the prior art. It is difficult to arrange it on the rear side of the image sensor 100. Accordingly, the light source for fingerprint recognition may be disposed outside the display panel 20, for example.

In this case, the subject (fingerprint) is located in the image sensor 100 is installed on the upper side of the display panel 20. Since the light source is located outside the display panel 20, light from the light source is irradiated obliquely to the fingerprint. . Due to this, in the fingerprint, a lot of light is irradiated to an area close to the light source, while less light is irradiated to the opposite area and shadows may be generated due to the deviation of the light.

When the deviation of the light is large, it is impossible to properly sense an image of an area that is irradiated with too much light and an area that is irradiated with too little light. Therefore, in this embodiment, after the same subject is photographed twice with high exposure and low exposure, an image is sensed by using a low-exposure image for an area that is exposed to too much light, and an area that is irradiated with too little light. A method of sensing an image using a high-exposure image is used.

To this end, when a sensing command is applied, the image sensor 100 photographs the same subject (fingerprint) with different exposure time (integration time), thereby photographing a high exposure frame (FRAME_L), which is a raw input signal of high integration. And a low exposure frame (FRAME_S) which is a raw input signal of short exposure (Short Integration). That is, the image sensor 100 continuously photographs the same subject twice with high exposure and low exposure.

In this case, during high exposure, the amount of light flowing into the image sensor 100 increases as a whole, and too much light enters the region close to the light source. On the other hand, when the light is exposed, the amount of light that flows into the image sensor 100 decreases as a whole, and too little light enters the area far from the light source.

Accordingly, as shown in FIG. 3, in a high-exposure frame, pixels corresponding to a region close to a light source have too much light, so that pixel values are saturated to a preset maximum value. In addition, in the low-exposure frame, pixels corresponding to an area far from the light source have too little light, so the pixel values are saturated to the lowest value.

To remove the saturation region, the optical deviation compensation unit 200 corrects each pixel value of the high exposure frame FRAME_L and the low exposure frame FRAME_S. To this end, the optical deviation compensation unit 200 averages each pixel value of the high-exposure frame FRAME_L and the low-exposure frame FRAME_S from the corresponding pixel value to the average value of pixels within a predetermined range including the pixel (average pixel value) Correct by subtracting.

For example, the corrected pixel value {(Long_AC) i, j} for the (i, j) th pixel in the high exposure frame FRAME_L is the pixel value of the corresponding pixel (i, j) as shown in Equation 1 below. It may be a value obtained by subtracting the average value {Average (Long) i, j} of n × n (n is a natural number) pixels centered on the corresponding pixel (i, j) from {(Long) i, j}. In this case, n may be “5” as in FIG. 4 (a), but is not limited thereto.

The optical deviation compensation unit 200 corrects all pixel values of the high exposure frame FRAME_L in this way. At this time, when the pixel to be corrected is an outer pixel in the pixel array, for example, as shown in FIG. 4 (b), in the case of the outermost pixel, the pixels of the corresponding range only in the direction in which the effective pixels exist The average can be calculated. That is, in FIG. 4B, an average value {Average (Long) i, j} for correcting the outermost pixel (i, j) may be an average value of 3 × 5 pixels.

In this case, pixel values in a region in which only pixels saturated with the highest value in the high exposure frame FRAME_L are collected are corrected to “0”. For example, if the (i, j) th pixel is saturated and all 5 × 5 pixels around it are saturated, the value of the (i, j) th pixel {(Long) i, j} and the surrounding 5 Since the average values of the × 5 pixels {Average (Long) i, j} are the same, the corrected pixel value {(Long_AC) i, j} becomes “0”.

In the case of an area containing many saturated pixels, each pixel in the area is corrected to a very small value.

The optical deviation compensation unit 200 corrects the low exposure frame FRAME_S in the same way for each pixel. That is, the corrected pixel value {(Short_AC) i, j} for the (i, j) th pixel in the low exposure frame FRAME_S is a pixel value of the corresponding pixel (i, j) as shown in Equation 2 below. It may be a value obtained by subtracting the average value {Average (Short) i, j} of 5 × 5 pixels centered on the corresponding pixel (i, j) from {(Short) i, j}.

Through this, in the case of the low-exposure frame FRAME_S, pixel values of a region in which pixels saturated with the lowest value are collected are corrected to “0”.

However, as shown in FIG. 3, the region corrected to “0” in the high exposure frame FRAME_L has a value in the low exposure frame FRAME_S, and the region corrected to “0” in the low exposure frame FRAME_S is high. It has a value in the exposure frame (FRAME_L).

Therefore, the optical deviation compensation unit 200 combines the corrected high exposure frame and the low exposure frame to generate one image frame (FRAME_COM). In this case, the optical deviation compensator 200 may add an offset value of a predetermined size after combining the corrected high exposure frame and the low exposure frame.

That is, the finally combined output value {(Combined output) i, j} may be expressed as Equation (3).

As a method of combining a high exposure frame and a low exposure frame, a method such as a method of generating a high dynamic range (HDR) image by combining a high exposure image frame and a low exposure image frame may be used.

 In the above-described embodiment, a method of subtracting an average value of pixels within a predetermined range around a corresponding pixel from a value of a pixel to be corrected was used as a correction method, but other methods may be used. For example, the corrected pixel value {(Long_AC) i, j or (Short_AC) i, j} for the (i, j) th pixel is the value of the pixel (i, j) to be corrected as shown in Equation 4 below. In {(Long) i, j or (Short) i, j}, the smallest value {Min (Long) i, j or Min (Short) i, j} among the values of pixels within a certain range centering on the corresponding pixel It can be subtracted.

That is, when all pixels in a certain region are saturated, the values of the pixels in the region are the same, so the corrected pixel value {(Long_AC) i, j or (Short_AC) i, j} is “0” even if the minimum value is subtracted. do. However, when the minimum value is subtracted, a larger value can be obtained for an area where the correction value does not become “0” compared to the case where the average value is subtracted, thereby maximizing the ridge and valley values of the fingerprint. There is an advantage that can be utilized.

Even in the case of correction using a minimum value, a method of generating a single image frame by combining a corrected high exposure frame and a low exposure frame can be performed in the same way as using the above-described average value.

In the above-described embodiment, the method for compensating for optical deviation using an average value or a minimum value has been described when a single high-exposure frame and one low-exposure frame are corrected and combined to generate one final image frame. One final image frame may be generated using a field and a plurality of low-exposure frames.

Depending on the person, the state of the fingerprint may be different, but there are some people who have worn out a lot of fingerprints. In this case, by continuously photographing the same fingerprint and summing the values, the difference in the amount of light between the ridge and the bone of the fingerprint can be increased to achieve more accurate sensing.

For example, a method of forming a single image frame using one of the high-exposure frames and one low-exposure frame described above may be repeated multiple times, and the results may be summed to generate one final image frame. In this case, the image sensor 100 may continuously generate and output a plurality of frame pairs in which one high exposure frame and one low exposure frame are paired. The optical deviation compensation unit 200 may correct and combine the high exposure frame and the low exposure frame for each frame pair according to the above-described method, and then sum the combined image frames to generate one final image frame.

Alternatively, a plurality of high-exposure frames and low-exposure frames may be generated and corrected and then combined together. In this case, the image sensor 100 continuously generates a plurality of high exposure frames and low exposure frames. The optical deviation compensator 200 corrects each of the plurality of high-exposure frames and the low-exposure frames according to the above-described correction method using an average value or a minimum value, and then a plurality of high-exposure frames and low-exposure frames with corrected pixel values The frames can be added to create one final image frame.

5 is a circuit diagram illustrating the structure of a pixel according to an embodiment of the image sensor of FIG. 1.

Referring to FIG. 5, the image sensor 100 includes a photodiode PD, a reset transistor P1, a transfer transistor P2, a floating diffusion region FD, a selection transistor P3, a conversion transistor N1, and a current source (Is).

The photodiode PD is connected between ground and the node ND1, the reset transistor P1 is connected between the power voltage supply line VDD and the node ND1, and the transfer transistor P2 is connected to the node ND1 and the node ND2. The floating diffusion region FD is connected between the node ND2 and the ground. The selection transistor P3, the conversion transistor N1, and the current source Is are connected in series between the power supply voltage supply line VDD and ground, and the gate of the conversion transistor N1 is connected to the node ND2. The voltage of the node ND3 to which the conversion transistor N1 and the current source Is are connected becomes the output voltage Vout.

The photodiode PD detects an image signal by converting an optical signal into an electrical signal. The photodiode PD is an example of a photoelectric conversion element, and may be formed of at least one of a photo transistor, a photo gate, and a pinned photo diode (PPD).

The floating diffusion region FD accumulates charge generated in the photodiode PD. The floating diffusion region FD may include a junction capacitor Cj and an additional capacitor Cm, as shown in FIG. 5. The junction capacitor Cj represents a capacitor having a PN junction structure. The additional capacitor Cm is a capacitor that is additionally connected in addition to the junction capacitor Cj, and may be, for example, a MIM (Metal-Insulator-Metal) or a MOS capacitor.

In the case of the global shutter method, since a pixel corresponding to a row that is read out later, for example, a lower row, needs to store electric charges in the floating diffusion region FD for a long time, the possibility of charge leakage increases. Accordingly, the output voltage of the pixel corresponding to the lower row may drop, resulting in gradation in the image or fixed pattern noise (FPN). MIM capacitors can reduce gradation or FPN due to low charge leakage. In addition, the MIM capacitor can be used as a frame buffer because of low charge leakage.

The reset transistor P1 initializes the voltage of the photodiode PD, that is, the node ND1 based on the reset signal RX /, and the voltage of the floating diffusion region FD together with the transfer transistor P2 described later, That is, the voltage of the node ND2 is initialized. In this embodiment, the reset transistor P1 may be a PMOS transistor, and is turned on when the reset signal RX / is at a low level to reset the voltage of the photodiode PD to the power supply voltage VDD. Accordingly, since the voltage drop between the gate and the source of the reset transistor P1 does not occur, the node ND1 can be reset to the power supply voltage VDD, thereby reducing FPN.

The transfer transistor P2 connects the photodiode PD and the floating diffusion region FD based on the transfer control signal TX /. Accordingly, in the reset operation, the voltage of the node ND2 becomes equal to the voltage of the node ND1 reset to the power supply voltage VDD. In addition, during charge accumulation in the photodiode PD or after charge accumulation has ended, charge sharing occurs between the photodiode PD and the floating diffusion region FD. In this embodiment, the transfer transistor P2 may be a PMOS transistor, and is turned on when the transfer control signal TX / is at a low level to transfer charge accumulated in the photodiode PD to the floating diffusion region FD. . In this embodiment, since the voltage drop between the gate and the source of the transfer transistor P2 does not occur, the voltage of the node ND1 can be made equal to the voltage of the node ND2, thereby reducing FPN.

The selection transistor P3 drives the conversion transistor N1 based on the selection control signal LS /. In this embodiment, the selection transistor P3 may be a PMOS transistor, and like the reset transistor P1 and the transfer transistor P2, FPN may be reduced.

The conversion transistor N1 generates the output voltage Vout at the node ND3 according to the amount of charge at the node ND2. The output voltage Vout may be output as a video signal from a Correlated Double Sampling (CDS) unit.

FIG. 6 is a diagram exemplarily showing a timing diagram for the driving signals of FIG. 5.

In FIG. 6, the value in the right parenthesis of the driving signals RX /, TX /, LS / represents the row of the pixel to which the driving signals RX /, TX /, LS / are applied. For example, RX / (n) represents the reset signal RX / applied to the pixel corresponding to the n-th row, and RX / (n + 1) is reset applied to the pixel corresponding to the n + 1-th row. Signal RX /. In addition, it is assumed that the reset signal RX /, the transfer control signal TX /, and the selection signal LS / according to the present embodiment are low enable signals that are enabled when they are at a low level.

First, driving signals applied to the pixel corresponding to the n-th row will be described.

5 and 6, the reset signal {RX / (n)} of the n-th row and the transfer control signal {TX / (n)} of the n-th row become low levels during T0 to T1. Accordingly, the reset transistor P1 and the transfer transistor P2 are turned on, and the voltages of the nodes ND1 and ND2 are reset to the power supply voltage VDD.

In T2 to T3, the reset signal {RX / (n)} of the n-th row and the transfer control signal {TX / (n)} of the n-th row become low again. After T1, since there is a time interval from the photodiode PD to T3 where the accumulation of charge occurs, a voltage may change in the node ND1 or the node ND2. By performing the reset operation once more before the exposure time T3, it is possible to ensure that the voltages of the nodes ND1 and ND2 become the power supply voltage VDD.

T3 to T5 are exposure times (integration time) of the photodiode PD. Accordingly, charges generated by photoelectric conversion are generated in the photodiode PD and accumulate inside the photodiode PD.

In this embodiment, the image sensor 100 may obtain a high exposure frame and a low exposure frame by controlling the exposure time by adjusting T3 or T3 and T2.

The exposure of the photodiode PD is terminated at T5, and the transfer control signal {TX / (n)} becomes low level during T4 to T5. Accordingly, the transfer transistor P2 is turned on, and the charge accumulated in the photodiode PD is shared with the floating diffusion region FD.

At T5, the transfer control signal TX / (n) transitions to a high level, and charge sharing is ended.

At T6, the selection signal {LS / (n)} becomes low level, and accordingly, the selection transistor P3 and the conversion transistor N1 are driven to output the output voltage Vout. The output voltage Vout at this time is indicated as the signal voltage Vsig.

At T7, the output voltage Vout is read out by the CDS, and at this time, the readout output voltage Vout is indicated as the signal voltage Vsig (n).

During T8 to T9, the reset signal {RX / (n)} and the transfer control signal {TX / (n)} become low level to reset the voltages of the nodes ND1 and ND2 to the power supply voltage VDD.

In T9, the reset signal RX / (n) and the transfer control signal {TX / (n)} are shifted to a high level to turn off the reset transistor P1 and the transfer transistor P2.

At T10, the output voltage Vout is read out by the CDS, and at this time, the readout output voltage Vout is indicated as the reference voltage Vref (n).

* Although not shown, the CDS generates an image signal for the n-th row based on the difference between the signal voltage Vsig (n) and the reference voltage Vref (n).

Next, driving signals applied to the pixel corresponding to the n + 1th row will be described.

The timing diagram of the driving signals applied to the pixel corresponding to the n + 1th row applied during T0 to T5 is the same as the timing diagram of the driving signals applied to the pixel corresponding to the nth row.

5 and 6, the reset signal {RX / (n + 1)} of the n + 1 th row and the transfer control signal {TX / (n +) of the n + 1 th row during T0 to T1 and T2 to T3 1)} becomes a low level, and a reset operation is performed. During T4 to T5, a transfer control signal {TX / (n + 1)} becomes a low level, and a charge sharing operation is performed.

After the read operation for the n-th row is ended during T6 to T11, the selection signal {LS / (n + 1)} at T12 becomes a low level, and accordingly, the selection transistor of the pixel corresponding to the n + 1th row (P3) and the conversion transistor N1 are driven to output the output voltage Vout.

At T13, the output voltage Vout of the pixel corresponding to the n + 1th row is read out by the CDS, and the output voltage Vout at this time is expressed as Vsig (n + 1).

During T14 to T15, the reset signal {RX / (n + 1)} and the transfer control signal {TX / (n + 1)} of the pixel corresponding to the n + 1th row become low level and the voltages of the nodes ND1 and ND2 The power supply voltage is reset to VDD.

In T15, the reset signal {RX / (n + 1)} and the transfer control signal {TX / (n + 1)} transition to a high level, and the reset transistor P1 and transfer transistor of the pixel corresponding to the n + 1th row are shifted. Turn (P2) off.

At T16, the output voltage Vout is read out by the CDS, and the output voltage at this time is referred to as a reference voltage Vref (n + 1).

By shifting the selection signal {LS / (n + 1)} to a high level in T17, the read operation for the pixel corresponding to the n + 1th row is ended.

Referring to FIG. 6, in the image sensor 100 according to an embodiment of the present invention, operations during T0 to T5, that is, reset operation of the photodiode PD, exposure operation of the photodiode, and charge sharing operation are all low Against. Then, read operations for each row are sequentially performed. That is, a read operation is performed for the nth row during T6 to T11, and a read operation is performed for the n + 1th row for T12 to T17. In other words, the image sensor according to the present embodiment operates in a global shutter method.

In the case of the global shutter method, after the exposure operation is simultaneously performed, since the read operation is sequentially performed from the front row to the rear row, leakage of charge occurs in the pixel corresponding to the rear row, resulting in FPN and Gradients may occur. According to the exemplary embodiment of the present invention, since the MIM capacitor having less leakage of charge is used, FPN can be reduced even if the global shutter method is used.

FIG. 7 is a diagram exemplarily showing a timing diagram for the driving signals of FIG. 5.

Referring to FIG. 7, the reset signals {RX / (n), RX / (n + 1)} and the transmission control signals {TX / (n), TX / (n + 1)} during T0 to T1 are set to a low level. Then, after transitioning from T1 to a high level, the high level is maintained during the reset period. In this embodiment, the operation during T2 to T3 is the same during T1 to T4, so the operation during T2 to T3 is omitted.

In this embodiment, the image sensor 100 may obtain a high exposure frame and a low exposure frame by controlling the exposure time by adjusting T1.

8 is a diagram illustrating a timing diagram for the driving signals of FIG. 5 by way of example.

Referring to FIG. 8, a reset signal {RX / (n)}, a transfer control signal {TX / (n)} applied to a pixel corresponding to an n-th row during T0 to T3, and a pixel corresponding to an n + 1-th row The reset signal {RX / (n)} applied to and the transfer control signal {TX / (n)} become low level. That is, in FIG. 7, the reset time is increased from T0 to T3 in this embodiment, compared to the reset time from T0 to T1. At this time, the image sensor 100 may obtain a high exposure frame and a low exposure frame by controlling the exposure time by adjusting T3.

9 is a diagram illustrating a timing diagram for the driving signals of FIG. 5 by way of example.

Referring to FIG. 9, operations of T0 to T3 are the same as in FIG. 9.

At T3, the reset signals {RX / (n), RX / (n + 1)} transition to a high level, and the transfer control signals {TX / (n), TX / (n + 1)} maintain a low level. . Accordingly, during the exposure time of T3 to T4, the transfer transistor P2 of the n-th row and the n + 1-th row is turned on, and charge sharing occurs between the photodiode PD and the floating diffusion region FD. . This is different from performing the exposure operation of the photodiode PD during T3 to T4 in FIG. 9, and then performing charge sharing during T4 to T5 thereafter. FIG. 10 shows that the transfer control signals {TX / (n), TX / (n + 1)} are different when performing the reset operation of FIG. 9, but performing the reset operation of FIGS. 7 and 8 It can also be applied.

10 is a circuit diagram illustrating the structure of a pixel according to another embodiment of the image sensor of FIG. 1.

Referring to FIG. 10, the pixel further includes an isolation transistor N2 between the node ND1 and the node ND4 to which the photodiode PD is connected compared to the pixel of FIG. 5.

The gate of the isolation transistor N2 is connected to the power supply voltage supply line VDD. Since the isolation transistor N2 is connected between the photodiode PD and the node ND1, the photodiode PD and the node are connected, for example, when the photodiode PD and the node ND1 are connected by a metal line. The parasitic capacitance between ND1 can be reduced.

11 is a timing diagram for explaining the operation of the isolation transistor N2 of FIG. 10.

In FIG. 11, the reset signal RX / and the transfer control signal TX / are applied according to the embodiment of FIG. 9. In FIG. 11, V1 represents the voltage of the node ND1, and V4 represents the voltage of the node ND4.

10 and 11, before T3, a low level reset signal RX / and a transfer control signal TX / are applied. Accordingly, the reset transistor P1 is turned on, and the voltage V1 of the node ND1 is reset to the power supply voltage VDD. When the voltage difference between the gate and the source of the isolation transistor N2 is Vth, the voltage V4 of the node ND4 becomes VDD-Vth.

As T3 starts to expose the photodiode PD, charges accumulate on the node ND4. At this time, the isolation transistor N2 operates in a saturation mode. Therefore, the charge accumulated in the source of the isolation transistor N2 moves to the drain of the isolation transistor N2, thereby reducing the voltage V1 of the node ND1.

When the voltage V1 of the node ND1 in Ta becomes VDD-Vth and becomes equal to the voltage V4 of the node ND4, the isolation transistor N2 starts operating in the linear mode. Therefore, the potentials of the node ND4 and the node ND1 are reduced together by the charge accumulated in the node ND4.

Subsequent readout operations are the same as in FIG. 9 and will be omitted.

As described above, even when the isolation transistor N2 is inserted, when the exposure time elapses to a certain extent (that is, after Ta), the voltage V1 of the node ND1 reflects the voltage of the photodiode PD, that is, the voltage V4 of the node ND4. Meanwhile, parasitic capacitance may occur due to a reason that the node ND4 connected to the photodiode PD and the node ND1 are connected by a metal line. According to this embodiment, by inserting the isolation transistor N2 between the node ND4 and the node ND1, it is possible to reduce such parasitic capacitance.

12 is a view showing the structure and operation of a photodiode according to an embodiment of the present invention. Here, (a) is a view showing a cross section of the photodiode PD of FIG. 5 or 10, and (b) and (c) are diagrams for explaining the operation of the photodiode PD.

Referring to (a) of FIG. 12, the photodiode PD includes a P-type substrate 810, a first photodiode N-type (PDN) region 820 formed on the P-type substrate 810, and a second It may include a PDN region 830, a photo diode P-type (PDP) region 840 and a contact 850. The contact 850 may be connected to the node ND1 to which the reset transistor P1 and the transfer transistor P2 are connected through a metal line.

In this embodiment, the second PDN region 830 may be a region having a higher doping concentration than the first PDN region 820, that is, an n + region. For example, the doping concentration of the second PDN region 830 may be 1E15 level, and the doping concentration of the first PDN region 820 may be 1E12 level. As described above, the pin voltages of the first PDN region 820 and the second PDN region 830 may be set by adjusting the doping concentrations of the first PDN region 820 and the second PDN region 830. For example, the pin voltage of the first PDN region 820 may be lower than the power voltage, and the pin voltage of the second PDN region 830 may be higher than the power voltage VDD.

In this embodiment, the area of the second PDN area 830 may be smaller than the area of the first PDN area 820. For example, the photodiode PD may have an area of 50 μm to 50 μm, and the second PDN region 830 may have an area of 1 μm to 1 μm.

12 (b) and 12 (c), the pin voltage Vpin1 of the first PDN region 820 is 0.5V, the power supply voltage VDD is 3.0V, and the pin voltage Vpin2 of the second PDN region 830 is 3.0V or more. Is assumed.

When the power voltage VDD of 3.0V is applied to the contact 850 in the reset state, the voltage of the first PDN region 820 is 0.5V, which is the pin voltage Vpin1, and the voltage of the second PDN region 830 is the power voltage VDD. 3.0V.

The charge generated in the photodiode PD accumulates in the second PDN region 830 where the voltage is high, as shown in the gray region in FIG. 12B, so that the voltage in the second PDN region 830 gradually increases. Lowered. After the voltage of the second PDN region 830 reaches the pin voltage Vpin1 of the first PDN region 820, that is, 0.5V, the generated charge is the first PDN region (as indicated by the gray region of FIG. 12 (c)). 820) and the second PDN region 830.

As described above, in the section (1) where the output voltage of the photodiode PD is VDD to Vpin1, it operates as a capacitance corresponding to the area of the second PDN region 830, and in the section (2) of Vpin1 to 0V, the first PDN The area 820 and the second PDN area 830 operate as capacitances corresponding to the entire area of the photodiode PD. Therefore, the photodiode PD according to the present embodiment adjusts the pin voltage Vpin1 of the first PDN region 820 by adjusting the doping concentration of the first PDN region 820, and accordingly, the capacitance of the photodiode PD. Can be adjusted.

13 is a graph showing the relationship between accumulation time and output voltage in the structure of the photodiode of FIG. 12.

In FIG. 13, section (1) corresponds to section (1) of FIG. 12 (b), that is, a section in which the voltage of the photodiode is 3.0 to 0.5V, and section (2) in FIG. 13 is section (c) of FIG. Corresponds to the section (2), that is, the section where the voltage of the photodiode is 0.5 to 0V.

Referring to FIG. 13, the slope of section 1 in which the output voltage of the photodiode PD is VDD to Vpin1 is greater than the slope in section 2 of the Vpin1 to 0V of the photodiode PD. That is, it can be seen that the capacitance of section (1) is smaller than that of section (2).

14 is a view showing a metal wall and a metal shielding structure according to an embodiment of the present invention.

Referring to FIG. 14, the pixel includes a reset transistor P1, a transfer transistor P2, a floating diffusion region FD, a selection transistor P3, a conversion transistor N1, a current source Is, a photodiode PD, Metal wall and metal shielding. In the pixel, the reset transistor P1, the transfer transistor P2, the floating diffusion region FD, the selection transistor P3, the conversion transistor N1, and the current source Is are the same as in FIG. 5, and the photodiode PD Since the structure is the same as that of FIG. 12 (a), description thereof is omitted.

The metal wall has a structure surrounding the photodiode PD. By doing so, it is possible to block light coming from the side and improve optical crosstalk.

Metal shielding surrounds the side and top surfaces of the portion except for the photodiode PD, that is, the reset transistor P1, the transfer transistor P2, the selection transistor P3, the conversion transistor N1, and the floating diffusion region FD. It has a structure. Accordingly, even when the time in which the charge is stored in the floating diffusion region FD during operation in the global shutter method is long, the junction regions of the transistors P1, P2, P3, and N1 do not react to light, thereby distorting data. Can be prevented.

The pixel according to this embodiment includes a metal line connecting the photodiode PD and the node ND1. In other words, the pixel has a structure in which the photodiode PD and the node ND1 are separated by a metal line. Accordingly, the metal wall and the metal line may have a structure through which the metal line passes.

15 is a configuration diagram briefly showing a configuration in an image sensing device according to another embodiment of the present invention.

The image sensing device of FIG. 15 may include an image sensor 300 and an optical deviation compensation unit 400.

The image sensor 300 detects the strength and weakness of the optical image reflected from the subject (fingerprint), and generates and outputs a raw image frame FRAME_SOURCE converted to digital image data. At this time, the image sensor 300 may continuously generate and output a plurality of original image frames FRAME_SOURCE by performing continuous shooting on the same fingerprint. The image sensor 100 may be a black and white image sensor for fingerprint sensing in which a color filter is not formed on the pixel array. In addition, the image sensor 300 may include the structure of FIGS. 5 or 10 described above.

The optical deviation compensation unit 400 corrects each pixel of the original image frame FRAME_SOURCE output from the image sensor 300 to generate a final image frame FRAME_F. At this time, the optical deviation correction unit 400 corrects each pixel value of the original image frame FRAME_SOURCE to a value obtained by subtracting the average value (average pixel value) or minimum value of pixels within a predetermined range including the pixel from the corresponding pixel value. You can. For example, the optical deviation compensation unit 400 is the same as the method of correcting each pixel value of the high-exposure image frame or the low-exposure image frame in the optical deviation compensation unit 200 of FIG. 1 described above. You can correct them. Particularly, when the image sensor 300 continuously outputs a plurality of original image frames FRAME_SOURCE, the optical deviation compensation unit 400 continuously corrects each original image frame FRAME_SOURCE and then corrects the original image frame. These may be added to generate one final image frame (FRAME_F).

The image sensing device may also be applied to the display device of FIG. 2.

The above description is merely illustrative of the technical idea of the present invention, and those skilled in the art to which the present invention pertains may make various modifications and variations without departing from the essential characteristics of the present invention.

Therefore, the embodiments disclosed in the present invention are not intended to limit the technical spirit of the present invention, but to explain, and the scope of the technical spirit of the present invention is not limited by these embodiments. The scope of protection of the present invention should be interpreted by the claims below, and all technical spirits within the scope equivalent thereto should be interpreted as being included in the scope of the present invention.

Claims (4)

A photo diode connected between the ground and the first node;
A reset transistor which is connected between the power supply voltage supply line and the second node, and resets the second node to a power supply voltage according to a reset signal applied to the gate in a reset period;
A transfer transistor connected between the second node and the floating diffusion region and turned on or off according to a transfer control signal applied to a gate; And
It is connected between the first node and the second node, the gate includes an isolation transistor that is always connected to the power supply line,
The transfer transistor
The floating diffusion region is reset in the reset period, and the charge of the second node is transferred to the floating diffusion region in the exposure period,
The isolation transistor
An image sensing device that allows the first node and the second node to have the same voltage level after a certain period of time has elapsed after the exposure period starts. The method according to claim 1, wherein the transfer transistor
An image sensing device that is turned on in the reset period to electrically connect the floating diffusion region to the second node, and to maintain the electrical connection between the floating diffusion region and the second node even in the exposure period. The method according to claim 1, wherein the isolation transistor
The image sensing device for maintaining the voltage of the first node to be lower than the voltage of the second node for the predetermined time after the exposure period starts. The method according to claim 3, wherein the isolation transistor
The image sensing device characterized in that the voltage of the first node is maintained at a level equal to the power supply voltage minus its gate-source voltage for the predetermined time.

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