KR102093022B1 - Time domain continuous-time delta-sigma modulator and method of driving the same - Google Patents

Abstract

Disclosed is a continuous time delta sigma modulator capable of maintaining a quantum level even when the supply voltage is lowered and a driving method thereof. The continuous time delta sigma modulator outputs a digital value according to an integral part, a phase difference detector that detects the phase difference between the positive and negative integral signals output from the integral part and outputs a PWM signal, and a PWM signal output from the phase difference detector. It includes a quantizer. Here, the quantizer converts the pulse width of the PWM signal to the digital value.

Description

TIME DOMAIN CONTINUOUS-TIME DELTA-SIGMA MODULATOR AND METHOD OF DRIVING THE SAME

The present invention relates to a time domain continuous time delta sigma modulator and a driving method thereof.

The conventional continuous time delta sigma modulator used a voltage-domain quantizer that converts voltage to digital code.

In the case of using a voltage-domain quantizer, the lower the supply voltage, the smaller the range of the voltage representing one quantum level, but the range of the voltage representing one quantum level cannot be reduced indefinitely due to the influence of noise. Limited number of levels that can be expressed

In addition, when the quantum level decreases and the quantum noise increases, the noise in the low-frequency region moves to the high-frequency region due to the noise-shaping characteristics of the continuous-time delta sigma modulator, thereby increasing the noise in the high-frequency region by the increased noise floor. The dynamic range of the output decreases. Lowering the coefficients of the loop filter to reduce noise in the high frequency region can degrade the performance of the continuous time delta sigma modulator.

KR 1742131 B

The present invention provides a continuous time delta sigma modulator capable of maintaining a quantum level even when the supply voltage is lowered and a driving method thereof.

In order to achieve the above object, a continuous time delta sigma modulator according to an embodiment of the present invention includes an integrating unit; A phase difference detector for detecting a phase difference between a positive integration signal and a negative integration signal output from the integration unit and outputting a PWM signal; And a quantizer outputting a digital value according to the PWM signal output from the phase difference detector. Here, the quantizer converts the pulse width of the PWM signal to the digital value.

A continuous time delta sigma modulator according to another embodiment of the present invention includes a first integrator for outputting a first integral signal; A second integrating unit outputting a positive integrating signal and a negative integrating signal according to the first integrating signal output from the first integrating unit; A phase difference detector detecting a phase difference between the positive and negative integral signals and outputting a PWM signal; And a quantizer outputting a digital value according to the PWM signal output from the phase difference detector. Here, the quantizer converts the pulse width of the PWM signal to the digital value.

A continuous time delta sigma modulator driving method according to an embodiment of the present invention comprises: integrating a difference between an input voltage or an input current and a feedback signal to output a positive integral signal and a negative integral signal; Detecting a phase difference between the output positive and negative integration signals and outputting a PWM signal; And converting the pulse width of the output PWM signal to a digital value. Here, the feedback signal corresponds to the digital value.

The continuous time delta sigma modulator according to the present invention can generate a PWM signal using a VCO and a phase difference detector and convert the pulse width of the generated PWM signal to a digital value. As a result, it is possible to maintain the quantum level even at a low supply voltage.

1 is a block diagram showing a continuous time delta sigma modulator according to an embodiment of the present invention.
FIG. 2 is a diagram schematically showing a circuit structure of the continuous time delta sigma modulator of FIG. 1.
FIG. 3 is a timing diagram showing signal flow in the continuous time delta sigma modulator of FIG. 2.
4 is a block diagram showing the structure of a continuous time delta sigma modulator according to another embodiment of the present invention.
5 is a view showing an integral part of a continuous time delta sigma modulator according to another embodiment of the present invention.

The singular expression used in this specification includes the plural expression unless the context clearly indicates otherwise. In this specification, the terms "consisting of" or "comprising" should not be construed as including all of the various components, or various steps described in the specification, among which some components or some steps It may not be included, or it should be construed to further include additional components or steps. In addition, terms such as “... unit” and “module” described in the specification mean a unit that processes at least one function or operation, which may be implemented in hardware or software, or a combination of hardware and software. .

The present invention relates to a continuous-time delta-sigma modulator, and it is possible to maintain a quantum level even at a low supply voltage through a method of converting a pulse width to a digital value.

According to one embodiment, the continuous time delta sigma modulator of the present invention uses a GRO quantizer (Gated Ring Oscillator Quantizer), the GRO quantizer can convert the pulse width of the PWM signal (Pulse Width Modulation signal) to a digital value . That is, the GRO quantizer may operate during a high logic period of the PWM signal and output a digital value proportional to the high logic period. As a result, even if the supply voltage is low, the quantum level that can be expressed may not decrease. That is, the continuous time delta sigma modulator can maintain a quantum level even at a low supply voltage.

Hereinafter, various embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a block diagram showing a continuous time delta sigma modulator according to an embodiment of the present invention, FIG. 2 is a schematic diagram showing a circuit structure of the continuous time delta sigma modulator of FIG. 1, and FIG. 3 is FIG. 2 Is a timing diagram showing the signal flow in the continuous time delta sigma modulator. However, the digital analog converter (DAC) 106 is omitted for convenience of description in FIG. 2.

Referring to FIG. 1, the continuous time delta sigma modulator of this embodiment may include an integrator 100, a phase difference detector 102, a quantizer 104 and a DAC 106.

The integrator 100 outputs an integral signal using an input voltage V _IN and a feedback voltage, that is, a voltage (V _DAC , analog signal) output from the DAC 106.

According to an embodiment, the integrator 100 may include a first VCO (first voltage controlled oscillator 200) and a second VCO 202 having an integral function.

The first VCO 200 integrates the difference between a positive input voltage (V _INP ) and a positive feedback voltage (analog signal, V _DACP ) output from the DAC 106, and thus a positive integral signal (VCO _OUTP ) The second VCO 202 uses a negative input voltage (V _INN ) and a negative feedback voltage (analog signal, V _DACN ) output from the DAC 106 to generate a negative integral signal (VCO). _OUTN ) can be output. Here, the positive input voltage V _INP and the negative input voltage V _INN may have a phase difference of 180 degrees.

The positive integral signal VCO _OUTP output from the first VCO 200 and the negative integral signal VCO _OUTN output from the second VCO 202 are shown in FIG. 3.

The phase difference detector 102 may be, for example, a phase frequency detector (PFD) or a phase detector, a positive integral signal (VCO _OUTP ) and a second output from the first VCO 200. The phase difference of the negative integral signal VCO _OUTN output from the VCO 202 may be detected, and a signal T _IN having a detection result may be output.

According to an embodiment, the signal T _IN output from the phase difference detector 102 may be a PWM signal as illustrated in FIG. 3.

The quantizer 104 outputs a digital value D _OUT based on a clock (CLK) input according to the PWM signal T _IN output from the phase difference detector 102, and may be, for example, a GRO quantizer have. That is, the continuous time delta sigma modulator of the present invention can use a time-domain quantizer 104 that converts the pulse width to a digital value without using a voltage-domain quantizer to convert the voltage to a digital value. In the conventional continuous time delta sigma modulator, a voltage-domain quantizer was used.

According to an embodiment, the digital value D _OUT may mean the number of rising edges in the waveform of FIG. 3.

The DAC 106 may convert the output D _OUT of the quantizer 104 to analog to output an analog signal (feedback signal, V _DAC ). Here, the analog signal (feedback signal, V _DAC ) is used as an input of the integrator 100.

In summary, the continuous time delta sigma modulator of the present embodiment can generate a PWM signal using a VCO and a phase difference detector 102 and convert the pulse width of the PWM signal to a digital value. As a result, the quantum level can be maintained even when the supply voltage of the continuous time delta sigma modulator is lowered. Therefore, even if the supply voltage of the continuous time delta sigma modulator decreases as the process develops, the continuous time delta sigma modulator can maintain performance.

Meanwhile, although only one stage is illustrated in FIG. 2, it may be composed of multiple stages.

4 is a block diagram showing the structure of a continuous time delta sigma modulator according to another embodiment of the present invention.

4, the continuous time delta sigma modulator of the present embodiment includes a first integrator 400, a second integrator 402, a third integrator 404, a phase difference detector 406, and a quantizer 408. And a DAC 410.

The first integrator 400 may include, for example, a VCO, and output a first integral signal generated by integrating the difference between the input voltage V _IN and the output voltage of the DAC 410.

The second integrating unit 402 includes, for example, a VCO, and may output a second integrating signal generated by integrating the difference between the first integrating signal and the output voltage of the DAC 410.

The third integrating unit 404 includes, for example, a VCO, and a third integrating signal (positive third integrating signal and negative) generated by integrating the difference between the second integrating signal and the output voltage of the DAC 410. (3rd integral signal).

The structure of each integral part 400, 402 and 404 is the same or similar to the integral part 100 of FIG.

The phase difference detector 406 detects the phase difference between the positive third integral signal and the negative third integral signal and outputs a PWM signal having a detection result.

The quantizer 408 is, for example, a GRO quantizer, and can convert the pulse width of the PWM signal to a digital value (D _OUT ).

The DAC 410 may convert the digital value D _OUT output from the quantizer 410 to an analog signal and provide the output V _DAC to the integrators 400, 402 and 404, respectively.

In summary, the continuous time delta sigma modulator of the present embodiment includes a plurality of integrating parts, and each of the integrating parts may include a VCO having an integral function.

Above, although the continuous time delta sigma modulator is shown as including three integrating parts, two or more are sufficient.

5 is a view showing an integral part of a continuous time delta sigma modulator according to another embodiment of the present invention. However, components other than the integral part are similar to FIG. 2 or FIG. 4 and are not shown.

Referring to FIG. 5, the integral part of the amount included in the integral part of the present embodiment is a first current-controlled oscillator (CCO, 500) and a first control part 510 as shown in FIG. 5A. ), And the negative integration unit may include a second current control oscillator 502 and a second adjustment unit 512 as illustrated in FIG. 5B.

As shown in FIG. 2, when one integrator is used, the first current control oscillator 500 receives a positive integrating signal ((A) as the input current (I _INP ) and the output of the quantizer (D _OUTP ) are input as the positive integrator. CCO _OUTP ) is output, and as the input current (I _INN ) and the output of the quantizer (D _OUTN ) are input to the negative integral part, the second current control oscillator 502 outputs the negative integral signal (CCO _OUTN ). You can.

Here, the magnitudes of the integral signals CCO _OUTP and CCO _OUTN output from the current controlled oscillators 500 and 502 may be controlled by the adjusting units 510 and 512.

Each of the control units 510 and 512 may have a structure in which circuits in which a transistor (for example, an NMOS transistor) and a current source are connected in series are connected in parallel, as illustrated in FIG. 5.

As a result, the more the output (D _OUTP ) of the quantizer contains 1, the more the current (500 or 502) can flow to the CCO by turning on the transistors.

When a plurality of integral parts are used as shown in FIG. 4, the first current control oscillator 500 receives a positive integral signal as the input current (I _INP ) and the output of the integral part (PWM _INP ) of the previous integral part are input as the positive integral part. The second current control oscillator 502 outputs the negative integral signal (CCO _OUTN ) as (CCO _OUTP ) is output and the input current (I _INN ) and the output of the previous integral part (PWM _INN ) are input as the negative integral part. Can print

Of course, the integrating parts may include a control part having CCO and transistors and current sources. The wider the pulse width of the output of the integral part of the front end (PWM _INN ), the longer the CCO flows.

The phase difference detector may detect the phase difference between the integral signals CCO _OUTP and CCO _OUTN output from the integrating unit and output a PWM signal including the detection result.

The quantizer is, for example, a GRO quantizer, and may output a digital value according to the PWM signal.

In summary, the continuous time delta sigma modulator of the present embodiment can use CCO rather than VCO as an integral part.

Looking at the continuous time delta sigma modulator driving method, the driving method integrates a difference between an input voltage or an input current and a feedback signal to output a positive integral signal and a negative integral signal, and the output positive integral signal and a negative integral signal And detecting a phase difference of and outputting a PWM signal and converting the pulse width of the output PWM signal to a digital value.

Here, the integration is performed by VCO or CCO, and the pulse width of the PWM signal can be converted to a digital value by a GRO quantizer.

On the other hand, the components of the above-described embodiments can be easily grasped from a process point of view. That is, each component can be identified by each process. Also, the process of the above-described embodiment can be easily grasped from the perspective of the components of the device.

The above-described embodiments of the present invention have been disclosed for purposes of illustration, and those skilled in the art having various knowledge of the present invention will be able to make various modifications, changes, and additions within the spirit and scope of the present invention. It should be regarded as belonging to the following claims.

100: integral part 102: phase difference detector
104: quantizer 106: DAC
200, 202: VCO

Claims (7)

An integrator having two voltage controlled oscillators (VCOs) or two current controlled oscillators (CCOs);
A phase difference detector which detects the phase difference between the positive and negative integration signals output from the VCOs or the CCOs and outputs a PWM signal; And
It includes a quantizer for outputting a digital value according to the PWM signal output from the phase difference detector,
The quantizer is a continuous time delta sigma modulator, characterized in that for converting the pulse width of the PWM signal to the digital value. The continuous time delta sigma modulator of claim 1, wherein the quantizer is a GRO quantizer. According to claim 1,
A digital-to-analog converter (DAC) for converting a digital value output from the quantizer into an analog signal,
The integrating unit is a continuous time delta sigma modulator characterized by integrating the difference between the input voltage and the analog signal output from the digital analog converter. A first integrator for outputting a first integral signal;
It has two voltage-controlled oscillators (VCOs) or two current-controlled oscillators (CCOs), and uses the VCOs or the CCOs to positively and negatively integrate the first integral signal output from the first integrator. A second integrating unit for outputting a signal;
A phase difference detector detecting a phase difference between the positive and negative integral signals and outputting a PWM signal; And
It includes a quantizer for outputting a digital value according to the PWM signal output from the phase difference detector,
The quantizer is a continuous time delta sigma modulator, characterized in that for converting the pulse width of the PWM signal to the digital value. 5. The continuous time delta sigma modulator of claim 4, wherein the quantizer is a GRO quantizer. According to claim 4,
Further comprising a digital-to-analog converter for converting the digital value output from the quantizer to an analog signal,
The first integrator generates a first integrated signal by integrating a difference between an input voltage and an analog signal output from the digital analog converter, and the second integrator integrates the difference between the first integrated signal and the analog signal to Continuous time delta sigma modulator, characterized by generating a positive integral signal and the negative integral signal.








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