KR101971071B1 - liquid crystal display device and manufacturing method of the same - Google Patents

Abstract

The present invention provides a method of manufacturing a thin film transistor, comprising: forming a thin film transistor on a first substrate; Forming a pixel electrode connected to the thin film transistor; Forming a protective layer covering the thin film transistor on the entire surface of the first substrate and having a compressive stress; Forming a black matrix and a color filter layer on a second substrate; Forming an outer seal pattern on an edge of the second substrate; And attaching the first substrate and the second substrate with the outer seal pattern interposed therebetween, wherein the protective layer has a stress intensity of 200 MPa to 350 MPa.

Description

[0001] The present invention relates to a liquid crystal display device and a manufacturing method thereof,

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device and a method of manufacturing the same.

A liquid crystal display device (LCD), which is actively used in TVs and monitors, exhibits a large contrast ratio and is advantageous for moving picture display. The liquid crystal display device (LCD) has optical anisotropy and polarization The image is displayed.

Such a liquid crystal display device has a liquid crystal panel in which a liquid crystal layer is formed between two opposing substrates as an essential component and changes the arrangement direction of the liquid crystal molecules in an electric field in the liquid crystal panel, .

The liquid crystal display device includes a process of manufacturing a lower array substrate on which a thin film transistor and pixel electrodes are arranged, a process of manufacturing an upper color filter substrate including a color filter and a common electrode, Attaching the filter substrate and attaching the polarizing plate. In order to increase the viewing angle of the liquid crystal display device, the common electrode may be formed on the arrange substrate.

In this case, productivity of the liquid crystal display device can be improved by forming a plurality of cells on a large-area substrate at once. In this case, a process of laminating the array substrate and the color filter substrate together and then cutting them into respective cells is required.

Hereinafter, the manufacturing process of the liquid crystal display device will be described in more detail with reference to FIG. 1 attached herewith.

1 is a flowchart showing a manufacturing process of a general liquid crystal display device.

First, an array substrate including a thin film transistor and a pixel electrode in each of a plurality of cell regions is completed (ST12), and a color filter substrate including color filters in each of a plurality of cell regions is completed (ST14).

Next, a first alignment film and a second alignment film are formed on the array substrate and the color filter substrate, respectively, to determine the initial alignment direction of the liquid crystal molecules (ST22 and ST24).

The formation of the alignment film comprises a step of applying the polymer thin film and arranging the alignment film in a predetermined direction. In general, polyimide-based organic materials are mainly used for the alignment layer, and a rubbing method or a photo-alignment method is used for aligning the alignment layer.

Next, a liquid crystal layer is formed on the array substrate (ST32). At this time, the liquid crystal layer may be formed by a dropping method in which the liquid crystal material is dropped on the substrate at regular intervals.

On the other hand, a seal pattern is formed on the color filter substrate (ST34). The seal pattern serves to prevent leakage of the liquid crystal material, and one seal pattern corresponds to one cell region.

Next, the array substrate and the color filter substrate are arranged so that the liquid crystal layer and the seal pattern are positioned between the two substrates, and the seal pattern is cured by pressure, and then adhered (ST40).

Then, the two substrates are cut into individual cells and separated (ST50). The cell cutting process consists of a scribe process for forming a cut line on the surface of a glass substrate with a diamond pen having a hardness higher than that of the glass substrate, and a break process for cutting off by applying a force. At this time, the position where the cutting line is to be formed is confirmed by a scribing key.

When a liquid crystal cell is manufactured and a polarizing plate is attached to the outside of the liquid crystal cell, and then a driving circuit is connected, a liquid crystal panel is completed.

Such a liquid crystal panel is widely used as a screen of a portable device such as a notebook computer, a smartphone, or a tablet PC, and such a portable device is preferably small in volume and weight. Therefore, in order to reduce the thickness of the liquid crystal panel, a process of etching the exposed surfaces of the array substrate and the color filter substrate is performed before the two substrates are bonded together and then cut into each cell.

Such a substrate is etched using an etching solution, in which etching solution penetrates between the two substrates, thereby damaging the seal pattern or eroding the pad of each cell. Therefore, in order to prevent this, an outer seal pattern is formed at the edge of the substrate.

On the other hand, when both the pixel electrode and the common electrode are formed on the array substrate, no electrode is formed on the color filter substrate. Therefore, when the completed liquid crystal panel is in contact with the charged external object, the static electricity flowing through the color filter substrate can not be blocked. Such static electricity affects the arrangement of the liquid crystal molecules and the like, thereby deteriorating the image quality. To prevent this, a structure for forming a transparent rear electrode on a color filter substrate is used.

This will be described with reference to Figs. 2A to 2C.

FIGS. 2A to 2C schematically show cross-sectional views of a conventional liquid crystal display device in a manufacturing process, and include a process before cell cutting after adhesion between an array substrate and a color filter substrate.

An array substrate 10 on which an inner liquid crystal layer (not shown) is dropped and a color filter substrate (not shown) on which a large number of seal patterns (not shown) and an outer seal pattern 30 are formed 20). Here, the array substrate 10 and the color filter substrate 20 include a plurality of cells defined by a plurality of seal patterns, each of which is a liquid crystal display device, and the outer seal pattern 30 includes a plurality of seal patterns As shown in FIG.

However, in the conventional array substrate 10, the film formed on the inner surface receives a tensile stress and is pulled outward, and the edge thereof is bent in the direction opposite to the second substrate 20. The outer seal pattern 20 is pressed less and the outer seal pattern 20 is lifted from the array substrate 10 and the outer seal pattern 20 and the array substrate 10 are opened.

2B, in order to prevent the etching solution from penetrating into the gap formed between the outer seal pattern 20 and the array substrate 10, an adhesive 40 is applied to the outside of the outer seal pattern 30 Thereby sealing the space between the array substrate 10 and the color filter substrate 20. Then, the surfaces of the array substrate 10 and the color filter substrate 20 are etched using an etching solution. Therefore, the thickness of the array substrate 10 and the color filter substrate 20 becomes thin.

Next, as shown in FIG. 2C, the back electrode 50 is formed on the upper surface of the color filter substrate 20.

Then, the two substrates are cut into individual cells and separated

In such a conventional liquid crystal display device, an adhesive 40 (not shown) is inserted into the outer seal pattern 20 through a gap formed between the outer seal pattern 20 and the array substrate 10 due to lifting of the outer seal pattern 20, The penetration BA of the adhesive 40 covers the scribing key, so that the cell cutting is not easy.

The formation of the back electrode 50 is performed in a vacuum chamber of a low pressure and even if sealed by the adhesive 40, So that the substrate is broken.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a liquid crystal display device and a method of manufacturing the same that can improve deflection of a substrate to improve sticking adhesion of a seal pattern.

Another object of the present invention is to provide a liquid crystal display device and a method of manufacturing the same that can prevent penetration of an etchant solution during substrate surface etching and prevent substrate breakage.

According to an aspect of the present invention, there is provided a method of manufacturing a thin film transistor comprising: forming a thin film transistor on a first substrate; Forming a pixel electrode connected to the thin film transistor; Forming a protective layer covering the thin film transistor on the entire surface of the first substrate and having a compressive stress; Forming a black matrix and a color filter layer on a second substrate; Forming an outer seal pattern on an edge of the second substrate; And attaching the first substrate and the second substrate with the outer seal pattern interposed therebetween, wherein the protective layer has a stress intensity of 200 MPa to 350 MPa.

The method of manufacturing a liquid crystal display of the present invention further includes etching the surfaces of the first substrate and the second substrate which are bonded together.

The method of manufacturing a liquid crystal display of the present invention further includes forming a common electrode on the protective layer and forming a transparent rear electrode on the second substrate on which the surface is etched.

The protective layer is formed by supplying SiH4 gas, NH3 gas, and N2 gas into a vacuum chamber and depositing silicon nitride by applying RF power.

The RF power applied may be from 2700 W to 3000 W.

The flow rate ratio of the SiH4 gas and the NH3 gas to be supplied may be 3.0 to 3.3, and the flow rate of the NH3 gas is larger than the flow rate of the SiH4 gas.

The total flow rate of the SiH4 gas and the NH3 gas may be 3000 sccm.

The present invention also provides a liquid crystal display comprising: a first substrate and a second substrate spaced apart from each other; A thin film transistor formed on the inner surface of the first substrate; A pixel electrode connected to the thin film transistor; A protective layer formed on the entire surface of the first substrate and covering the thin film transistor and having compressive stress; A black matrix and a color filter layer formed on the inner surface of the second substrate; And an outer seal pattern formed at an edge between the first substrate and the second substrate, wherein the protective layer is made of silicon nitride and has a stress intensity of 200 MPa to 350 MPa.

The liquid crystal display of the present invention may further include a common electrode on the protection layer and a transparent rear electrode on the second substrate.

In the liquid crystal display device and the method of manufacturing the same according to the present invention, the protective layer on the first substrate is formed to receive compressive stress, so that the edge of the first substrate is bent in the direction of the second substrate. Accordingly, it is possible to prevent lifting between the outer seal pattern and the first substrate, thereby preventing the substrate from being broken due to low pressure when the back electrode is formed and preventing the adhesive from penetrating into the outer seal pattern, Cutting can be facilitated.

1 is a flowchart showing a manufacturing process of a general liquid crystal display device.
2A to 2C are schematic cross-sectional views of a conventional manufacturing process of a liquid crystal display device.
3 is a cross-sectional view illustrating one pixel region of a liquid crystal display device according to an embodiment of the present invention.
4A to 4F are cross-sectional views of the array substrate for a liquid crystal display according to an embodiment of the present invention at each step of the manufacturing process.
5A to 5C are schematic cross-sectional views illustrating a manufacturing process of a liquid crystal display device according to an embodiment of the present invention.

Hereinafter, a liquid crystal display device and a method of manufacturing the same according to embodiments of the present invention will be described in detail with reference to the accompanying drawings.

3 is a cross-sectional view of a liquid crystal display device according to an embodiment of the present invention, showing one pixel region.

As shown in FIG. 3, a gate electrode 122 is formed on the transparent first substrate 110. The first substrate 110 may be made of an insulating material such as glass.

The gate electrode 122 may be a single layer or multiple layers of a conductive material such as aluminum (Al), aluminum alloy (AlNd), copper (Cu), copper alloy, chromium (Cr), molybdenum (Mo), and molybdenum ≪ / RTI >

Although not shown, a gate wiring connected to the gate electrode 122 and extending along one direction is also formed on the substrate 110.

Next, a gate insulating layer 130 is formed on the entire upper surface of the gate electrode 122. The gate insulating layer 130 may be formed of silicon oxide or silicon nitride.

An active layer 142 is formed on the gate insulating layer 130 in correspondence with the gate electrode 122. Here, the active layer 142 may be formed of amorphous silicon, and an ohmic contact layer made of amorphous silicon doped with impurities may be further formed on the active layer 142.

The active layer 142 may be formed of an oxide semiconductor material, and an etch stopper may be further formed on the active layer 142.

On the other hand, a pixel electrode 152 is formed in a pixel region above the gate insulating layer 130. The pixel electrode 152 may be formed of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO).

A source electrode 164 and a drain electrode 166, which are spaced apart from each other and overlap the active layer 142, are formed on the active layer 142. Here, the drain electrode 166 also overlaps and contacts a part of the pixel electrode 152. The source electrode 164 and the drain electrode 166 are formed of a conductive material such as aluminum (Al), an aluminum alloy (AlNd), copper (Cu), a copper alloy, chromium (Cr), molybdenum (Mo), and molybdenum Or a multi-layered structure.

At this time, although not shown, a data line connected to the source electrode 164 is also formed, and the data line crosses the gate line to define the pixel region.

The gate electrode 122 and the active layer 142, the source electrode 164, and the drain electrode 166 form a thin film transistor.

A protective layer 170 is formed on the entire upper surface of the source electrode 164 and the drain electrode 166 and the protective layer 170 covers the source electrode 164 and the drain electrode 166 and the pixel electrode 152. The protective layer 170 may be made of silicon nitride and is subjected to compressive stress.

A common electrode 182 is formed on the entire upper surface of the passivation layer 170. The common electrode 182 is made of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO) (182a). In addition, the common electrode 182 may have an opening in the upper portion of the thin film transistor.

Although not shown, a first alignment layer is formed on the common electrode 182.

Meanwhile, the second substrate 210, which is transparent and spaced apart from the first substrate 110, is positioned. The second substrate 210 may be made of an insulating material such as glass.

A black matrix 222 is formed under the second substrate 210 in correspondence with the thin film transistor. The black matrix 222 may be made of a black resin.

A color filter layer 232 is formed under the black matrix 222 to correspond to the pixel region. The color filter layer 232 includes red, green, and blue color filter patterns that are sequentially arranged, and one color filter pattern corresponds to one pixel region.

An overcoat layer 240 is formed under the color filter layer 232 to cover and protect the black matrix 222 and the color filter layer 232. The overcoat layer 240 may be made of an organic insulating material.

Although not shown, a column spacer may be further formed under the overcoat layer 240.

A second alignment layer (not shown) is formed under the overcoat layer 240, and a liquid crystal layer is disposed between the first alignment layer and the second alignment layer.

Between the first substrate 110 and the second substrate 210, a seal pattern for preventing the leakage of the liquid crystal layer is formed corresponding to each cell region.

In the liquid crystal display device of the present invention, since the protective layer 170 under the compressive stress is formed on the entire surface of the first substrate 110, the first substrate 110 receives the force to be pulled inward, ) Direction. Therefore, it is possible to prevent the outer seal pattern from being pressed less and to prevent the outer seal pattern from being lifted.

An array substrate for a liquid crystal display including such a protective layer 170 will be described with reference to the drawings.

4A to 4F are cross-sectional views of the array substrate for a liquid crystal display according to an embodiment of the present invention at each step of the manufacturing process.

As shown in FIG. 4A, a conductive material such as metal is deposited on a transparent insulating substrate 110 such as glass by a method such as sputtering and patterned through a first mask process using an exposure mask to form a gate electrode 122 and a gate wiring (not shown) are formed.

Next, as shown in FIG. 4B, a gate insulating layer 130 is formed of an insulating material over the gate electrode 122 and the upper surface of the gate wiring (not shown). The gate insulating layer 130 may be formed by depositing silicon oxide or silicon nitride by plasma enhanced chemical vapor deposition (PECVD) or the like.

Next, a transparent conductive material is deposited on the gate insulating layer 130 by sputtering or the like, and patterned through a second mask process using an exposure mask to form the pixel electrode 152.

Next, as shown in FIG. 4C, amorphous silicon is deposited on the gate insulating layer 130 by a method such as PECVD and then patterned through a third mask process using an exposure mask to form the gate electrode 122 and the corresponding active layer (142).

Next, as shown in FIG. 4D, a conductive material such as metal is deposited on the active layer 142 and the pixel electrode 152 by a method such as sputtering, and is patterned through a fourth mask process using an exposure mask. A source electrode 164 and a drain electrode 166 and a data line (not shown) are formed. The data line is connected to the source electrode 164, and intersects the gate line to define the pixel region. The source electrode 164 and the drain electrode 166 are spaced apart from the active layer 142 and the drain electrode 166 is in contact with the pixel electrode 152.

4E, a protective layer 170 is formed of an insulating material on the source electrode 164 and the drain electrode 166, and the protective layer 170 is formed through a fifth mask process using an exposure mask. To expose a pad portion (not shown). The protective layer 170 may be formed by depositing silicon nitride by a method such as PECVD.

More specifically, the protective layer 170 is formed by supplying SiH4, NH3, and N2 gas into a vacuum chamber and depositing silicon nitride by applying RF power at a certain pressure. At this time, the compressive stress of the protective layer 170 formed depending on the deposition conditions, that is, the intensity of the applied RF power and the supplied NH3: SiH4 gas flow rate, is changed.

The stress intensity for receiving the compressive stress of the protective layer 170 is preferably about 200 MPa to 350 MPa. When the stress intensity is smaller than this range, the first substrate 110 does not sufficiently receive the force to be pulled inward, so that it is impossible to prevent lifting of the outer seal pattern. If the stress intensity is larger than this, Can be a problem.

In addition, depending on the deposition conditions, not only the compressive stress but also the deposition ratio, the deposition uniformity, the etching ratio, and the etching uniformity are changed. The deposition ratio is 34 or more, the deposition uniformity is 6% or less, the etching ratio is 42 or more, % Or less.

Table 1 shows the characteristics of Sample 1-9 (S1-S9) formed according to the deposition conditions. Here, the protective layer 170 is formed by changing the deposition conditions of the applied RF power and the NH 3: SiH 4 gas flow rate ratio, and the stress intensity, the deposition ratio, the deposition uniformity, the etching ratio, and the etching uniformity are measured according to the deposition conditions. At this time, the pressure inside the vacuum chamber is 1500 mtorr, the flow rate of N 2 gas is 10,500 sccm, and the total flow rate of NH 3 and SiH 4 gas is equal to 3000 sccm.

As shown in Table 1, in order to satisfy the preferable range of the stress intensity, the deposition ratio, the deposition uniformity, the etching ratio, and the etching uniformity, the applied RF power is preferably 2700 W to 3000 W and the NH 3: SiH 4 gas flow rate ratio is preferably 3.0 to 3.3 Do. Here, when the total flow rate of NH3 and SiH4 gas is increased, a haze characteristic may appear, which may cause a problem of lowering the permeability.

In addition, first and second buffer layers (not shown) having a thickness smaller than that of the protective layer 170 may be further formed under the protective layer 170. At this time, the first buffer layer and the second buffer layer are formed with different deposition conditions from the protective layer 170. For example, the first buffer layer may be formed by supplying 250 sccm of SiH4 gas, 10,500 sccm of N2 gas, and 10 seconds of applying RF power of 2000 W at a pressure of 1100 mtorr, and the second buffer layer may be formed by supplying 250 sccm of SiH4 gas, 1100 sccm of NH3 gas, By supplying N2 gas at 10500 sccm and applying RF power of 2000 W at a pressure of 1500 mtorr for about 7 seconds.

Next, as shown in FIG. 4F, a transparent conductive material is deposited on the protective layer 170 by a method such as sputtering, and is patterned through a sixth mask process using an exposure mask to form the common electrode 182 do. The common electrode 282 is formed on the entire surface of the substrate 110 and has a plurality of openings 182a corresponding to the pixel electrodes 152. [

As described above, in the array substrate for a liquid crystal display according to the embodiment of the present invention, deposition conditions of the protective layer 170 can be changed to form the protective layer 170 to receive compressive stress.

The array substrate is adhered to the completed color filter substrate, the surface treatment process is performed, and the process of cutting into individual cells is performed to manufacture a liquid crystal display device, which will be described with reference to the drawings.

5A to 5C are cross-sectional views schematically illustrating a manufacturing process of a liquid crystal display device according to an embodiment of the present invention, and include a process before cell cutting after adhesion between an array substrate and a color filter substrate.

A first substrate 110 on which an inner liquid crystal layer (not shown) is dropped and a second substrate 110 on which a plurality of seal patterns (not shown) and an outer seal pattern 300 are formed, (210). Here, the first substrate 110 and the second substrate 210 include a plurality of cells defined by a plurality of seal patterns, each of which is a liquid crystal display device. In addition, the outer seal pattern 300 is formed to surround a plurality of seal patterns.

A plurality of seal patterns and outer seal patterns are formed by forming a thermosetting resin in a predetermined pattern, and can be formed by a screen printing method using a screen mask and a seal dispenser method using a dispenser.

Although not shown, a thin film transistor, a pixel electrode, a common electrode, and a first alignment layer are formed on the inner surface of the first substrate 110, and a black matrix, a color filter layer, an overcoat layer, 2 orientation film is formed.

A protective layer 170 is formed on the entire surface of the first substrate 110 to receive a compressive stress. Accordingly, the edge of the first substrate 110 is bent in the direction of the second substrate 210, and the outer seal pattern 300 is adhered to the first substrate 110 without lifting.

Next, as shown in FIG. 5B, an adhesive 400 is applied to the outside of the outer seal pattern 300 to seal between the first substrate 110 and the second substrate 210, 1, the surfaces of the substrate 110 and the second substrate 210 are etched. Accordingly, the thicknesses of the first substrate 110 and the second substrate 210 are reduced.

A glass substrate is mainly used for the first substrate 110 and the second substrate 210, and about 60% of silicon oxide (SiO ₂ ) is contained in the glass substrate. Therefore, the surfaces of the first and second substrates 110 and 210 can be etched by putting the oxide film (SiO ₂ ) into the HF solution used for etching.

The etching solution remaining on the surfaces of the first and second substrates 110 and 210 may be cleaned and dried.

Meanwhile, before etching the surfaces of the first substrate 110 and the second substrate 210, a process of removing impurities that may occur in a previous step may be performed. If impurities are present on the outer surface of the substrate, an etching failure such as the substrate not being etched around the impurities is caused, and the surface of the etched substrate becomes uneven. Therefore, it is preferable to remove impurities existing on the outer surface of the substrate by using isopropyl alcohol or deionized water, which is a cleaning liquid, in order to prevent diffuse reflection or refraction of light .

Next, as shown in FIG. 5C, the first and second substrates 110 and 210 having the surfaces thereof etched are moved into the vacuum chamber, and a transparent conductive material is deposited by a sputtering method, Thereby forming the back electrode 500. Here, the back electrode 500 may be made of indium tin oxide.

Then, the two substrates are cut into individual cells and separated

The edge of the first substrate 110 is bent toward the second substrate 210 by the force of the first substrate 110 being pulled inward by the protective layer 170 under the compressive stress, (110) are joined together without hesitation. Therefore, it is possible to prevent the substrate from being blown by the low pressure when the back electrode 500 is formed and to prevent the problem that the adhesive 400 penetrates into the outer seal pattern 300 to cover the scribing key .

The present invention is not limited to the above-described embodiments, and various changes and modifications may be made without departing from the spirit of the present invention.

110: first substrate 122: gate electrode
130: gate insulating layer 142: active layer
152: pixel electrode 164: source electrode
166: drain electrode 170: protective layer
182: common electrode 182a:
210: second substrate 222: black matrix
232: color filter layer 240: overcoat layer

Claims (9)

Forming a thin film transistor on the first substrate;
Forming a pixel electrode connected to the thin film transistor;
Forming a protective layer covering the thin film transistor on the entire surface of the first substrate and having a compressive stress;
Forming a black matrix and a color filter layer on a second substrate;
Forming an outer seal pattern on an edge of the second substrate;
Attaching the first substrate and the second substrate with the outer seal pattern interposed therebetween
Lt; / RTI >
Wherein the protective layer has a stress intensity for receiving a compressive stress of 200 MPa to 350 MPa.
The method according to claim 1,
And etching the surfaces of the first substrate and the second substrate which are bonded together.
3. The method of claim 2,
Forming a common electrode on the protective layer, and forming a transparent rear electrode on the second substrate having the etched surface.
The method according to claim 1,
Wherein the protective layer is formed by supplying SiH4 gas, NH3 gas, and N2 gas into a vacuum chamber, and depositing silicon nitride by applying RF power.
5. The method of claim 4,
And the RF power applied is in a range of 2700 W to 3000 W.
5. The method of claim 4,
Wherein a flow rate ratio of the SiH4 gas and the NH3 gas to be supplied is 3.0 to 3.3, and the flow rate of the NH3 gas is larger than the flow rate of the SiH4 gas.
The method according to claim 6,
Wherein the total flow rate of the SiH4 gas and the NH3 gas is 3000 sccm.
A first substrate and a second substrate spaced apart from each other;
A thin film transistor formed on the inner surface of the first substrate;
A pixel electrode connected to the thin film transistor;
A protective layer formed on the entire surface of the first substrate and covering the thin film transistor and having compressive stress;
A black matrix and a color filter layer formed on the inner surface of the second substrate;
An outer seal pattern formed at an edge between the first substrate and the second substrate;
/ RTI >
Wherein the protective layer is made of silicon nitride and has a stress intensity for receiving a compressive stress of 200 MPa to 350 MPa.
9. The method of claim 8,
A common electrode on the protection layer, and a transparent rear electrode on the second substrate.

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