KR101964755B1 - An optimized time-synchronization Method and System for simulator interpretation - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a simulator interlocking technique, and more particularly, to a time-synchronizing method, which is one of technologies required for a technique of combining heterogeneous simulators based on H network environment into a single simulation And devices.

Description

[0001] The present invention relates to an optimized time-synchronization method and system for simulator interworking,

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a simulator interworking technique, and more particularly, to a time-synchronizing method, which is one of technologies required to combine heterogeneous simulators based on a network environment into a single simulation Device.

In the previous research, time-stamp data was added to network packets based on the time that occurred in the object event of each simulator, and the packet was sorted in time order of the time stamp so as to be sequentially applied to each simulator participating in interworking Time-synchronization.

However, this method has caused the problem that if one simulator processes an event in time-stamp order, the other participant simulators must wait for that time.

In other words, the waiting time for time synchronization increases exponentially as the number of participating simulators increases in simulator interlocking environment.

1. Korean Registered Patent No. 10-1354007 (Apr. 14, 2014)

1. Lim, HC, "A Low-Power Time Synchronization Scheduling Scheme for Wireless Sensor Networks Based on Node Density" (in Korean) Chungbuk National University, 2016

The present invention has been made in order to solve the above problems, and it is an object of the present invention to provide an optimized time- Synchronization method and system.

It is another object of the present invention to provide an optimized time-synchronization method and system for simulator interworking which enables time-synchronization for network-based simulators.

In order to achieve the above object, the present invention provides an optimized time-synchronization method for simulator interworking that can implement a technology for combining heterogeneous simulators based on a network environment into a single simulation, There is a purpose.

The optimized time-synchronization method for the simulator interworking comprises:

A process in which a plurality of simulators exchange network packets with each other;

A scenario time in which a simulator interlock device is combined due to a plurality of simulators is divided into a synchronization unit time and network packets of simulators occurring in the synchronization unit time are converted into one integrated packet sets in a simulation time interval To a plurality of simulators at a time; And

Processes for generating events corresponding to the synchronization unit time of the pre-processing process by referring to the one integrated packet sets and converting simulated object states into simulated progress time references based on the simulated object sets, And a processing step.

In this case, the plurality of simulators are constrained to a common simulation time, and simulate events among the simulation objects held by the simulators during the simulation time in a single simulation .

In this case, the pre-processing may include: combining the network packets into one integrated packet set according to a comparison result between a current progress time of collecting the network packets and a total time of interworking simulation that is set in advance; Discarding the one unified set of packets according to whether an event occurred in the one unified set of packets; And performing a synchronization time according to a result of the comparison between the current progress time and a preset synchronization unit time and broadcasting one integrated packet to the plurality of simulators when the event occurs. can do.

In addition, the one integrated packet sets may include a time-stamp allocation area showing the current progress time, a simulator ID allocation area showing each simulator identification information, an event message indicating the contents of the event occurring in each simulator, And an allocation area.

In addition, the post-processing may include: adjusting the current progress time starting from the dividing synchronization unit time in the post-processing process of the plurality of simulators; Converting an object state of the simulator according to whether an event has occurred in the corresponding packet set among the one integrated packet sets in the current progress time; Determining whether the progress of the time interval within the synchronization unit time is completed, and determining whether the current progress time exceeds a predetermined total interworking simulation time; And if it is determined that the total interworking simulation time has been exceeded, performing a waiting activity until there is a broadcasting activity of the next one integrated packet set of the one integrated packet sets have.

In addition, the pre-processing and post-processing may be performed in parallel.

Further, the plurality of simulators may be characterized by being a different simulator.

Also, the post-processing process may perform a waiting activity every synchronization unit time.

On the other hand, another embodiment of the present invention provides a computer system comprising: a plurality of simulators; A network hub connecting the plurality of simulators; And a simulator interworking device coupled to the network for interworking with the plurality of simulators, wherein the plurality of simulators send and receive network packets to each other, and wherein the simulator interworking device is combined with a plurality of simulation devices, Dividing the time into synchronization unit time, converting network packets of each simulator occurring within the synchronization unit time into one integrated packet sets at a simulation time interval and transmitting them to the plurality of simulators at a time, The simulators refer to the events that occur as much as the preliminary processing synchronization unit time to the one integrated packet sets and each simulator converts the simulated object state to the simulation progress time reference to eliminate the waiting time between simulators Optimized for simulated interlocking features Cross may provide a synchronization system.

 According to the present invention, by dividing the time-synchronization process into the preprocessing process and the post-process process, it is possible to solve the problem that the waiting time for time synchronization increases exponentially as the number of participating simulation devices increases in the simulator- have.

As another effect of the present invention, it is also possible to refer to events generated by the time synchronization unit time of the preprocessing process in the post-processing process, parallel processing of the simulated packets by referring to the integrated packet sets, It can be removed.

Further, another advantage of the present invention is that preliminary-process and post-process can be performed in parallel to minimize the overall simulation time.

1 is a block diagram of a time-synchronization system 100 for simulator interworking in accordance with one embodiment of the present invention.
2 is a conceptual diagram for explaining a time-synchronization algorithm according to an embodiment of the present invention.
FIG. 3 is a flowchart showing an execution algorithm of the time-synchronization optimization system according to an embodiment of the present invention.
4 is a flow chart illustrating the pre-processing algorithm 310 shown in FIG.
5 is a conceptual diagram for explaining one packet integration according to an embodiment of the present invention.
FIG. 6 is a flow chart showing the post-processing algorithms 320-1 through 320-n shown in FIG.

While the invention is susceptible to various modifications and alternative forms, specific embodiments thereof are shown by way of example in the drawings and will herein be described in detail. It is to be understood, however, that the invention is not to be limited to the specific embodiments, but includes all modifications, equivalents, and alternatives falling within the spirit and scope of the invention.

Like reference numerals are used for similar elements in describing each drawing.

The terms first, second, etc. may be used to describe various components, but the components should not be limited by the terms. The terms are used only for the purpose of distinguishing one component from another.

For example, without departing from the scope of the present invention, the first component may be referred to as a second component, and similarly, the second component may also be referred to as a first component. The term "and / or" includes any combination of a plurality of related listed items or any of a plurality of related listed items.

Unless otherwise defined, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs.

Terms such as those defined in commonly used dictionaries are to be interpreted as having a meaning consistent with the contextual meaning of the related art and are to be interpreted as either ideal or overly formal in the sense of the present application Should not.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, an optimized time-synchronization method and system for a simulator interworking according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

1 is a block diagram of a time-synchronization system 100 for simulator interworking in accordance with one embodiment of the present invention. 1, the time-synchronization system 100 includes a simulator interlock device 110, first to third simulators 121, 122, 123 interlocked by a simulator interlock device 110, first to third A network hub 130 for connecting the simulators 121, 122, and 123 and the simulator interlock device 110, and the like.

The first to third simulators 121, 122, and 123 perform a simulation function. Also, to be connected to other simulators and simulator interlocks, a time-synchronization module is constructed. In addition, the first simulator 121 is configured with a first time-synchronization module 121-1, the second simulator 122 is configured with a second time-synchronization module 122-1, 3 simulator 123 is configured with a third time-synchronization module 123-1.

The simulator interlocking device 110 performs a function of interlocking the first to third simulators 121, 122 and 123. To this end, the time synchronization module 111 is also configured in the simulator interlock device 110.

The network hub 130 may be a wired communication network or a wireless communication network. The communication network includes a public switched telephone network (PSTN), a public switched data network (PSDN), an integrated services digital network (ISDN), a broadband ISDN (BISDN), a local area network (LAN) A wide area network (WLAN), a wide area network (MAN), etc. However, the present invention is not limited to this and can be applied to a wireless communication network such as Code Division Multiple Access (CDMA) A wireless broadband (Wibro), a wireless fidelity (WiFi), a high speed downlink packet access (HSDPA) network, and a bluetooth. Or a combination of these wired communication networks and wireless communication networks.

Various communication protocols such as USART (Universal Synchronous and Asynchronous Receiver / Transmitter), UDP (user datagram protocol), TCP / IP (Transmission Control Protocol / Internet Protocol), and 1553B may be applied in such a communication network.

1, the first through third simulators 121, 122, and 123 are illustratively shown. However, the present invention is not limited thereto, and three or more simulators are possible.

Also, the terms "... "," module ", and the like in FIG. 1 denote a unit for processing at least one function or operation, and may be implemented by hardware or software or a combination of hardware and software. (DSP), a programmable logic device (PLD), a field programmable gate array (FPGA), a processor, a controller, a microprocessor, and the like, which are designed to perform the above- , Other electronic units, or a combination thereof. In software implementation, it may be implemented as a module that performs the above-described functions. The software may be stored in a memory unit and executed by a processor. The memory unit or processor may employ various means well known to those skilled in the art.

In addition, the first to third simulators 121, 122, and 123 may be configured with a plurality of modules to perform simulation functions.

The simulator interlocking device 110 may include a microprocessor for performing control in order to interlock the first to third simulators 121, 122 and 123, a memory for storing data, algorithms, signals, and the like. The memory may be a memory provided in the simulator interlock device 110, or may be a separate memory. Accordingly, a flash memory (SSD), a hard disk drive, a flash memory, an electrically erasable programmable read-only memory (EEPROM), a static random access memory (SRAM), a ferro- Volatile memory such as a magnetic random access memory (MRAM) and / or a volatile memory such as a dynamic random access memory (DRAM), a synchronous dynamic random access memory (SDRAM), or a double date rate (SDRAM) .

2 is a conceptual diagram for explaining a time-synchronization algorithm according to an embodiment of the present invention. Referring to FIG. 2, interlocking of the first through third simulation units 121 through 123 is performed by simulation simulators having a simulation time constrained by a plurality of simulators, and simulation objects 211, 212, 213, 221, and 222 Simulate the events between the two simulations.

First, there is a given simulation time, there is a time interval (t_interval) of the given simulation time, and the simulator interworking performs time-synchronization in this time interval unit. The time interval can be arbitrarily set as 1 second, 0.1 second, 0.01 second, etc. As the value becomes finer, the accuracy of the simulation increases. However, since the number of synchronization times of the time-synchronization modules 111, 121-1, 122-1, and 123-1 increases, the total combination simulation execution time increases.

With continuing reference to FIG. 2, "packet set -1" On the other hand, "Packet Set-7" is a case where there is an event occurrence and packet set generation is performed.

FIG. 3 is a flowchart showing an execution algorithm of the time-synchronization optimization system according to an embodiment of the present invention. Referring to FIG. 3, the time-synchronization step includes a pre-processing step 310 and a post-processing step 320.

First, in the preliminary processing, the combined scenario time is divided into synchronous unit time due to the simulators 121, 122, and 123, and the time intervals of the respective simulators occurring within the unit time are divided into one integrated packet sets Of 230).

In the post-processing procedure 320, the simulators perform processing (320-1 to 320-n) of the simulators in parallel by referring to the integrated packet sets by events occurring by the time synchronization unit time of the pre- Of the waiting time.

In addition, the pre-processing and post-processing steps can also be performed in parallel, minimizing the overall simulation time.

Further, in the pre-processing step 310, the network packets received from the simulators 121 through 123 are sorted in the same progress time (same time-stamp), and the network packets of the same progress time are combined into one integrated packet Set, and delivers it to all simulators 121 to 123 at once. These operations are performed according to the synchronization unit time (t_synchro_time_unit).

In the post-process 320, simulators convert the simulated object state (o_variable) to the simulation progress time based on the contents of the packet set received in the pre-processing process 310. [ The time-synchronization module (121-1, 122-1, 123-1 in FIG. 1) performs this series of pre-processing and post-processing in parallel.

4 is a flow chart illustrating the pre-processing algorithm 310 shown in FIG. Referring to FIG. 4, a pre-processing sequence of a time-synchronization module (111 in FIG. 1) is schematized. First, an activity of inputting the total time T of the interlocking simulation is performed (step S410).

And performs an activity of determining whether the current progress time t_present exceeds the total time (step S420).

As a result of the determination in step S420, if the current progress time exceeds the total time T of the interlock simulation, the pre-processing step ends. Otherwise, if it is determined in step S420 that the current progress time does not exceed the total time T of the interworking simulation, an activity of collecting network packets of the current progress time t_present is performed (step S430).

Thereafter, an activity 140 is performed to convert the collected network packets into one integrated packet sets (step S440). The activities of integrating into one packet set are integrated into a structure as shown in Fig. This will be described later.

With continuing reference to FIG. 4, an activity of determining whether an event has occurred in one integrated packet set is performed (step S450). If it is determined in step S450 that the event does not occur, an operation to discard the integrated packet set is performed (step S460). Otherwise, if an event occurs in step S450, the process proceeds to step S470 to determine whether the current progress time exceeds the synchronization unit time (t_synchro_time_unit) (step S470).

As a result of the determination in step S470, if the current progress time does not exceed the synchronization unit time, an activity of simply proceeding the simulation time (t) is performed (step S471). In other words, the simulation time is increased to increase the current time.

Otherwise, if it is determined in step S4710 that the current progress time exceeds the synchronization unit time, the mobile terminal proceeds to the synchronization time to perform an activity of broadcasting the previous integrated packet sets (step < RTI ID = 0.0 > S480, S490).

5 is a conceptual diagram for explaining one packet integration according to an embodiment of the present invention. 5, a first network packet generated from a first simulator, a second network packet generated from a second simulator, a third network packet generated from a third network packet to an Nth simulator generated from a third simulator, N network packets into a single packet set. That is, the message structure of one integrated packet set includes a time-stamp allocation area 510 showing the current progress time, a simulator ID (Identification) allocation area 520 showing each simulator identification information, An event-message allocation area 530 that shows the contents of the event that occurs, and the like.

FIG. 6 is a flow chart showing the post-processing algorithms 320-1 through 320-n shown in FIG. Referring to FIG. 6, the first through third time-synchronization modules 121-1, 122-1, and 123-1 proceed separately for each simulator (121, 122, 123 in FIG. 1).

First, when each simulator (121, 122, 123 of FIG. 1) receives one integrated packet set broadcasted by the time-synchronization module 111 of the simulator interlock device 110, And performs an activity of adjusting the current progress time to start (step S610).

Thereafter, an activity of determining whether an event has occurred in the packet set within the current progress time is performed (step S620).

If it is determined in step S620 that the event has not occurred, it is determined whether the time interval progress within the synchronization unit time is completed (step S640).

Alternatively, if it is determined in step S620 that the event has occurred, an activity of converting the object state (o_variable) of the simulator is performed, and an activity of determining whether the time interval progress within the synchronization unit time is completed is performed S630, S640).

If it is not completed within the synchronization unit time, the process of adjusting the current progress time is performed again at a time interval in the post-processing (step S610).

If it is determined in step S640 that the process has been completed within the synchronization unit time, an activity is performed to determine whether the current progress time t_present exceeds the total interworking simulation time (step S650).

If it is determined in step S650 that the current time t_present has been exceeded, the post-processing process is terminated. If the current time t_present is not exceeded, the process waits until there is a next packet set broadcasting activity in the pre- ) Activity 260 (step S660). That is, the post-processing process performs the waiting activity every synchronization unit time.

100: Time-synchronizing device
110: simulator interlocking device
111: time-synchronization module
121: first simulator 121-1: first time-synchronization module
122: second simulator 122-1: second time synchronization module
123: third simulator 123-1: third time synchronization module
130: Network hub

Claims (9)

An optimized time-synchronization method for simulator interworking comprising:
A process in which a plurality of simulators exchange network packets with each other;
A scenario time in which a simulator interlock device is combined due to a plurality of simulators is divided into a synchronization unit time and network packets of simulators occurring in the synchronization unit time are converted into one integrated packet sets in a simulation time interval To a plurality of simulators at a time; And
Processes for generating events corresponding to the synchronization unit time of the pre-processing process by referring to the one integrated packet sets and converting simulated object states into simulated progress time references based on the simulated object sets, Comprising:
Wherein the plurality of simulators are constrained to a common simulation time and simulate events between simulation objects held by each simulator in the simulation time as one simulation,
Wherein the post-processing process performs a waiting activity every synchronization unit time,
Time synchronization is performed in units of the simulation time interval,
Wherein the plurality of simulators each comprise a time-synchronization module for time-synchronization, respectively. delete The method according to claim 1,
The pre-
Integrating the network packets into one integrated packet set according to a result of a comparison between the current progress time of collecting the network packets and the total time of interworking simulation previously set in advance;
Discarding the one unified set of packets according to whether an event occurred in the one unified set of packets; And
And if the event occurs, performing a synchronization time according to a result of the comparison between the current progress time and a preset synchronization unit time, and broadcasting one integrated packet to the plurality of simulators Optimized time - synchronization method for simulator interworking.
The method according to claim 1,
The one integrated packet set includes a time-stamp allocation area showing the current progress time, a simulator ID allocation area showing each simulator identification information, an event-message allocation area showing an event occurring in each simulator, Wherein the time-synchronizing method comprises:
The method according to claim 1,
The post-
Adjusting the current progress time starting from the dividing synchronization unit time in the post-processing process by the plurality of simulators;
Converting an object state of the simulator according to whether an event has occurred in the corresponding packet set among the one integrated packet sets in the current progress time;
Determining whether the progress of the time interval within the synchronization unit time is completed, and determining whether the current progress time exceeds a predetermined total interworking simulation time; And
And performing a waiting operation until there is a broadcasting activity of a next one of the integrated packet sets of the one integrated packet sets if a result of the determination is that the total interworking simulation time has been exceeded Optimized time-synchronization method for interworking.
The method according to claim 1,
Wherein the pre-processing and the post-processing are processed in parallel.
The method according to claim 1,
Wherein the plurality of simulators are heterogeneous simulators. ≪ RTI ID = 0.0 > 11. < / RTI >
delete Multiple simulators;
A network hub connecting the plurality of simulators; And
And a simulator interlock device coupled to the network for interlocking the plurality of simulators,
A plurality of simulators exchanging network packets with each other, a scenario time in which the simulator interworking device is combined due to a plurality of simulators is divided into a synchronization unit time, a network packet of each simulator occurring in the synchronization unit time, Into one integrated packet sets at a simulation time interval and delivers them to the plurality of simulators at one time,
The plurality of simulators refer to the events generated by the synchronization unit time of the pre-processing to the one integrated packet sets, and each simulator converts the simulated object state to the simulation progress time reference to calculate the waiting time between simulators Remove,
The plurality of simulators are constrained to a common simulation time and simulate the events among simulation objects held by the simulators during the simulation time into one simulation and perform a waiting activity every synchronization unit time ,
Time synchronization is performed in units of the simulation time interval,
Wherein the plurality of simulators each comprise a time-synchronization module for time-synchronization. ≪ RTI ID = 0.0 > 11. < / RTI >

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