KR101920755B1 - Organic light emitting diode display device and method for driving the same - Google Patents

Abstract

The present invention relates to an organic light emitting diode (OLED) display device and a driving method thereof that can prevent a data voltage loss when driving a data MUX, thereby improving display quality, and more particularly, And a switching unit for supplying the data voltage to the kth data line, the k + 1th data line, and the (k + 2) th data line in a non-sequential manner, wherein the kth data line is a line for applying the data voltage to the red pixel , The (k + 1) th data line is a line for applying the data voltage to a green pixel, and the (k + 2) th data line is a line for applying the data voltage to a blue pixel; And the switching unit lastly supplies the data voltage to the (k + 1) th data line among the kth to (k + 2) th data lines.

Description

Technical Field [0001] The present invention relates to an organic light emitting diode (OLED) display device,

The present invention relates to an organic light emitting diode (OLED) display device and a driving method thereof that can prevent a data voltage loss and improve display quality when driving a data MUX.

Recently, a " data MUX driving technique " has been introduced in which a data voltage output from a data integration circuit is switched in a time-division manner and output in order to reduce the number of data integration circuits.

An organic light emitting diode (OLED) display device to which a data MUX driving technique is applied has a period in which data voltages are sequentiallycharged to R, G, and B data lines before an initialization period of each pixel. When a data voltage is charged to each data line in this period, each data line maintains the charged data voltage and remains in the floating state. The data voltage held in the floating state is supplied to each pixel during the sampling period of the threshold voltage (Vth) of the driving switching element.

However, in the conventional OLED display device as described above, there is a problem that the data voltage written in the pixel is different from the intended voltage due to the coupling phenomenon of the capacitor connected to the gate end of the driving switching element during the sampling period. In particular, the distortion of the data voltage having black gradation lowers the contrast ratio of the image, resulting in deterioration of display quality.

It is an object of the present invention to provide an organic light emitting diode (OLED) display device and a driving method thereof, which can improve display quality by preventing data voltage loss when driving a data MUX.

According to another aspect of the present invention, there is provided an organic light emitting diode display comprising: a display panel defining pixels at intersections of a plurality of data lines and a plurality of gate lines; A timing controller for outputting a plurality of gate control signals and a plurality of data control signals; A gate driver for generating a plurality of gate signals including scan signals according to the plurality of gate control signals and supplying the gate signals to the plurality of gate lines; A data driver for generating a data voltage according to the plurality of data control signals and supplying the generated data voltage to a plurality of channel lines; And a switching unit for switching the data voltage provided from the plurality of channel lines and for supplying the switched data voltage to the kth data line, the k + 1th data line and the (k + 2) th data line in a non-sequential manner , The kth data line is a line for applying the data voltage to the red pixel, the (k + 1) th data line is a line for applying the data voltage to the green pixel, and the (k + A line for applying the data voltage to the pixel; And the switching unit lastly supplies the data voltage to the (k + 1) th data line among the kth to (k + 2) th data lines.

A first switch for supplying the data voltage supplied from the plurality of channel lines to the k-th data line in response to a first switching signal; A second switch for supplying the data voltage provided from the plurality of channel lines to the (k + 1) -th data line in response to a second switching signal; And a third switch for supplying the data voltage provided from the plurality of channel lines to the (k + 2) th data line in response to a third switching signal.

The pixel includes a driving switching element for supplying a driving current to the organic light emitting diode according to a potential of a second node; A first switching device for supplying the data voltage to the first node in response to the scan signal; A second switching element for supplying a reference voltage to the first node in response to the light emitting signal; A third switching element for connecting the drain electrode of the driving switching element and the second node to each other in response to the scan signal; A fourth switching element for connecting the drain electrode and a third node connected to the anode electrode of the organic light emitting diode in response to the emission signal; A fifth switching element for supplying the reference voltage to the third node in response to the light emitting signal; And a capacitor connected between the first node and the second node.

A first period during which the first switching signal is output; A second period during which the third switching signal is output; A third period during which the second switching signal is output; A fourth period during which the second switching signal, the scan signal, and the emission signal are output; A fifth period during which the second switching signal and the scan signal are output; And a sixth period during which the emission signal is output.

A first period during which the third switching signal is output; A second period during which the first switching signal is output; A third period during which the second switching signal is output; A fourth period during which the second switching signal, the scan signal, and the emission signal are output; A fifth period during which the second switching signal and the scan signal are output; And a sixth period during which the emission signal is output.

And the length of the third period is longer than the length of the first and second periods.

According to another aspect of the present invention, there is provided an organic light emitting diode (OLED) display device including: a data driver for generating a data voltage and supplying the data voltage to a plurality of channel lines; And supplying the switched data voltage to the k-th data line, the k + 1-th data line and the (k + 2) -th data line in a non-sequential manner by switching the data voltage provided from the plurality of channel lines ; The switched data voltage is supplied to the (k + 1) th data line among the kth to (k + 2) th data lines; And the (k + 1) -th data line is a line for applying the data voltage to the green pixel.

A first period for supplying the switched data voltage to the kth data line; A second period for supplying the switched data voltage to the (k + 2) th data line; And a third period for supplying the switched data voltage to the (k + 1) th data line.

And the length of the third period is longer than the length of the first and second periods.

The present invention can prevent a data voltage loss when driving a data MUX, thereby increasing a contrast ratio of an image and consequently improving display quality.

1 is a configuration diagram of an OLED display device according to an embodiment of the present invention.
Fig. 2 is a configuration diagram of the switching unit 10 shown in Fig.
FIG. 3 is a circuit diagram of the red, green, and blue pixels R, G, and B shown in FIG.
4 is a driving waveform diagram of the OLED display shown in FIG.
5 is a driving waveform diagram of an OLED display according to another embodiment.

Hereinafter, an organic light emitting diode display according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

In the present invention, the TFT may be configured as a P type or an N type, and in the embodiment, the TFT is configured as a P type for convenience of explanation. Thus, the gate high voltage VGH is a voltage for turning off the TFT, and the gate low voltage VGL is a voltage for turning on the TFT. In describing a pulse-shaped signal, the gate high voltage (VGH) state is defined as "high state", and the gate low voltage (VGL) state is defined as "low state".

1 is a configuration diagram of an OLED display device according to an embodiment of the present invention.

The OLED display shown in FIG. 1 includes a display panel 2 defining pixels (R, G, B) at the intersection of a plurality of data lines DL and a plurality of gate lines GL; A timing controller 8 for outputting a plurality of gate control signals GCS and a plurality of data control signals DCS; A gate driver 4 for generating a plurality of gate signals including scan signals and emission signals SCAN and EM according to a plurality of gate control signals GCS and supplying the generated gate signals to a plurality of gate lines GL; A data driver 6 for generating a data voltage Vdata according to a plurality of data control signals DCS and supplying the data voltage Vdata to the plurality of channel lines CL; The switching of the data voltage Vdata provided from the plurality of channel lines CL and the switching of the data voltage Vdata to the kth data line DL_k and the (k + 1) th data line DL_k + And a switching unit 10 for supplying the data signal to the data line DL_k + 2 in a non-sequential manner.

th data line DL_k + 1 is a line for applying a data voltage to the green pixel, and the (k + 1) th data line DL_k is a line for applying a data voltage to the red pixel, (DL_k + 2) is a line for applying a data voltage to the blue pixel. The embodiment of the present invention is characterized in that a data voltage is applied to the green pixel at the latest among red, green and blue pixels.

For reference, the green pixel among the red, green, and blue pixels has the largest luminance change according to the change of the data voltage. Accordingly, the green pixel is most affected by the distortion of the data voltage as compared with the red and blue pixels, and the embodiment prevents distortion of the data voltage applied to the green pixel, thereby increasing the contrast ratio.

Before describing this, each component shown in FIG. 1 will be briefly described first.

The timing controller 8 arranges image data (RGB) input from the outside in accordance with the size and resolution of the display panel 2 and supplies the image data to the data driver 6. The timing controller 8 receives a plurality of synchronization signals (e.g., a dot clock DCLK, a data enable signal DE, a horizontal synchronization signal Hsync, and a vertical synchronization signal Vsync) And supplies the gate control signal GCS and the data control signal DCS to the gate driver 4 and the data driver 6, respectively.

The gate driving unit 4 receives a gate control signal GCS from the timing control unit 8 in response to a plurality of clock pulses, a gate start pulse, a gate shift clock, Generates a gate signal and supplies it to the gate line GL. Here, the plurality of gate signals include scan signals and emission signals SCAN and EM. The gate driver 4 may be embedded in the display panel 2 in a gate-in-panel manner.

The data driver 6 receives the data input from the timing controller 8 using a source start pulse and a source shift clock of the data control signal DCS from the timing controller 8, Converts the data (RGB) into the data voltage (Vdata). The data driver 6 supplies the converted data voltage Vdata to the plurality of channel lines CL in response to a source output enable signal.

Fig. 2 is a configuration diagram of the switching unit 10 shown in Fig.

2 includes a first switch SW1 for supplying the data voltage Vdata provided from the channel line CL to the k-th data line DL_k in response to the first switching signal MUX1, A second switch SW2 for supplying the data voltage Vdata provided from the channel line CL to the (k + 1) th data line DL_k + 1 in response to the second switching signal MUX2, And a third switch SW3 for supplying the data voltage Vdata provided from the channel line CL to the (k + 2) th data line DL_k + 2 in response to the signal MUX3.

FIG. 3 is a circuit diagram of the red, green, and blue pixels R, G, and B shown in FIG.

The pixels R, G, and B shown in FIG. 3 include a pixel driver that independently drives the OLED and the OLED.

Specifically, the pixel driver includes first to fifth TFTs T1 to T5, a driving TFT DT, and a capacitor C. The OLED is connected between the pixel driving part and the low potential driving voltage (VSS) supply line and is equivalently represented by a diode.

A plurality of gate signals SCAN and EM for controlling the data voltage Vdata, the reference voltage Vref, the high potential driving voltage VDD and the first to fifth TFTs T1 to T5 .

Here, the high-potential driving voltage VDD has a potential that is relatively higher than the low-potential driving voltage VSS. The low potential driving voltage VSS can be set to the ground voltage. The reference voltage Vref has a potential between the high potential driving voltage VDD and the low potential driving voltage VSS. The plurality of gate signals SCAN and EM include a scan signal SCAN and a light emission signal EM.

The first TFT T1 supplies the data voltage Vdata to the first node N1 in response to the scan signal SCAN. Here, the first node N1 is a node to which the output terminals of the first TFT T1 and the second TFT T2 are commonly connected.

The second TFT T2 supplies the reference voltage Vref to the first node N1 in response to the emission signal EM.

The third TFT T3 connects the drain electrode d of the driving TFT DT and the second node N2 to each other in response to the scan signal SCAN. Here, the second node N2 is a node connected to the gate electrode g of the driving TFT DT. Further, the third TFT T3 may be formed in a dual gate structure to reduce a high-temperature leakage current when the OLED emits light.

The fourth TFT T4 connects the drain electrode d of the driving TFT DT and the third node N3 to each other in response to the emission signal EM. Here, the third node N3 is a node connected to the anode electrode of the OLED.

The fifth TFT T5 supplies the reference voltage Vref to the third node N3.

The driving TFT DT adjusts the amount of emitted light of the OLED by controlling the amount of current supplied to the OLED in accordance with the potential of the second node N2 supplied with the high potential driving voltage VDD to the source electrode s.

The capacitor C is connected between the first node N1 and the second node N2.

The OLED is composed of an anode electrode connected to the pixel driving unit, a cathode electrode supplied with a low potential driving voltage (VSS), and an organic layer formed between the anode electrode and the cathode electrode.

Hereinafter, a driving method of the red, green, and blue pixels R, G, and B including the pixel driver will be described in detail.

4 is a driving waveform diagram of the OLED display shown in FIG.

4, X1 represents the first period, X2 represents the second period, X3 represents the third period, X4 represents the fourth period, X5 represents the fifth time, and X6 represents the sixth period.

In the first period X1, the first switching signal MUX1 and the emission signal EM are outputted in the low state. The second and third switching signals MUX2 and MUX3 and the scan signal SCAN are outputted in a high state. Then, the first switch SW1 is turned on to apply the data voltage Vdata for the red pixel R to the kth data line DL_k.

In the second period X2, the third switching signal MUX3 and the light emission signal EM are outputted in a low state. The first and second switching signals MUX1 and MUX2 and the scan signal SCAN are output in a high state. Then, the third switch SW3 is turned on and the data voltage Vdata for the blue pixel B is applied to the (k + 2) th data line DL_k + 2.

In the third period X3, the second switching signal MUX2 and the light emission signal EM are outputted in a low state. The first and third switching signals MUX1 and MUX3 and the scan signal SCAN are output in a high state. Then, the second switch SW2 is turned on and the data voltage Vdata for the green pixel R is applied to the (k + 1) -th data line DL_k + 1.

In the fourth period X4, the second switching signal MUX2, the scan signal SCAN, and the light emission signal EM are outputted in a low state. The first and third switching signals MUX1 and MUX3 are outputted in a high state. The first to fifth TFTs T1 to T5 are turned on so that the first and second nodes N1 and N2 are turned to the reference voltage Vref Is initialized.

At this time, the red and blue pixel data voltages Vdata applied to the kth data line DL_k and the (k + 2) th data line DL_k + 2 are maintained in the floating state, 1, the green pixel data voltage Vdata is continuously applied from the second switch SW2.

In the fifth period X5, the second switching signal MUX2 and the scan signal SCAN are outputted in a low state. The first and third switching signals MUX1 and MUX3 and the light emission signal EM are outputted in a high state. Then, the second switch SW2 continues to apply the green pixel data voltage Vdata to the (k + 1) th data line DL_k + 1.

The data voltage Vdata is applied from the adjacent data line DL to the first node N1 of each of the pixels R, G and B in the fifth period X5. In the fifth period X5, the threshold voltage Vth of the driving TFT DT is sensed. Specifically, in each of the pixels R, G, and B in the fifth period X5, the fourth TFT T4 is turned off, and a current flowing in the driving TFT DT flows into the second node N2 . Thus, the potential of the second node N2 gradually rises and the potential of the second node N2 becomes higher than the potential difference between the gate terminal voltage g and the source terminal voltage s of the driver TFT DT, The threshold voltage Vth of the transistor Tr2 is increased.

Specifically, in the fifth period X5, the potential of the second node N2 of each of the pixels R, G, and B converges to VDD + Vth from the reference voltage Vref, Quot; VDD + Vth ", the driving TFT DT is turned off.

In the sixth period X6, the light emission signal EM is outputted in a low state, and the first to third switching signals MUX1 to MUS3 and the scan signal SCAN are outputted in a high state. Then, the first to third switches SW1 to SW3 are turned off, and the pixels R, G, and B simultaneously emit light.

The second and fourth TFTs T2 and T4 are turned on and the first, third and fifth TFTs T1, T3 and T5 are turned on in the sixth period X6, Is turned off. Thus, the reference voltage Vref is supplied to the first node N1 through the fourth TFT T4. At this time, if the potential of the first node N1 changes from the data voltage Vdata to the reference voltage Vref, the potential of the second node N2 becomes "VDD + Vth" due to the coupling phenomenon of the capacitor C, Quot; VDD + Vth + {C1 / (C1 + CTFT)} (Vref-Vdata) " Here, " C1 " represents the capacitance of the first capacitor (C), and " CTFT " represents the parasitic capacitance of the driver TFT (DT). At this time, since the fourth TFT T4 is turned on, a driving current is supplied to the OLED, and the OLED emits light.

Specifically, " Vgs " represents a potential difference between the gate electrode g and the source electrode s of the driving TFT DT, and " Vth " Represents a threshold voltage of the driving TFT DT, and "? &Quot; represents a constant value determined by the mobility of the driving TFT DT and the parasitic capacitance.

Accordingly, the OLED driving current is summarized as shown in Equation (2).

Referring to Equation 2, it can be seen that the OLED driving current is not influenced by the threshold voltage Vth of the driving TFT DT and the high potential driving voltage VDD.

Thus, in the embodiment, the second switch SW2 is turned off during the fourth period X4 in which each of the pixels R, G, and B are initialized and the fifth period X5 in which the threshold voltage Vth of the driving TFT DT is sensed ) To apply the green pixel data voltage Vdata to the (k + 1) -th data line DL_k + 1. Accordingly, the embodiment can minimize the distortion of the green pixel regions, which are most sensitive to the luminance change, and can increase the contrast ratio.

In the embodiment described so far, the turn-on sequence of the first to third switches SW1 to SW3 is the first switch SW1, the third switch SW3 and the second switch SW2, The turn-on sequence of the third switches SW1 to SW3 may be the third switch SW3, the first switch SW1, and the second switch SW2, as shown in Fig. That is, the main feature of the present invention is to apply the data voltage for green pixels among the data voltages for red, green, and blue pixels at the latest and for the longest time.

Therefore, in the present invention, the output period of the second switch SW2 can be changed in any way if the output period of the first and third switches SW1 and SW3 is long. If the second switch SW2 is outputted most later, the output order of the first and third switches SW1 and SW3 may be changed.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the general inventive concept as defined by the appended claims and their equivalents. Will be clear to those who have knowledge of.

CL: channel line 10: switching section

Claims (9)

A display panel that defines pixels at intersections of a plurality of data lines and a plurality of gate lines;
A timing controller for outputting a plurality of gate control signals and a plurality of data control signals;
A gate driver for generating a plurality of gate signals including scan signals according to the plurality of gate control signals and supplying the gate signals to the plurality of gate lines;
A data driver for generating a data voltage according to the plurality of data control signals and supplying the generated data voltage to a plurality of channel lines; And
And a switching unit for switching the data voltage provided from the plurality of channel lines and for supplying the switched data voltage to the kth data line, the k + 1th data line, and the (k + 2)
The k + 1 th data line is a line for applying the data voltage to the green pixel, and the (k + 2) th data line is a line for applying the data voltage to the red pixel, A line for applying the data voltage to the data line;
The switching unit supplies the data voltage to the (k + 1) -th data line and the (K + 1) -th data line from the (k + The organic light emitting diode display device comprising: The method according to claim 1,
The switching unit
A first switch for supplying the data voltage provided from the plurality of channel lines to the k-th data line in response to a first switching signal;
A second switch for supplying the data voltage provided from the plurality of channel lines to the (k + 1) -th data line in response to a second switching signal; And
And a third switch for supplying the data voltage provided from the plurality of channel lines to the (k + 2) -th data line in response to a third switching signal. The method according to claim 1,
The pixel
A driving switching element supplying a driving current to the organic light emitting diode according to the potential of the second node;
A first switching device for supplying the data voltage to the first node in response to the scan signal;
A second switching element for supplying a reference voltage to the first node in response to the light emitting signal;
A third switching element for connecting the drain electrode of the driving switching element and the second node to each other in response to the scan signal;
A fourth switching element for connecting the drain electrode and a third node connected to the anode electrode of the organic light emitting diode in response to the emission signal;
A fifth switching element for supplying the reference voltage to the third node in response to the light emitting signal; And
And a capacitor connected between the first node and the second node. The method of claim 3,
A first period during which the first switching signal and the light emitting signal are output;
A second period during which the third switching signal and the light emitting signal are output;
A third period during which the second switching signal and the light emitting signal are output;
A fourth period during which the second switching signal, the scan signal, and the emission signal are output;
A fifth period during which the second switching signal and the scan signal are output;
And a sixth period during which the emission signal is output. The method of claim 3,
A first period during which the third switching signal and the light emitting signal are output;
A second period during which the first switching signal and the light emitting signal are output;
A third period during which the second switching signal and the light emitting signal are output;
A fourth period during which the second switching signal, the scan signal, and the emission signal are output;
A fifth period during which the second switching signal and the scan signal are output;
And a sixth period during which the emission signal is output. delete Generating and supplying a data voltage to a plurality of channel lines; And
Switching data voltages supplied from the plurality of channel lines, and supplying the switched data voltages to the kth data line, the k + 1th data line, and the (k + 2) th data line in a non-sequential manner;
The switching data voltage is supplied lastly to the (k + 1) -th data line among the k-th to (k + 2) -th data lines, and the data voltage is supplied to the Is supplied the longest time;
And the (k + 1) th data line is a line for applying the data voltage to the green pixel. 8. The method of claim 7,
A first period for supplying the switched data voltage to the kth data line;
A second period for supplying the switched data voltage to the (k + 2) th data line;
And a third period for supplying the switched data voltage to the (k + 1) -th data line. delete

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