KR101842759B1

KR101842759B1 - Resistive memory device having a multi-resistive switching layer and manufacturing method thereof

Info

Publication number: KR101842759B1
Application number: KR1020160014003A
Authority: KR
Inventors: 황현상; 임석재
Original assignee: 포항공과대학교 산학협력단
Priority date: 2016-02-04
Filing date: 2016-02-04
Publication date: 2018-03-29
Also published as: KR20170093281A

Abstract

A resistance change memory having a dual resistance variable layer and a method of manufacturing the same are provided. The resistance change memory according to the present invention includes a substrate, a lower electrode layer disposed on the substrate, and a lower electrode layer disposed on the resistance-variable layer and the resistance-variable layer having a resistance change due to generation and disappearance of the conductive filament, And an upper electrode layer including active metal ions participating in extinction, wherein the resistance-variable layer is disposed on the lower resistance-variable layer and the lower resistance-variable layer, which are located on the lower electrode layer and include the first transition metal oxide, And an upper resistance variable layer comprising a metal oxide, and the second transition metal oxide is characterized by having a lower oxygen content than the first transition metal oxide. According to the present invention, by using the double resistance-variable layer having a high active metal ion diffusion degree, a low forming voltage and a high on / off resistance ratio are enabled, thereby facilitating fabrication of the device.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a resistance-change memory having a dual resistance-variable layer and a manufacturing method thereof,

The present invention relates to a resistance change memory, and more particularly to a resistance change memory having a double resistance change layer.

The memory must be nonvolatile in order to store information without sustained energy supply. This non-volatile memory is widely used as a flash memory using an electron or charge trap. In recent years, however, scaling techniques have come to the limit, and in recent years there has been a growing interest in memory devices such as phase-change random access memory (PRAM), magnetic random access memory (MRAM), resistive random access memory (RERAM) ) Are receiving the spotlight.

These alternate nonvolatile memories use the memory characteristic (material high resistance state (HRS) and low resistance state (LRS)) as memory characteristics, 0 "or" 1 ") is more advantageous for scaling than a flash memory using an electronic trap, and has a simple vertical structure, thereby realizing a highly integrated memory implementation.

In the case of phase change memory, the internal resistance change due to the phase change of the material due to heat is used as a memory, and the heat to be applied is joule heating, which is generated by the current. This causes high power to be generated when operating, which is not suitable as a next generation nonvolatile memory device.

In the case of a magnetic memory, an external electric field changes the magnetization direction of ferromagnetic materials to parallel / anti-parallel to change the amount of current flowing through the device. However, as the magnetic memory is scaled, the proximity elements other than the element to be switched are also affected by the electric field, making it difficult to realize a highly integrated memory, which is not suitable as a next generation nonvolatile memory element.

In the case of a resistance change memory, a filament or an energy barrier of an interface can easily flow current due to movement of an internal ion or a vacancy due to an external stimulus (voltage or current) The change in internal resistance due to generation and disappearance and change is used as memory characteristics.

The resistance change memory can be driven at low power and is not affected by the bias applied to the adjacent elements. In the case of the filament type, theoretically, the filament can be scaled up to the size of the filament, thereby showing the possibility of a highly integrated memory device.

Among the resistance change memories, one metal electrode is used as an active metal such as Ag, Cu, Ni, and a counter electrode as an inert metal such as Pt, Ir, W, (PMC), electro-chemical metallization cell (ECM), and conductive bridging RAM (CBRAM), which are used for generating filaments by ion movement. Bridging Ram.

Among them, the conductive bridging RAM has a high scaling potential, high switching speed, low voltage driving and high on / off resistance ratio. In order for the conductive bridging ram to have the above-mentioned advantages, the active metal ions such as Cu and Ag must be free to move according to the external bias. However, for the stability of the filament, the movement of the active metal ions must be limited. For this purpose, conventional chalcogenide-based insulating materials have recently been replaced by oxide-based materials.

However, due to the use of an oxide insulator, a problem of high forming voltage and operating current is generated, which leads to generation of too thick filaments and complete filament extinction, making it impossible to reach a high OFF-state resistance value, There is a problem that it impedes the implementation of the on / off resistance ratio.

In order to solve these problems, methods of forming an active electrode by an alloy or introducing defects into an oxide layer have been studied. However, an increase in off-state leakage current due to a change in an alloy layer phase at a high temperature, .

J. Park, W. Lee, M. Choe, S. Jung, M. Son, S. Kim, S. Park, J. Shin, D. Lee, M. Siddik, J. Woo, G. Choi, E. Cha, T. Lee, and H. Hwang, IEDM Tech. Dig. 3.7.1 - 3.7.4 (2011)

A problem to be solved by the present invention is to provide a resistance change memory which provides a low current operation and a high off state resistance value without increasing the forming voltage.

According to an aspect of the present invention, there is provided a resistance change memory including a dual resistance variable layer. Wherein the resistance change memory comprises a substrate, a lower electrode layer positioned on the substrate, a resistance change layer positioned on the lower electrode layer and having a resistance change due to the generation and disappearance of the conductive filament, Wherein the resistance variable layer comprises a lower resistance variable layer which is located on the lower electrode layer and includes a first transition metal oxide, and a lower resistance variable layer which is formed on the lower resistance variable layer And an upper resistance variable layer including a second transition metal oxide, and the second transition metal oxide may have a lower oxygen content than the first transition metal oxide.

The lower resistance-variable layer may have a higher degree of diffusion of active metal ions constituting the conductive filament than the upper resistance-variable layer.

Wherein the first transition metal oxide may include SiO _2, TiO _2, HfO ₂ or Al ₂ O _3.

Wherein the second transition metal oxide is SiO _X (x is 1 to 2), TiO _x (x is 1 to 2) _, HfO _x (x is 1 to 2) or Al ₂ O _x (x is 1.5 to 3).

The thickness of the upper resistance-variable layer may be 3 nm to 5 nm.

The thickness of the lower resistance-variable layer may be 1 nm to 2 nm.

The conductive filament may be generated and extinguished by a redox reaction of active metal ions permeated from the upper electrode layer.

The upper electrode layer may include Cu, Ag, Ni, or Cr.

The lower electrode layer may include Pt, Ir, W, Au, Ru, or TiN.

According to another aspect of the present invention, there is provided a method for fabricating a resistance-change memory including a dual resistance-variable layer. The method includes forming a lower electrode layer on a substrate, forming a lower resistance-variable layer including a first transition metal oxide on the lower electrode layer, forming a second transition metal layer on the lower resistance- And forming an upper electrode layer on the upper resistance-variable layer, wherein in the step of forming the upper resistance-variable layer, the amount of the oxygen source is controlled so that the upper resistance- The second transition metal oxide may be one which produces less oxygen than the first transition metal oxide.

The diffusion resistance of the active metal ion constituting the conductive filament may be higher than that of the lower resistance variable layer.

Wherein the first transition metal oxide may be one containing SiO _2, TiO _2, HfO ₂ or Al ₂ O _3.

The upper resistance-variable layer may have a thickness of 3 nm to 5 nm.

And may be formed to a thickness of 1 nm to 2 nm of the lower resistance-variable layer.

According to the present invention, by using the double resistance variable layer having a high active metal ion diffusion degree, a low forming voltage and a high on / off resistance ratio are enabled, thereby facilitating fabrication of the device.

The technical effects of the present invention are not limited to those mentioned above, and other technical effects not mentioned can be clearly understood by those skilled in the art from the following description.

1 is a structural diagram of a resistance change memory according to a first embodiment of the present invention.
FIGS. 2A and 2B are structural diagrams showing a case where a positive voltage is applied to the resistance change memory according to Comparative Example 1 and the production example of the present invention, respectively.
3A and 3B are structural diagrams showing a case where a negative voltage is applied to the resistance change memory according to Comparative Example 1 and the production example of the present invention, respectively.
FIG. 4 is a graph showing electrical switching characteristics when the filament is formed in the resistance change memory according to the production example of the present invention and Comparative Example 1. FIG.
FIG. 5 is a graph showing electrical switching characteristics when the filament disappears in the resistance change memory according to the production example of the present invention and Comparative Example 1. FIG.
6 is a graph showing the electrical switching characteristics of the resistance change memory according to the manufacturing example of the present invention.
7 is a graph showing the characteristics of evaluating the filament stability of the resistance change memory according to Experimental Examples 1, 2 and 3 of the present invention.
8 is a graph showing distribution of on / off resistance states of the resistance change memory according to the production example of the present invention and Comparative Example 2. Fig.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

While the invention is susceptible to various modifications and alternative forms, specific embodiments thereof are shown by way of example in the drawings and will herein be described in detail. Rather, the intention is not to limit the invention to the particular forms disclosed, but rather, the invention includes all modifications, equivalents and substitutions that are consistent with the spirit of the invention as defined by the claims.

It will be appreciated that when an element such as a layer, region or substrate is referred to as being present on another element "on," it may be directly on the other element or there may be an intermediate element in between .

Although the terms first, second, etc. may be used to describe various elements, components, regions, layers and / or regions, such elements, components, regions, layers and / And should not be limited by these terms.

1 is a structural diagram of a resistance change memory according to a first embodiment of the present invention.

Referring to FIG. 1, the resistance change memory according to the first embodiment of the present invention includes a substrate, a lower electrode layer disposed on the substrate, a resistive element disposed on the lower electrode layer and having a resistance change due to generation and disappearance of the conductive filament, And an upper electrode layer disposed on the variable resistance layer and including active metal ions participating in generation and disappearance of the conductive filament, wherein the resistance variable layer is disposed on the lower electrode layer and includes a first transition metal oxide And an upper resistance-variable layer which is located on the lower resistance-variable layer and includes a second transition metal oxide, wherein the second transition metal oxide has a lower oxygen content than the first transition metal oxide And less.

More specifically, the lower electrode layer 100 may be positioned on a substrate (not shown). The substrate may comprise Si. The material of the lower electrode layer 100 may be any material having low ionization degree, low diffusibility, and high inertness. For example, the lower electrode layer 100 may include Pt, Ir, W, Au, Ru, or TiN.

The lower electrode layer 100 may be formed by sputtering, RF sputtering, RF magnetron sputtering, pulsed laser deposition (PLD), chemical vapor deposition (CVD), plasma enhanced chemical vapor deposition PECVD, Plasma Enhanced Chemical Vapor Deposition (ALD), Electron Beam Evaporator (MBE), or Molecular Beam Epitaxy (MBE).

For example, a W lower electrode layer can be formed on a Si substrate using a plasma enhanced chemical vapor deposition method.

Then, the lower resistance-variable layer 200a may be positioned on the lower electrode layer 100. [ The lower resistance-variable layer 200a may include a first transition metal oxide. The first transition metal oxide may be any one of transition metal oxide series. For example, the first transition metal oxide may include SiO ₂ , TiO ₂ , HfO _2, or Al ₂ O ₃ . In addition, the composition of the oxide is not limited to the stoichiometric composition ratio mentioned in the examples.

The lower resistance-variable layer 200a may be formed by a sputtering method, an RF sputtering method, an RF magnetron sputtering method, a pulse laser deposition method, a chemical vapor deposition method, a plasma enhanced chemical vapor deposition method, an atomic layer deposition method, an electron beam deposition method, or a molecular beam epitaxy deposition method . For example, a TiO ₂ insulating layer can be formed on the lower electrode layer 100 using an atomic layer deposition method.

The upper resistance-variable layer 200b may be positioned on the lower resistance-variable layer 200a. The upper resistance-variable layer 200b may include a second transition metal oxide. The second transition metal oxide may be any of transition metal oxide series. For example, the second transition metal oxide may be SiO _x (x is 1 to 2), TiO _x (x is 1 to 2) _, HfO _x (x is 1 to 2) or Al ₂ O _x (x is 1.5 to 3).

At this time, the composition of the oxide may be oxygen deficient compared to the stoichiometric composition ratio mentioned in the examples. The upper and lower resistance-variable layers 200a and 200b may have a resistance change due to the generation and disappearance of the conductive filament.

More specifically, the second transition metal oxide constituting the upper resistance-variable layer 200b can smoothly move the active metal ion while maintaining the oxygen-deficient state, thereby making it possible to produce the filament. In addition, the first transition metal oxide may have a higher degree of diffusion of active metal ions than the second transition metal oxide composing the upper resistance-variable layer 200b.

The upper resistance variable layer 200b may be formed using a sputtering method, an RF sputtering method, an RF magnetron sputtering method, a pulse laser deposition method, a chemical vapor deposition method, a plasma enhanced chemical vapor deposition method, an atomic layer deposition method, an electron beam deposition method, or a molecular beam epitaxy deposition method can do. For example, an Al ₂ O ₃ insulating layer may be formed on the lower resistance-variable layer 200a using an atomic layer deposition method.

At this time, the non-stoichiometric resistance variable layer can be formed by controlling the amount of the oxygen source in the atomic layer deposition method.

The thickness of the lower resistance-variable layer 200a may be smaller than the thickness of the upper resistance-variable layer 200b. For example, the thickness of the lower resistance-variable layer 200a may be 1 nm to 2 nm. The thickness of the upper resistance-variable layer 200b may be 3 nm to 5 nm. When the thickness of the resistance variable layers 200a and 200b is thicker than the above range, uniform switching may not be realized due to excessive supply of voltage necessary for filament formation.

Then, the upper electrode layer 300 may be positioned on the upper resistance-variable layer 200b. The upper electrode layer 300 may be an active metal ion supply layer that participates in the generation and disappearance of conductive filaments. That is, the conductive filament can be generated and destroyed by the redox reaction of the active metal ions permeated from the upper electrode layer 300.

Accordingly, the material of the upper electrode layer 300 is high in ionization degree and has high activity, and any material that can move and generate conductive filaments by external electrical stimulation (voltage or current) will be possible. For example, the upper electrode layer 300 may include Cu, Ag, Ni, or Cr.

The upper electrode layer 300 may be formed by sputtering, RF sputtering, RF magnetron sputtering, pulsed laser deposition, chemical vapor deposition, plasma enhanced chemical vapor deposition, atomic layer deposition, electron beam deposition or molecular beam epitaxy have. For example, the Cu upper electrode layer can be formed by sputtering in an Ar gas atmosphere.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the present invention is not limited to the embodiments described herein but may be embodied in other forms.

double The resistance variable layer Resistance change memory fabrication

First, a W lower electrode layer was deposited on a Si substrate to a thickness of about 90 nm by plasma enhanced chemical vapor deposition.

Next, SiO ₂ was deposited to a thickness of 100 nm by plasma enhanced chemical vapor deposition (CVD) in order to form a via hole (VIA-hole) structure in the lower electrode layer.

At this time, the SiO ₂ layer is formed with a 200 nm via-hole structure by photolithography and reactive ion etching (RIE).

Then, a TiO ₂ lower resistance variable layer was deposited to a thickness of about 1 nm on the via-hole structure by an atomic layer deposition method at 200 ° C.

Next, an Al ₂ O ₃ insulating layer was deposited on the lower resistance variable layer to a thickness of about 3 nm by an atomic layer deposition method at a temperature of 200 ° C. through a production method lacking oxygen. Finally, a Cu upper electrode layer was deposited to a thickness of about 50 nm by sputtering.

&Lt; Comparative Example 1 &

Instead of fabricating a dual resistance variable layer with a lower resistance variable layer and an upper resistance variable layer as in the manufacturing example, a stoichiometric Al ₂ O ₃ resistance variable layer (single layer) was formed at about 3 nm thick On the lower electrode layer.

&Lt; Comparative Example 2 &

Instead of fabricating the dual resistance-modifiable layer with the lower resistance-modifiable layer and the upper resistance-modifiable layer as in the production example, the Al ₂ O ₃ insulating layer was grown at 200 ° C in a non-stoichiometric insulating layer (single layer) Was deposited on the lower electrode layer to a thickness of about 3 nm using an atomic layer deposition method.

FIGS. 2A and 2B are structural diagrams showing a case where a positive voltage is applied to the resistance change memory according to Comparative Example 1 and the production example of the present invention, respectively.

2A shows a structure in which the resistance change memory is switched to a low resistance state and an ON state when a positive electrode voltage is applied to the upper electrode layer 300 of the resistance change memory having a single resistance variable layer structure as in Comparative Example 1. FIG.

2A, if a positive electrode voltage is applied to the upper electrode layer 300, active metal ions of the ionized upper electrode layer 300 move to form a conductive filament 211 in the single resistance-variable layer 201 can do. By the conductive filament 211 formed at this time, the resistance change memory becomes a low resistance state in which the current flows well.

At this time, if the single resistance-variable layer 201 having a low stoichiometric composition with a low ion-diffusivity is used, the voltage required to generate the filament increases, and active metal ions for constituting the filament can be supplied .

More specifically, FIG. 2B is a diagram showing a structure in which the resistance change memory is switched to a low resistance state and an ON state when a positive electrode voltage is applied to an upper electrode layer of a resistance change memory including a dual resistance variable layer .

Referring to FIG. 2B, when an anode voltage is applied to the upper electrode layer 300, active metal ions of the ionized upper electrode layer 300 move to form an upper resistance variable layer 200b and a lower resistance variable layer 200a The conductive filament 210 may be formed inside the dual resistance variable layer.

By the conductive filament 210 formed at this time, the resistance change memory can be in a low resistance state in which current flows well. At this time, if the double resistance variable layer having a nonstoichiometric composition ratio having a high ion diffusivity is used, the voltage required to generate the filament is lowered, and only a small amount of the active metal ion for constituting the filament can be supplied. Further, by using the lower resistance-variable layer 200a having a high active metal ion diffusion degree, the effect of suppressing the leakage current without increasing the switching voltage can be exhibited.

FIGS. 3A and 3B are structural diagrams showing a case where a negative voltage is applied to the resistance change memory according to the production example of the present invention and Comparative Example 1, respectively.

Specifically, FIG. 3A is a structure diagram of the resistance change memory when the negative electrode voltage is applied to the upper electrode layer of the control variable resistance memory having a single resistance variable layer structure, as shown in Comparative Example 1, to a high resistance state and an OFF state.

3A, when a negative voltage is applied to the upper electrode layer 300, the active metal particles constituting the filament move toward the upper electrode layer 300 due to an electric field and a resistance heat, resulting in the extinction of the filament. As a result, the resistance change memory can again be in a high resistance state.

However, residual active metal particles and metal ions 212 that have not been completely removed remain in the insulator, allowing a higher current to flow than in the initial insulator state. Further, in the case of the resistance-variable memory element including the single resistance-variable layer 201 having a low active metal ion diffusion degree, the amount of the initially injected ions is large, so that the number of the remaining active metal particles and the metal ions 212 increases, A process of forming the oxygen vacancies 212 from the lower electrode layer 100 may occur. At this time, the oxygen vacancies 212 may cause a problem of causing a higher leakage current by reducing the movement path of electrons.

3B is a diagram illustrating a structure in which a resistance change memory is switched to a high resistance state or an OFF state when a negative electrode voltage is applied to an upper electrode layer of the resistance change memory having a double resistance variable layer structure as in the production example of the present invention .

Referring to FIG. 3B, when the negative electrode voltage is applied to the upper electrode layer 300, active metal particles constituting the filament move toward the upper electrode layer 300 due to an electric field and a resistance heat, and the filament may be destroyed. As a result, the resistance change memory can again be in a high resistance state. However, residual active metal particles and metal ions 211 that have not been completely removed remain in the insulator, so that a current higher than the initial insulator state may flow. At this time, in the case of the dual resistance-variable layer memory device having a high active metal ion diffusion degree, the amount of the initially injected ions is small, so that the remaining active metal particles 211 are reduced. Thus, the off- Oxygen vacancies are not produced, and a low leakage current state can be enabled. In addition, the lower resistance-variable layer 200a having high active metal ion diffusion can also help to reduce the amount of the remaining active metal particles 211 by helping off-switching behavior of the active metal ions.

FIG. 4 is a graph showing electrical switching characteristics when a filament is formed in the resistance change memory according to the production example of the present invention and Comparative Examples 1 and 2. FIG.

Referring to FIG. 4, when a positive electrode voltage is applied to the upper electrode layer, a conductive filament is formed in the insulation layer, forming a resistance change memory, and the resistance change memory may become a low resistance state (LRS). In order to prevent the filaments from becoming too thick during the formation of the filaments or from flowing a lot of current and destroying the devices, a complance current value is set. Filaments are generated in the resistance change memory by the designated value. When the negative electrode voltage is applied to the upper electrode layer in the opposite direction, the filament is extinguished by the electric field and the resistance heat, and reset occurs. The device may then return to the high resistance state (HRS). Repetition of the filament formation (the formation of the second filament is referred to as a set process) and the resetting process are repeated while data is stored in the device and erased.

Filament was formed by applying the same compliance rate to each of Comparative Examples 1 and 2 and Production Example. As a result, the memory device having the dual resistance-variable layer according to the manufacturing example of the present invention can exhibit a low forming current and a low forming current.

This may be due to the increase in the tunneling distance of the electrons and the easier movement of the active metal ions due to the introduction of the non-stoichiometric upper resistance-variable layer and the lower resistance-variable layer with high active metal ion diffusion.

FIG. 5 is a graph showing electrical switching characteristics when the filament disappears in the resistance change memory according to the production example of the present invention and Comparative Example 1. FIG.

5 is a graph showing the relationship between the conductivity-voltage (FIG. 5) and the resistance-change memory in the reset process in which the cathode voltage is applied to the upper electrode layer of the resistance change memory of the comparative example and the resistance- conductance-voltage graph.

Referring to FIG. 5, in the case of the memory device fabricated according to the manufacturing example, the conductivity value is continuously decreased as the negative electrode voltage is applied to the upper electrode layer, and the reset is completed. On the other hand, It can be observed that the conductivity value increases during the process.

This can be considered as a change in conductivity with or without generation of oxygen vacancies in the reset process mentioned in FIGS. 3A and 3B. As shown in FIG. 3B, in the memory device according to the manufacturing example, the filament is annihilated even under a low voltage condition due to the lower resistance variable layer having a high active metal ion diffusion degree and a low forming voltage. On the other hand, In the case of the device, a high cathode voltage is required in the reset process due to the formation of thick filaments, and thus, an oxygen vacancy is generated at the interface between the lower electrode layer and the resistance variable layer, thereby failing to completely block the leakage current after reset .

6 is a graph showing the electrical switching characteristics of the resistance change memory according to the manufacturing example of the present invention.

Specifically, FIG. 6 is a graph of current-voltage appearing during switching under the DC voltage condition of the memory device manufactured according to the manufacturing example.

Referring to FIG. 6, not only a high on / off resistance ratio but also a forming-less operation behavior in which the filament forming process and the voltage required in the set process are the same. This eliminates the necessary forming process after the fabrication of the resistance change memory device, thereby solving the circuit and device problems that may occur in the forming process.

Oxygenated Degree of deficiency A different one The resistance variable layer Resistance change memory fabrication

A resistance change memory was fabricated in accordance with the manufacturing method according to the above-described manufacturing example, except that the Al ₂ O ₃ insulating layer was made of a double resistance variable layer with a degree of oxygen deficiency of 20%.

A resistance change memory was fabricated in accordance with the manufacturing method according to the above-described production example, except that the oxygen deficiency degree of the Al ₂ O ₃ insulating layer was 28% as a double resistance variable layer.

A resistance change memory was fabricated according to the manufacturing method according to the above-described production example, except that the oxygen deficiency degree of the Al ₂ O ₃ insulating layer was 32% as a double resistance variable layer.

7 is a graph showing the characteristics of evaluating the filament stability of the resistance change memory according to Experimental Examples 1, 2 and 3 of the present invention.

Specifically, FIG. 7 shows the results of thermal stability and retention evaluation of formed filaments according to the degree of oxygen deficiency in the upper resistance variable layer of the memory device fabricated according to Experimental Examples 1, 2 and 3 will be.

Referring to FIG. 7, it can be seen that when the degree of oxygen deficiency of the transition metal oxide is larger, the filament is unstable, and when the oxygen vacancy is arbitrarily made, it has a high active metal ion diffusion degree and the excellent retention characteristic And a high ON / OFF resistance ratio can be obtained.

8 is a graph showing distribution of on / off resistance states of the resistance change memory according to the production example and the comparative example of the present invention.

Referring to FIG. 8, the reset process is promoted by introducing the lower resistance variable layer having a high active metal ion diffusion degree, and the resistance value in the high resistance state is increased, so that a high on / off resistance ratio can be obtained. In addition, it can be seen that the tunneling distance of the electrons is extended due to the increase of the thickness of the physical insulator.

It should be noted that the embodiments of the present invention disclosed in the present specification and drawings are only illustrative of specific examples for the purpose of understanding and are not intended to limit the scope of the present invention. It will be apparent to those skilled in the art that other modifications based on the technical idea of the present invention are possible in addition to the embodiments disclosed herein.

100: lower electrode layer 200a: lower resistance variable layer
200b: upper resistance variable layer 201: single resistance variable layer
210: Conductive filament 211: Remaining active metal particles
212: hole 300 of oxygen: upper electrode layer

Claims

Board;
A lower electrode layer disposed on the substrate;
A resistance-variable layer located on the lower electrode layer and having a resistance change due to generation and disappearance of the conductive filament; And
And an upper electrode layer disposed on the resistance variable layer and including active metal ions participating in generation and disappearance of the conductive filament,
The resistance-
A lower resistance-variable layer located on the lower electrode layer and including a first transition metal oxide; And
And an upper resistance variable layer positioned on the lower resistance variable layer and including a second transition metal oxide,
Wherein the second transition metal oxide has a lower oxygen content than the first transition metal oxide,
Wherein the lower resistance-variable layer has a higher diffusivity of active metal ions constituting the conductive filament than the upper resistance-variable layer,
Wherein the first transition metal oxide is TiO ₂ and the second transition metal oxide is Al ₂ Ox (2.4 <x <2.6).

delete

The method according to claim 1,
And the thickness of the upper resistance-variable layer is 3 nm to 5 nm.

The method according to claim 1,
And the thickness of the lower resistance-variable layer is 1 nm to 2 nm.

The method according to claim 1,
Wherein the conductive filament is generated and destroyed by a redox reaction of the active metal ion permeated from the upper electrode layer.

The method according to claim 1,
Wherein the upper electrode layer comprises Cu, Ag, Ni or Cr.

The method according to claim 1,
Wherein the lower electrode layer comprises Pt, Ir, W, Au, Ru, or TiN.

Forming a lower electrode layer on the substrate;
Forming a lower resistance-variable layer including a first transition metal oxide on the lower electrode layer;
Forming an upper resistance-variable layer including a second transition metal oxide on the lower resistance-variable layer; And
And forming an upper electrode layer on the upper resistance-variable layer,
Characterized in that in the step of forming the upper resistance-variable layer, the amount of the oxygen source is adjusted so that the second transition metal oxide is made to have an oxygen content lower than that of the first transition metal oxide,
The lower resistance-variable layer is characterized in that the active metal ions constituting the conductive filament are higher in diffusivity than the upper resistance-variable layer,
Wherein the first transition metal oxide is TiO ₂ and the second transition metal oxide is Al ₂ Ox (2.4 <x <2.6).

delete

11. The method of claim 10,
Wherein the upper resistance-variable layer is formed to a thickness of 3 nm to 5 nm.

11. The method of claim 10,
Wherein the lower resistance-variable layer is formed to have a thickness of 1 nm to 2 nm of the lower resistance-variable layer.