KR101834262B1 - 하이브리드 트랜잭션 메모리 시스템에서 최대 동시실행을 가능케 하기 - Google Patents

하이브리드 트랜잭션 메모리 시스템에서 최대 동시실행을 가능케 하기 Download PDF

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KR101834262B1
KR101834262B1 KR1020167023088A KR20167023088A KR101834262B1 KR 101834262 B1 KR101834262 B1 KR 101834262B1 KR 1020167023088 A KR1020167023088 A KR 1020167023088A KR 20167023088 A KR20167023088 A KR 20167023088A KR 101834262 B1 KR101834262 B1 KR 101834262B1
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transaction
software
hardware
mode
commit
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KR20160113207A (ko
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이리나 칼시우
저스틴 이. 고트쉴리히
타티아나 쉬페이즈만
질스 에이. 포캄
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인텔 코포레이션
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/466Transaction processing
    • G06F9/467Transactional memory
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/52Program synchronisation; Mutual exclusion, e.g. by means of semaphores
    • G06F9/526Mutual exclusion algorithms
    • G06F9/528Mutual exclusion algorithms by using speculative mechanisms

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
  • Executing Machine-Instructions (AREA)
KR1020167023088A 2014-03-26 2015-03-25 하이브리드 트랜잭션 메모리 시스템에서 최대 동시실행을 가능케 하기 KR101834262B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/225,804 US9971627B2 (en) 2014-03-26 2014-03-26 Enabling maximum concurrency in a hybrid transactional memory system
US14/225,804 2014-03-26
PCT/US2015/022394 WO2015148608A1 (en) 2014-03-26 2015-03-25 Enabling maximum concurrency in a hybrid transactional memory system

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KR20160113207A KR20160113207A (ko) 2016-09-28
KR101834262B1 true KR101834262B1 (ko) 2018-04-13

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KR1020167023088A KR101834262B1 (ko) 2014-03-26 2015-03-25 하이브리드 트랜잭션 메모리 시스템에서 최대 동시실행을 가능케 하기

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US (1) US9971627B2 (ja)
EP (1) EP3123306A4 (ja)
JP (1) JP6304845B2 (ja)
KR (1) KR101834262B1 (ja)
CN (1) CN106062707A (ja)
WO (1) WO2015148608A1 (ja)

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Also Published As

Publication number Publication date
JP2017509970A (ja) 2017-04-06
US9971627B2 (en) 2018-05-15
EP3123306A1 (en) 2017-02-01
US20150277967A1 (en) 2015-10-01
CN106062707A (zh) 2016-10-26
KR20160113207A (ko) 2016-09-28
WO2015148608A1 (en) 2015-10-01
EP3123306A4 (en) 2017-11-22
JP6304845B2 (ja) 2018-04-04

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