KR101813713B1 - Liquid Crystal Display Device and Driving Method thereof - Google Patents

Abstract

An embodiment of the present invention is a liquid crystal display device comprising: a liquid crystal panel; A gate driver for supplying a gate signal to the liquid crystal panel; A power supply for supplying a voltage to the gate driver; And a discharge control unit for supplying the discharge signal so that the liquid crystal panel is delayed to a discharge level having hysteresis and discharged when the input power of the power source unit is down.

Description

[0001] The present invention relates to a liquid crystal display device and a driving method thereof,

An embodiment of the present invention relates to a liquid crystal display and a driving method thereof.

As the information technology is developed, the market of display devices, which is a connection medium between users and information, is getting larger. Accordingly, a flat panel display (FPD) such as a liquid crystal display (LCD), an organic light emitting diode (OLED), and a plasma display panel (PDP) Usage is increasing. Among them, liquid crystal display devices capable of realizing high resolution and capable of not only miniaturization but also enlargement are widely used.

The liquid crystal display device includes a liquid crystal panel composed of a transistor substrate formed with a transistor, a storage capacitor, a pixel electrode, and the like, and a liquid crystal layer positioned between a color filter substrate and a color filter substrate on which a color filter and a black matrix are formed.

When a gate signal is supplied from a gate driver to a liquid crystal display device, a liquid crystal layer is driven by a difference between a data voltage supplied from the data driver and a common voltage supplied from the power supply, thereby controlling light incident from the backlight unit So that the image is displayed.

On the other hand, the liquid crystal display device includes a driver for driving the liquid crystal display device and a discharge control part for discharging the electric charge charged in the liquid crystal panel when the power supply part is turned off. The conventional discharge control unit is designed such that the discharge operation is performed at a voltage lower than the discharge level when the power supply unit is turned off.

FIG. 1 is a view for explaining a phenomenon caused by a conventional discharge control unit.

As shown in FIG. 1, when the power supply of the power supply unit is turned down, the power supply unit is repeatedly turned on and off, and the conventional discharge control unit is repeatedly turned on and off. Thereafter, when the power source unit repeatedly turns on and off, and the input power source continuously lowers, the power source unit is completely turned off and discharged. Here, DSCG ON / OFF indicates the turn-on and turn-off time of the discharge control unit, UVLO ON / OFF indicates the turn-on and turn-off time of the power source unit (PWR IC), Vin indicates the input power source of the power source unit (PWR IC) The DSCG indicates the discharge level.

However, the conventional discharge control section supplies a discharge signal having a low discharge level. Therefore, there is a problem that it is difficult to perform a normal discharge operation because a malfunction occurs such as "TP1 " and" TP2 "while the discharge is proceeding on the liquid crystal panel.

According to an embodiment of the present invention, when the input power source of the power source unit is down, the liquid crystal panel is delayed and discharged by a discharge level having hysteresis to cause an abnormal discharge The present invention also provides a liquid crystal display device and a method of driving the same.

According to an embodiment of the present invention, there is provided a liquid crystal display device comprising: a liquid crystal panel; A gate driver for supplying a gate signal to the liquid crystal panel; A power supply for supplying a voltage to the gate driver; And a discharge control unit for supplying the discharge signal so that the liquid crystal panel is delayed to a discharge level having hysteresis and discharged when the input power of the power source unit is down.

The discharge control unit can supply the discharge signal through the gate driving unit.

The discharge control section can supply a discharge signal when the input power source of the power source section is located at an intermediate level between the ground voltage.

The discharge control section turns off the power supply section when the input power of the power supply section is lower than the middle level at which the discharge signal is supplied and turns on the power supply section when the input power supply of the power supply section is higher than the middle level to which the discharge signal is supplied, The discharge signal can be cut off before the input power of the power supply unit reaches the stabilization level.

The discharge control unit includes a discharge unit for discharging the liquid crystal panel, a power source control unit for turning on or off the power source unit, a sensing voltage generation unit for sensing the input power source of the power source unit to generate a sensing voltage, And a reference voltage generator for generating reference voltages based on the reference voltage.

The discharge unit and the power control unit may be actively controlled by the voltages supplied from the sensing voltage generating unit and the reference voltage generating unit.

The discharge unit includes a first comparator for generating a first logic voltage based on the sensing voltage and a discharge signal on voltage, a second comparator for generating a second logic voltage based on the sensing voltage and the discharge signal off- And a first SR latch unit for generating a discharge signal based on the first and second logic voltages supplied from the first comparator and the second comparator, wherein the power controller controls the third and fourth logic gates based on the sensing voltage and the power- A fourth comparator for generating a fourth logic voltage based on the sensing voltage and the power source on reference voltage, and a third comparing unit for comparing the third and fourth voltages supplied from the third comparing unit and the fourth comparing unit, And a second SR latch unit for generating a power supply control signal for turning on or off the power supply unit based on the fourth logic voltage.

The sensing voltage generation unit includes a first resistor and a second resistor that divide the input power of the power supply unit so as to generate a sensing voltage. The reference voltage generation unit includes a discharge signal off reference voltage, a power supply on reference voltage, a discharge signal on reference voltage, And a third resistor to a seventh resistor for dividing the power supply voltage output from the power supply unit to a plurality of levels to generate a reference voltage.

According to another aspect of the present invention, there is provided a method of controlling a power supply, Supplying a discharge signal such that the liquid crystal panel is delayed to a discharge level having hysteresis and discharged when the input power of the power source unit is down; Adjusting the discharge signal with reference to the input power of the power supply unit and turning off the power supply unit; And turning off the power supply while blocking the discharge signal with reference to the input power of the power supply unit when the input power of the power supply unit is turned on.

The step of supplying the discharging signal may supply the discharging signal when the input power source of the power source unit is located at the middle level between the low voltage.

The step of supplying the discharging signal or turning on the power supply part turns off the power supply part when the input power of the power supply part is lower than the middle level at which the discharging signal is supplied and when the input power of the power supply part is higher than the middle level, And after the power supply unit is turned on, the discharge signal can be cut off before the input power of the power supply unit reaches the stabilization level.

The step of supplying the discharging signal or the step of turning on the power supply may be actively controlled by sensing the input power of the power supply and sensing voltages based on the sensing voltage and the measured values of the characteristic values of the liquid crystal display.

In the embodiment of the present invention, when the input power source of the power source unit is down, the liquid crystal panel is delayed and discharged by the discharge level having hysteresis, thereby preventing abnormal discharge that may occur during the progress of the discharge, It is possible to provide a liquid crystal display device and a method of driving the same.

1 is a view for explaining a phenomenon caused by a conventional discharge control unit;
2 is a block diagram of a liquid crystal display device.
3 is a block diagram of a gate driver;
4 is a block diagram of a data driver;
FIG. 5 is a schematic view for explaining a discharge control unit of a liquid crystal display according to an embodiment of the present invention; FIG.
6 is a view for explaining a discharge phenomenon according to the operating characteristics of the discharge control section shown in Fig.
7 is a schematic configuration diagram of a discharge control unit according to an embodiment of the present invention;
8 is a detailed configuration diagram of a discharge control unit according to an embodiment of the present invention;
9 is a flowchart illustrating a method of driving a liquid crystal display device according to another embodiment of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 2 is a block diagram of a liquid crystal display, FIG. 3 is a block diagram of a gate driver, and FIG. 4 is a block diagram of a data driver.

2, the liquid crystal display includes a timing driver TCN, a liquid crystal panel PNL, a gate driver SDRV, a data driver DDRV, a backlight unit BLU, a power source PWR, DIS).

The timing driver TCN receives a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, a data enable signal DE, a clock signal CLK and a data signal DATA from the outside. The timing driver TCN supplies data signals to the data driver DDRV and the data driver DDRV using timing signals such as a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, a data enable signal DE, and a clock signal CLK. And controls the operation timing of the driving unit SDRV.

The timing driver TCN can count the data enable signal DE in one horizontal period to determine the frame period so that the externally supplied vertical sync signal Vsync and horizontal sync signal Hsync can be omitted. The timing driver TCN generates control signals GDC and DDC for controlling the panel driver for driving the liquid crystal panel PNL such as the gate driver SDRV and the data driver DDRV. The control signals GDC and DDC are supplied with a gate timing control signal GDC for controlling the operation timing of the gate driver SDRV and a data timing control signal DDC for controlling the operation timing of the data driver DDRV. .

The liquid crystal panel (PNL) includes subpixels arranged in a matrix including a liquid crystal layer positioned between a transistor substrate (hereinafter abbreviated as TFT substrate) and a color filter substrate. A data line, a gate line, a thin film transistor, a storage capacitor, and the like are formed on the TFT substrate, and a black matrix, a color filter and the like are formed on the color filter substrate.

The subpixel SP is defined by a data line DL1 and a gate line GL1 which cross each other. The subpixel SP includes a thin film transistor TFT driven by a gate signal supplied through a gate line GL1, a storage capacitor Cst for storing a data signal supplied through the data line DL1 as a data voltage, And a liquid crystal cell Clc driven by the data voltage stored in the storage capacitor Cst.

The liquid crystal cell Clc is driven by the data voltage supplied to the pixel electrode 1 and the common voltage Vcom supplied to the common electrode 2. [ The common electrode is formed on a color filter substrate in a vertical field driving method such as a TN (Twisted Nematic) mode and a VA (Vertical Alignment) mode, and a horizontal electric field such as IPS (In Plane Switching) mode and FFS (Fringe Field Switching) Is formed on the TFT substrate together with the pixel electrode in the driving method. A polarizing plate is attached to the TFT substrate of the liquid crystal panel (PNL) and the color filter substrate, and an alignment film for setting a pre-tilt angle of the liquid crystal is formed. The liquid crystal mode of the liquid crystal panel PNL can be implemented in any liquid crystal mode as well as the TN mode, VA mode, IPS mode, and FFS mode described above.

The gate driving unit SDRV is responsive to the gate timing control signal GDC supplied from the timing driving unit TCN to turn on the gate driving voltage of the transistors of the subpixels SP included in the display panel PNL And sequentially generates the gate signal while shifting the level of the signal. The gate driver SDRV supplies the gate signal generated through the gate lines GL1 to GLm to the subpixels SP included in the display panel PNL.

As shown in FIG. 3, the gate driver SDRV is composed of gate drive ICs. The gate drive ICs each include a shift register 61, a level shifter 63, a plurality of AND gates 62 and a gate output enable signal GOE connected between the shift register 61 and the level shifter 63, And an inverter 64 for inverting the inverter 64 and the like. The shift register 61 shifts the gate start pulse GSP sequentially in accordance with the gate shift clock GSC using a plurality of D flip-flops depending thereon. The AND gates 62 logically multiply the output signal of the shift register 61 and the inverted signal of the gate output enable signal GOE to generate an output. The inverter 64 inverts the gate output enable signal GOE and supplies it to the AND gates 62. The level shifter 63 shifts the output voltage swing width of the end gate 62 to the swing width of the gate voltage at which the transistors included in the display panel PNL are operable. The gate signal output from the level shifter 63 is sequentially supplied to the gate lines GL1 to GLm. On the other hand, the gate driver SDRV discharges the liquid crystal panel PNL when the discharge signal DSCG is supplied from the discharge controller DIS.

The data driver DDRV samples and latches the data signal DATA supplied from the timing driver TCN in response to the data timing control signal DDC supplied from the timing driver TCN and converts the sampled data signal into data of a parallel data system . The data driver DDRV converts the data signal DATA into a gamma reference voltage when converting into data of a parallel data system. The data driver DDRV supplies the data signal DATA converted through the data lines DL1 to DLn to the subpixels SP included in the display panel PNL.

A shift register 51, a data register 52, a first latch 53, a second latch 54, a conversion section 55, an output circuit 56, and the like, as shown in FIG. The shift register 51 shifts the source sampling clock SSC supplied from the timing driver TCN. The shift register 51 transfers the carry signal CAR to the shift register of the next source drive IC in the neighboring stage. The data register 52 temporarily stores the data signal DATA supplied from the timing driver TCN and supplies it to the first latch 53. The first latch 53 samples and latches the data signal DATA serially input according to the clocks sequentially supplied from the shift register 51, and outputs the latched data at the same time. The second latch 54 latches the data supplied from the first latch 53 and then latches the latched data in synchronization with the second latch 54 of the other source drive ICs in response to the source output enable signal SOE Simultaneously output. The conversion unit 55 converts the data signal DATA input from the second latch 54 based on the gamma reference voltages GMA1 to GMAn. The data signal DATA output from the output circuit 56 is supplied to the data lines DL1 to DLn in response to the source output enable signal SOE.

The backlight unit (BLU) provides light to the liquid crystal panel (PNL). The backlight unit BLU includes a light source unit including light emitting sources, driving transistors for driving light emitting sources, and an optical mechanism including a cover bottom, a light guide plate, and an optical sheet. The backlight unit (BLU) may be variously configured as an edge type, a dual type, a direct type, and the like. In the edge type, the light emitting diodes are arranged in a line (or string) shape on one side of the liquid crystal panel PNL. In the dual type, light emitting diodes are arranged in a line (or string) form on both sides of a liquid crystal panel (PNL). In the direct type, light emitting diodes are arranged in a block or matrix form in the lower part of the liquid crystal panel (PNL).

The power supply unit PWR generates input power supplied from the outside as a driving voltage and supplies the generated driving voltage to the timing driver TCN, the liquid crystal panel PNL, the gate driver SDRV, the data driver DDRV, ). ≪ / RTI > The driving voltage generated from the power supply unit PWR includes a power supply voltage VDD, a logic power supply voltage VCC, a gate high voltage VGH, a gate low voltage VGL, a common voltage VCOM, Reference voltages (GMA1 to GMAn), and the like. Here, the power supply voltage VDD and the logic power supply voltage VCC are voltages for driving the driving unit, and the gate high voltage VGH and the gate low voltage VGL are set such that the gate driver SDRV generates a gate signal And the common voltage VCOM becomes a voltage supplied to the liquid crystal panel PNL and the positive and negative gamma reference voltages GMA1 to GMAn are set to a voltage for generating the gamma voltage by the data driver DDRV .

The discharge control unit DIS supplies the discharge signal DSCG so that the liquid crystal panel PNL is delayed to a discharge level having hysteresis and discharged when the input power source of the power source unit PWR is down. The discharge control unit DIS supplies the power unit control signal PCS to the power supply unit PWR in order to control not only the liquid crystal panel PNL but also the power supply unit PWR.

The discharge control unit DIS will be described in more detail below.

Hereinafter, a liquid crystal display device according to an embodiment of the present invention will be described in more detail.

FIG. 5 is a schematic diagram for explaining a discharge control unit of a liquid crystal display according to an embodiment of the present invention, and FIG. 6 is a view for explaining a discharge phenomenon according to operation characteristics of the discharge control unit shown in FIG. 5 .

2, 5, and 6, a liquid crystal display device according to an embodiment of the present invention includes a discharge unit DCHG for discharging a liquid crystal panel PNL, a power source unit PWR, ) Or a power supply control unit (UVLO) which turns off (PWR OFF).

Here, the subpixel SP having the thin film transistor TFT connected to the gate line GL and the data line DL is equivalent to the liquid crystal panel PNL, and "Cp" Parasitic capacitance. The level shifter 63 is equivalent to the gate driver SDRV.

As described above, the discharge control unit DIS supplies the discharge signal DSCG so that the liquid crystal panel PNL is delayed to the discharge level having hysteresis and discharged when the input power source Vin of the power source unit PWR is down. Discharging in Figure 6)

The discharge portion DCHG of the discharge control portion DIS supplies the discharge signal DSCG through the gate driving portion SDRV. When the discharge unit DCHG supplies the discharge signal DSCG through the gate driving unit SDRV, the charges charged in all of the subpixels SP included in the liquid crystal panel PNL are transferred to the data lines DL ).

Meanwhile, when the input power source Vin of the power source unit PWR is down, the discharge control unit DIS operates as follows to delay and discharge the liquid crystal panel PNL with hysteresis.

The discharge unit DCHG of the discharge control unit DIS supplies the discharge signal DSCG when the input power supply Vin of the power supply unit PWR is at an intermediate level between the ground voltage VSS. Reference)

The power source control unit UVLO of the discharge control unit DIS turns off the power source unit PWR when the input power source Vin of the power source unit PWR falls below the middle level at which the discharge signal DSCG is supplied. OFF)

In this process, as the input power source Vin rises as in the case of "PT1 ", the power source unit PWR may be turned on again. However, since the power source control unit UVLO forcibly turns off the power source unit PWR, the input power source Vin immediately falls off. Even if the liquid crystal panel PNL does not reach the discharge level, the operation of the discharge control unit DIS Discharge is induced to the ground voltage VSS.

The discharge control unit DIS operates as follows when the input power supply Vin of the power supply unit PWR is up, the power supply unit PWR is driven based on the stable input power supply Vin.

The power source control unit UVLO of the discharge control unit DIS turns on the power source unit PWR when the input power source Vin of the power source unit PWR rises above the middle level at which the discharge signal DSCG is supplied. Reference)

The discharge unit DCHG of the discharge control unit DIS disables the discharge signal DSCG before the input power source PWR of the power source unit PWR reaches the stabilization level after the power source unit PWR is turned on See DSCG OFF)

In this process, the discharge controller DIS uses the discharge unit DCHG to supply the discharge signal DSCG so that the liquid crystal panel PNL is delayed and discharged to a discharge level having a hysteresis constantly. Therefore, even when the input power source Vin of the power source unit PWR temporarily rises and is turned on again, such as "PT1 ", the liquid crystal panel PNL continues to discharge by the discharge level having hysteresis. Accordingly, it is possible to prevent an abnormal discharge that may occur during the discharge of the liquid crystal panel PNL, thereby improving the problem of erroneous operation.

On the other hand, the flow of the input power supply Vin shown in FIG. 6 is based on a simulation in which the liquid crystal display device is formed under a condition similar to the transient state and the discharge control part DIS of the embodiment performs discharge driving. Therefore, the flow of the input power source Vin may not necessarily be the same as that of FIG. 6, and the drive mode of the discharge control unit DIS may also be changed.

Hereinafter, the configuration of the discharge control unit included in the liquid crystal display device according to one embodiment of the present invention will be described in more detail.

FIG. 7 is a schematic configuration diagram of a discharge control unit according to an embodiment of the present invention, and FIG. 8 is a detailed configuration diagram of a discharge control unit according to an embodiment of the present invention.

2 and 7, the discharging control unit DIS according to an embodiment of the present invention includes a discharging unit DCHG, a power control unit UVLO, a sensing voltage generating unit 95, and a reference voltage generating unit 93).

The discharge unit DCHG serves to discharge the liquid crystal panel as described above, and the power supply control unit UVLO serves to turn on or off the power supply unit PWR. The sensing voltage generating unit 95 generates a sensing voltage VSEN by sensing the input power supply Vin of the power supply unit PWR and the reference voltage generating unit 93 measures the characteristic value of the liquid crystal display device And generates reference voltages REF based on the measured values.

The discharge unit DCHG and the power supply control unit UVLO are controlled based on the voltages supplied from the sensing voltage generating unit 95 and the reference voltage generating unit 93 so that the liquid crystal panel PNL is delayed and discharged to a discharge level having hysteresis Drive. That is, the discharge unit DCHG and the power supply control unit UVLO are actively controlled by the voltages supplied from the sensing voltage generating unit 95 and the reference voltage generating unit 93.

2 and 8, the discharge unit DCHG includes a first comparator 71, a second comparator 73, and a first SR latch unit 75. The first comparator 71 serves to generate the first logic voltage based on the sensing voltage VSEN and the discharge signal on reference voltage DSCG_ON_REF. The second comparator 73 generates the second logic voltage based on the sensing voltage VSEN and the discharge signal off-reference voltage DSCG_OFF_REF. The first SR latch unit 75 generates the discharge signal DSCG based on the first and second logic voltages supplied from the first comparator 71 and the second comparator 73.

The power supply control unit UVLO includes a third comparison unit 81, a fourth comparison unit 83, a second SR latch unit 85, and an inverter unit 87. The third comparator 81 generates the third logic voltage based on the sensing voltage VSEN and the power supply off reference voltage UVLO_OFF_REF. The fourth comparator 83 generates the fourth logic voltage based on the sensing voltage VSEN and the power source on reference voltage UVLO_ON_OFF. The second SR latch 85 latches the power supply control signal PWR for turning on or off the power supply PWR based on the third and fourth logic voltages supplied from the third comparator 81 and the fourth comparator 83, (PCS). The inverter unit 87 inverts the power source unit control signal PCS output from the second SR latch unit 85 and outputs the inverted power source control signal PCS. On the other hand, a method of inverting and outputting the power source unit control signal PCS output from the second SR latch unit 85 may use the output stage (/ Q) of the second SR latch unit 85, 87 are deleted.

The sensing voltage generating unit 95 includes a first resistor R1 and a second resistor R2 that divide the input power supply Vin of the power supply unit PWR to generate the sensing voltage VSEN. The input power supply Vin has a level higher than the voltage required or sensible for the discharge unit DCHG and the power supply control unit UVLO. Accordingly, the sensing voltage generating unit 95 functions to form a voltage level at which the discharge unit DCHG and the power supply control unit UVLO can be sensed.

The reference voltage generating unit 93 is supplied with an output from the power supply unit PWR to generate a discharge signal off reference voltage DSCG_OFF_REF, a power source unit on reference voltage UVLO_ON_REF, a discharge signal on reference voltage DSCG_ON_REF and a power unit off reference voltage UVLO_OFF_REF. And a third resistor R3 to a seventh resistor R7 for dividing the power supply voltage VDD to a plurality of levels.

The third to seventh resistors R7 to R7 included in the reference voltage generating unit 93 are connected to the reference voltage generating unit for generating the driving conditions required for actively driving the discharge unit DCHG and the power supply control unit UVLO (REF). To this end, the resistance values of the third resistor R3 to the seventh resistor R7 are provided based on the measured value of the characteristic value of the liquid crystal display device.

The first through fourth comparators 71, 73, 81, and 83 included in the discharge unit DCHG and the power supply control unit UVLO described above are arranged such that the voltage input through the (+ And outputs a logic voltage corresponding to a logic low when the input voltage is lower than the input voltage. On the other hand, if the voltage input through the (+) terminal is higher than the voltage input through the (-) terminal, the logic voltage corresponding to the logic high is outputted. Accordingly, the outputs of the first SR latch unit 75 and the second SR latch unit 85 receiving the logic voltage from them output a logic low or logic high signal to their output terminals (Q).

However, since the inverter unit 87 is connected to the output terminal Q of the second SR latch unit 85, the final output of the power supply control unit UVLO is opposite to the output value of the second SR latch unit 85 . As described above, when outputting through the output terminal (/ Q) of the second SR latch unit 85, the inverter unit 87 is deleted.

For example, when the output of the discharge unit DCHG becomes logic high, the liquid crystal panel PNL is delayed by the discharge level having hysteresis and receives the discharge signal DSCG so that the discharge is performed. On the other hand, when the output of the discharge unit DCHG becomes a logic low, the discharge signal DSCG is cut off. When the output of the power control unit (UVLO) becomes logic high, the power supply unit (PWR) receives the power supply control signal PCS to be turned on. Alternatively, when the output of the power control unit (UVLO) becomes logic low, the power supply unit (PWR) receives the power control signal PCS to be turned off.

Hereinafter, a driving method of a liquid crystal display according to another embodiment of the present invention will be described. To aid understanding of the description, reference is also made to Figs. 2-8.

9 is a flowchart illustrating a method of driving a liquid crystal display according to another embodiment of the present invention.

First, the input power source Vin of the power source unit PWR is sensed. (S111)

Next, when the input power source Vin of the power source unit PWR is down (Y, S113) while the input power source Vin of the power source unit PWR is being detected, the liquid crystal panel PNL is delayed and discharged to a discharge level having hysteresis (S115). Otherwise, if the input power source Vin of the power source unit PWR is not down (N, S113), the input power source Vin of the power source unit PWR is detected. S111)

Next, the discharge signal DSCG is adjusted by referring to the input power supply Vin of the power supply unit PWR, and the power supply unit PWR is turned off. (S117)

Next, when the input power source Vin of the power source unit PWR is up (Y, S119), the power source unit PWR is turned on by interrupting the discharge signal DSCG with reference to the input power source Vin of the power source unit PWR The discharge signal DSCG is supplied to the liquid crystal panel PNL in step S115 if the input power Vin of the power source unit PWR is not up (N, S119) And turns off the power supply unit PWR (S117)

In the step S115 of supplying the discharge signal DSCG during the above steps, the discharge signal DSCG is supplied when the input power supply Vin of the power supply unit PWR is located at the middle level between the ground voltage VSS (See DSCG ON in Fig. 6)

In the step S115 to supply the discharge signal DSCG from the step S115 to the step S121 to turn on the power source unit PWR, the input power source Vin of the power source unit PWR is supplied with the discharge signal DSCG When the input power Vin of the power source unit PWR rises above the middle level at which the discharge signal DSCG is supplied, the power source unit PWR is turned off. And turns off the discharge signal DSCG before the input power source Vin of the power source unit PWR reaches the stabilization level after the power source unit PWR is turned on. (See DSCG OFF in Fig. 6)

The step S115 of supplying the discharge signal DSCG to the step S121 of turning on the power source unit PWR is set such that the discharge control unit DIS performing this operation actively controls the above process. To this end, the discharge control unit DIS controls the reference voltage REF based on the sensing voltage VSEN, which is obtained by sensing the input power supply Vin of the power supply unit PWR, and the measured value of the characteristic value of the liquid crystal display device .

As described above, in the embodiment of the present invention, when the input power source of the power source unit is down, the liquid crystal panel is delayed and discharged by the discharge level having hysteresis, thereby preventing abnormal discharge that may occur during the progress of the discharge, It is possible to provide a liquid crystal display device and a method of driving the same.

While the present invention has been described in connection with what is presently considered to be practical exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, It will be understood that the invention may be practiced. It is therefore to be understood that the embodiments described above are to be considered in all respects only as illustrative and not restrictive. In addition, the scope of the present invention is indicated by the following claims rather than the detailed description. Also, all changes or modifications derived from the meaning and scope of the claims and their equivalents should be construed as being included within the scope of the present invention.

TCN: timing driver PNL: liquid crystal panel
SDRV: Gate driver DDRV: Data driver
BLU: Backlight unit PWR: Power supply unit
DIS: Discharge control section DCHG: Discharge section
UVLO: Power control unit DSCG: Discharge signal
PCS: Power control signal

Claims (12)

A liquid crystal panel;
A gate driver for supplying a gate signal to the liquid crystal panel;
A power supply unit for supplying a voltage to the gate driver; And
Wherein the liquid crystal panel supplies a discharge signal so that the liquid crystal panel is delayed and discharged at a discharge level having a hysteresis when the input power of the power supply unit is at an intermediate level between the ground voltage, And turns on the power source unit when the input power source is higher than the middle level to which the discharge signal is supplied and turns on the discharge signal before the input power source reaches the stabilization level after the power source unit is turned on And a discharge control unit for interrupting the discharge. The method according to claim 1,
The discharge control unit
And supplies the discharge signal through the gate driver. delete delete The method according to claim 1,
The discharge control unit
A discharge unit for discharging the liquid crystal panel,
A power control unit for turning on or off the power unit,
A sensing voltage generator for sensing the input power of the power supply to generate a sensing voltage;
And a reference voltage generator for generating reference voltages based on the measured values of the characteristic values of the liquid crystal display device. 6. The method of claim 5,
The discharge unit and the power source control unit
The sensing voltage generator, and the reference voltage generator. The liquid crystal display device of claim 1, 6. The method of claim 5,
The discharging unit includes a first comparator for generating a first logic voltage based on the sensing voltage and a discharge signal on reference voltage and a second comparator for generating a second logic voltage based on the sensing voltage and the discharge signal off- And a first SR latch unit for generating the discharge signal based on the first and second logic voltages supplied from the first comparator and the second comparator,
The power control unit includes a third comparator for generating a third logic voltage based on the sensing voltage and the power supply off reference voltage and a fourth comparison unit for generating a fourth logic voltage based on the sensing voltage and the power supply on- And a second SR latch unit for generating a power supply control signal for turning on or off the power supply unit based on the third and fourth logic voltages supplied from the third comparator and the fourth comparator, . 8. The method of claim 7,
Wherein the sensing voltage generating unit includes a first resistor and a second resistor for dividing the input power of the power supply unit to generate the sensing voltage,
The reference voltage generating unit may include a third resistor for dividing the power source voltage output from the power source unit into a plurality of levels to generate the discharge signal off reference voltage, the power source unit on reference voltage, the discharge signal on reference voltage, To 7 < th > resistors. Detecting power of the power supply unit;
Supplying a discharge signal so that the liquid crystal panel is delayed and discharged to a discharge level having hysteresis when the input power of the power supply unit is at an intermediate level between the ground voltage and the ground voltage;
Turning off the power supply when the input power is lower than the middle level to which the discharge signal is supplied;
Turning on the power supply unit when the input power source is higher than the middle level to which the discharge signal is supplied; And
And blocking the discharge signal before the input power source reaches a stabilization level after the power source unit is turned on. delete delete 10. The method of claim 9,
Wherein the step of supplying the discharge signal or the step of turning on the power source unit
Wherein the input voltage of the power supply unit is sensed and actively controlled by reference voltages provided on the basis of a sensing voltage and a measurement value of a characteristic value of the liquid crystal display device.

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