KR101767723B1 - Method for verifying plc instruction using ld program - Google Patents

Method for verifying plc instruction using ld program Download PDF

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Publication number
KR101767723B1
KR101767723B1 KR1020150067458A KR20150067458A KR101767723B1 KR 101767723 B1 KR101767723 B1 KR 101767723B1 KR 1020150067458 A KR1020150067458 A KR 1020150067458A KR 20150067458 A KR20150067458 A KR 20150067458A KR 101767723 B1 KR101767723 B1 KR 101767723B1
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South Korea
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program
plc
information
command
verifying
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KR1020150067458A
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Korean (ko)
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KR20160134996A (en
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이승환
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엘에스산전 주식회사
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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00—Programme-control systems
    • G05B19/02—Programme-control systems electric
    • G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/05—Programmable logic controllers, e.g. simulating logic interconnections of signals according to ladder diagrams or function charts

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  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
  • Programmable Controllers (AREA)

Abstract

The present invention relates to a method for verifying PLC commands executed in a PLC system. The present invention includes a PLC system selecting step, a step of extracting input data and prediction data of a PLC command from a test case, a step of loading an LD program into a PLC system, a step of inputting input data into an LD program, Extracting a result as output data, and verifying the PLC command by comparing the predicted data and the output data. According to the present invention, it is possible to reduce the inconvenience of writing an LD program for each PLC command by verifying the PLC command by using the LD program, and it is advantageous to cope with the verification environment flexibly.

Description

{METHOD FOR VERIFYING PLC INSTRUCTION USING LD PROGRAM}

The present invention relates to a method of verifying a PLC command executed in a PLC system, and more particularly, to a method of verifying a PLC command using an LD program.

The industrial automation equipment consists of mechanical equipment using relays and so on. In order to change an automation equipment composed of mechanical equipment, it is difficult to change the internal circuit wiring of the equipment. In order to overcome such difficulties, PLC (Programmable Logic Controller) system is used.

The PLC is a programmable logical controller, and the CPU module of the PLC system can execute various tasks by executing PLC commands. Therefore, in order to accurately control the PLC system applied to the automation equipment, it is important to verify the reliability of the PLC command, that is, to verify whether the PLC system performs the proper function according to the PLC command.

1 is a schematic diagram of a system for verifying conventional PLC commands. Referring to FIG. 1, the process of verifying a conventional PLC command is as follows. An automatic verification program for the PLC command verification is installed in the PC 101 and the PC 101 is connected to the PLC system 110 to execute the automatic verification program so that the PLC command can be inspected according to the flow of the automatic verification program . To this end, an LD (Ladder Diagram) program 104 is generated using a PLC program editing tool, and an LD program is generated by assigning a memory address to an operand of a PLC command to be verified. Then, the LD program 104 is downloaded to the PLC system 110. When the PC 101 and the PLC system 110 are connected to each other, the automatic verification program is executed in accordance with predefined test cases in the database DB Perform PLC command test.

As described above, conventionally, most of the PLC command verification process is automatically performed through the automatic verification program, but the LD program for verifying the PLC command is generally manually generated by the programming of the manager.

2 is a flowchart of a conventional LD program creation process. First, the LD program creator executes a program editing tool (S202). The program editing tool may be provided with a library for generating the LD program. When the program creator selects (S204) and inserts (S206) a command to be verified, the program editing tool allocates a memory to the input / output operand (S208). Finally, the LD program created by the program editing tool is inspected (S210), and the LD program is created by repeating steps S204 to S208 for each PLC command.

However, considering that the number of PLC commands to be verified in the PLC system is several thousand, the process of manually generating the LD program for verifying the PLC commands is not a simple task, and there is a problem that it takes a lot of time and manpower do.

In addition, the conventional LD program includes dozens of instructions in the LD program in order to reduce the number of files. In this case, if an error occurs in the instruction or the peripheral logic, it is difficult to identify the exact cause. Particularly, when the size of the LD program exceeds the standard defined by the CPU module, the size of the LD program must be adjusted, and thus there is a problem that the LD program must be re-edited.

According to the present invention, an LD program is automatically generated according to a verification target to verify PLC commands, thereby reducing the inconvenience of manually creating an LD program for each verification target, and using an LD program capable of flexibly coping with the verification environment And to provide a PLC command verification method.

The objects of the present invention are not limited to the above-mentioned objects, and other objects and advantages of the present invention which are not mentioned can be understood by the following description and more clearly understood by the embodiments of the present invention. It will also be readily apparent that the objects and advantages of the invention may be realized and attained by means of the instrumentalities and combinations particularly pointed out in the appended claims.

According to an aspect of the present invention, there is provided a method of controlling a PLC system, the method comprising: selecting a PLC system to be tested for a PLC command; extracting input data and prediction data of a PLC command from a test case; loading an LD program into the PLC system; Inputting the input data into a program to execute the PLC command and extracting an execution result as output data; and verifying the PLC command by comparing the predicted data and the output data.

According to the present invention as described above, it is possible to reduce the inconvenience of manually creating an LD program for each verification target by automatically generating an LD program and verifying the PLC command according to the verification target, and coping with the verification environment flexibly There are advantages to be able to.

1 is a schematic diagram of a system for verifying conventional PLC commands;
2 is a flowchart of a conventional LD program creation process.
3 is a configuration diagram of a PLC command verification system using an LD program according to an embodiment of the present invention.
4 is a flowchart of a method of generating an LD program according to an embodiment of the present invention.
5 is a schematic diagram of a process of generating an LD program according to an embodiment of the present invention.
6 is a schematic diagram of an LD program according to an embodiment of the present invention.

The above and other objects, features, and advantages of the present invention will become more apparent by describing in detail exemplary embodiments thereof with reference to the attached drawings, which are not intended to limit the scope of the present invention. In the following description, well-known functions or constructions are not described in detail since they would obscure the invention in unnecessary detail. Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the drawings, the same reference numerals are used to denote the same or similar elements.

The present invention aims to shorten the time required for manually generating an LD program for PLC command verification for use in a system or apparatus for automatically verifying a conventional PLC command.

Particularly, according to an embodiment of the present invention, by creating an LD program based on a script language, it is possible to greatly shorten the creation time compared to a process of creating an LD program using a conventional PLC program editing tool, Various related logic can be designed.

In addition, according to the present invention, it is possible to solve the problem that it is difficult to identify the cause of the instruction error by including a plurality of instructions in one LD program and the problem that the program size is limited for verifying the new CPU module.

3 is a configuration diagram of a PLC command verification system using an LD program according to an embodiment of the present invention. Referring to FIG. 3, the PLC command verification system of the present invention includes a module 301 for executing a PLC command automatic verification program, a verification module 302 for verifying PLC commands using output data output from the automatic verification program, (350, 352, 354, 356).

The module 301 in which the PLC command automatic verification program is executed includes a PC or a device capable of executing a program. The module 301 in which the PLC command automatic verification program is executed is connected to the PLC system 340 and can execute the LD program to automatically verify the PLC command.

The module 301 in which the PLC command automatic verification program is executed includes a PLC selection module 304, a connection module 306, a test case selection module 308, an LD program creation module 310, Module 312, as shown in FIG. The data of each module may be provided to the user (or creator, verifier) through the user interface 314.

More specifically, the PLC selection module 304 performs a function of selecting a PLC system that is an object of verification of a PLC command. The LD program may include information of the PLC system to which the PLC command is to be verified, and the PLC selection module 304 may select the PLC system by referring to this information.

The connection module 306 also includes a module 301 for executing a PLC command automatic verification program or an automatic PLC command verification program so that the PLC command can be inputted to the PLC system 340 to verify the PLC command, Can be connected.

The test case selection module 308 performs a function of selecting a test case for verifying the PLC command. Here, the test cases can be defined as a set of input data for generating PLC commands to be executed in the PLC system in various environments and a set of prediction data, which is an expected output value thereof. Specifically, the test case may include input data including an input value and a memory address of an input value, and prediction data including a memory address of an expected output value and an expected output value when a PLC instruction is executed in the PLC system. In addition, the test case selection module 308 can extract the input data and the prediction data of the PLC instruction from the test case.

The test case may be recorded in the test case database 350 and may include test case information for automatic verification of the LD program. Here, the test case information may include an input operand value, an output operand value, and a flag value. In the present invention, an input operand refers to an object that is a target of a command or operation when a specific command or operation is performed, and an output operand refers to an object that is generated by a result of the command or operation. In addition, the flag value is data for identifying whether a specific state is established, and generally one bit (0 or 1) is used. For example, a flag value may indicate whether a particular value is in use or whether an interrupt condition has occurred.

The output module 312 inputs the input data to the LD program so that the PLC command is executed in the PLC system 340 and the PLC system 340 receives the result of executing the PLC command. Further, the result can be generated as output data. To this end, the output module 312 may load the LD program into the module 301 in which the PLC command automatic verification program is executed.

The verification module 302 performs a function of verifying the PLC command by comparing the output data outputted through the output module 312 with the predicted data of the test case by executing the PLC command in the PLC system 340. Specifically, the verification module 302 can verify the PLC command by determining whether the output data matches the predicted data. For example, the verification module 302 can determine that there is an error in the PLC command if the output data output from the PLC system 340 is not identical to the predicted data of the test case. The verification result of the PLC command by the verification module 302 may be provided to the user via the user interface 314. [

On the other hand, an LD program corresponding to the PLC system may not exist. In this case, a new LD program can be generated through the LD program creation module 310. [

In one embodiment of the present invention, the LD program creation module 310 can generate an LD program using PLC command information, CPU module information, and test case information. To this end, the LD program creation module 310 may be connected to a database including a test case DB 350, an instruction DB 352, and a parameter DB 354. Also, in an embodiment of the present invention, the LD program creation module 310 may be connected to an XML parser so as to generate an LD program based on a script language.

Test case information may be recorded in the test case DB 350, and the test case information may include an input operand value, an output operand value, and a flag value. PLC command information can be recorded in the command DB 352 and includes information on the number of input operands of the PLC command to be verified, the number of output operands, the type information of the input operand, the type information of the output operand, . In the parameter DB 354, CPU module information may be recorded, and the CPU module information may include basic parameter information, input / output parameter information, program size information, and device information of the CPU module.

When the LD program is written in a script language, the XML parser 356 converts the LD program into a language recognizable by another program, and analyzes the syntax and checks for errors.

4 is a flowchart of a method of generating an LD program according to an embodiment of the present invention. As described above, in the case where a PLC command is automatically verified by executing an LD program generated in advance through the module 301 in which the PLC command automatic verification program is executed, or when an LD program is to be newly generated, The LD program can be generated through the LD program creation module 310 included in the module 301 to be executed. FIG. 4 illustrates a process of generating an LD program according to an embodiment of the present invention.

Referring to FIG. 4, PLC command information to be verified is first extracted from the command database 352 (S402). Here, the PLC command information may include the number information of the input operand, the number information of the output operand, the type information of the input operand, the type information of the output operand, and the command identification information.

Then, the CPU module information is extracted from the parameter database 354 (S404). Specifically, the CPU module information may include basic parameter information, input / output parameter information, program size information, and device information of a CPU module to be subjected to PLC command verification.

Then, test case information is extracted from the test case database 350 (S406). Here, the test case information may include an input operand value included in the input data, an output operand value included in the output data, and a flag value.

That is, the information necessary for creating the LD program, that is, the PLC command information, the CPU module information, and the test case information can be extracted through steps S402 to S406. When the specifications of the PLC command information, the CPU module information, and the test case information are changed, the contents of the command database 352, the parameter database 354, and the test case database 350 may be changed and reflected in the LD program have.

Finally, an LD program is generated (S408). As described above, the LD program can be generated using the PLC command information, the CPU module information, and the test case information extracted through the steps S402 to S406.

In the embodiment of the present invention, a PLC command verification method using an LD program can be performed as follows.

First, the PLC selection module 304 selects a PLC system that is an object of verification of a PLC command. Also, the connection module 306 can connect the selected PLC system and the module 301 in which the PLC command automatic verification program is executed.

The test case selection module 308 then selects a test case. The test case selection module 308 may extract input data and prediction data of the PLC instruction. Specifically, the test case may include input data including an input value and a memory address of an input value, and prediction data including a memory address of an expected output value and an expected output value when a PLC instruction is executed in the PLC system.

Then, the output module 312 inputs the input data to the LD program, and outputs the result of executing the PLC command in the PLC system as output data. To this end, the output module 312 may load the LD program into the module 301 in which the PLC command automatic verification program is executed in advance.

Finally, the verification module 302 compares the output data output from the output module 312 with the prediction data of the test case to verify the PLC command. For example, the verification module 302 determines whether or not the output data output as a result of execution of the PLC instruction in the PLC system 340 matches the prediction data of the test case. If the output data does not match, there is an error in the PLC instruction .

5 is a schematic diagram of an LD program generation process according to an embodiment of the present invention. Referring to FIG. 5, parameters of CPU type of the PLC system can be stored in an automatic verification program as a separate file. The information related to the CPU module includes basic parameter information, input / output parameter information, and device size information.

5, the verification target instruction word information is retrieved from the instruction DB 352, the CPU module information of the PLC system is retrieved from the parameter DB 354, the test case DB 350 stores test case information Can be searched.

In addition, an XML file, that is, an LD program, can be generated for each instruction using instruction information, CPU module information, and test case information retrieved from a database.

On the other hand, since the LD program of the present invention includes only one command verification logic in one file, the LD program of the present invention is not limited by the program size required by the CPU module. This means that it is possible to generate an LD program that has more logic than the conventional one in verifying PLC commands.

As a result, since the conventional LD program structure includes a plurality of logic and instructions in one file, if an error occurs in the PLC command, it is determined whether the cause is caused by the PLC command or by the surrounding logic Can not be judged. However, since the LD program of the present invention has a simple logic form for verifying one PLC command in the project, the cause of the error can be limited to the PLC command, which facilitates debugging.

In addition, although it has a logic structure for verifying one PLC command in one project, since it is a structure that creates a project in real time referring to information of a database and deletes the project when verification is completed, it requires a separate file management Do not.

6 is a structural diagram of an LD program according to an embodiment of the present invention. Specifically, the LD program related table structure is shown in Fig. Specifically, the LD program of the present invention can have the following structure.

In FIG. 6, < CPU PARAMETER > is parameter information of the CPU module to be verified. Here, the parameter may include a basic parameter and an input / output parameter.

<GlobalTags> defines a global variable and a global variable, and can be accessed or changed by accessing from a function in the program. In <UDF>, a user-defined function is declared, and variables related to the user-defined function are defined. However, <UDF> has a structure that can declare a large number of user-defined functions. However, since it is aimed to generate one logic in one project file for automatic verification, several user-defined functions may not be used.

In <SCAN PROGRAM>, program name, language, and variables can be defined. In the 'Rung Tag', command types such as contact point, coil, and FU / FB can be defined. In 'Coordinate', lines such as horizontal line and vertical line can be defined. In addition, 'Name' may define the identification information of the command, and 'Param' may define the input and output operands of the PLC command.

While the present invention has been described in connection with what is presently considered to be practical exemplary embodiments, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, But the present invention is not limited thereto.

Claims (6)

A method of verifying a PLC command using an LD program,
Selecting a PLC system to be a verification target of the PLC command;
Extracting input data and predictive data of a PLC command from a test case;
Loading an LD program;
Inputting the input data to the LD program to execute the PLC instruction, and extracting an execution result as output data; And
Comparing the predicted data and the output data to verify a PLC command,
The LD program
Generated by using previously stored PLC command information, CPU module information, and test case information
A Method of Verifying PLC Commands Using LD Program.
The method according to claim 1,
The step of loading the LD program into the PLC system
And generating a new LD program when there is no LD program corresponding to the PLC system
A Method of Verifying PLC Commands Using LD Program.
3. The method of claim 2,
The step of generating the LD program
Extracting the PLC instruction information from an instruction database;
Extracting the CPU module information from a CPU database;
Extracting the test case information from a test case database; And
Generating an LD program using the PLC command information, the CPU module information, and the test case information
A method of verifying a PLC command using an LD program.
The method of claim 3,
The PLC command information
Including at least one of information on the number of input operands of the PLC instruction to be verified, the number of output operands, type information of the input operand, type information of the output operand,
A Method of Verifying PLC Commands Using LD Program.
The method of claim 3,
The CPU module information
Information including at least one of basic parameter information of the CPU module, input / output parameter information, program size information, and device information
A Method of Verifying PLC Commands Using LD Program.
The method of claim 3,
The test case information
An input operand value, an output operand value, and a flag value
A Method of Verifying PLC Commands Using LD Program.
KR1020150067458A 2015-05-14 2015-05-14 Method for verifying plc instruction using ld program KR101767723B1 (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3822799A4 (en) * 2018-08-17 2022-02-16 Siemens Ltd. China Address identification method, apparatus and system, and storage medium, processor and terminal

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3822799A4 (en) * 2018-08-17 2022-02-16 Siemens Ltd. China Address identification method, apparatus and system, and storage medium, processor and terminal

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