KR101767128B1 - Method of manufacturing a nitride substrate - Google Patents

Method of manufacturing a nitride substrate Download PDF

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KR101767128B1
KR101767128B1 KR1020150164239A KR20150164239A KR101767128B1 KR 101767128 B1 KR101767128 B1 KR 101767128B1 KR 1020150164239 A KR1020150164239 A KR 1020150164239A KR 20150164239 A KR20150164239 A KR 20150164239A KR 101767128 B1 KR101767128 B1 KR 101767128B1
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substrate
polishing
nitride substrate
nitride
layer
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KR20160063256A (en
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황종희
이미재
임태영
김진호
김진원
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한국세라믹기술원
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    • H—ELECTRICITY
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    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
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    • H01L21/02387—Group 13/15 materials
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    • H—ELECTRICITY
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • H—ELECTRICITY
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604—Chemical etching
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32134—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by liquid etching only
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering

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Abstract

The present invention discloses a method of manufacturing a nitride substrate comprising the steps of polishing one surface of a nitride substrate, wet processing step of wet etching one surface of the nitride substrate, and heat treating the nitride substrate.

Description

[0001] The present invention relates to a method of manufacturing a nitride substrate,

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a substrate manufacturing method, and more particularly, to a nitride substrate manufacturing method capable of reducing warping of a substrate.

BACKGROUND ART [0002] Recently, many researches and developments have been made on light emitting devices using compound semiconductors of nitride (GaN, AlN, InN) series. Light emitting diodes (LED), laser diodes (LD) (BLU) have been developed and commercialized.

The nitride semiconductor is mainly formed by inducing epitaxial growth on a heterogeneous substrate. However, the nitride semiconductor and the heterogeneous substrate formed by the vapor phase growth method contain many crystal defects in the nitride semiconductor due to the difference between the lattice constant and the thermal expansion coefficient, and accordingly, it is difficult to form a high quality nitride semiconductor.

Since crystal defects of such nitride semiconductors are the main limiting factors of device performance, various studies are under way to control crystal defects. As a method for controlling crystal defects, there is a method of forming a buffer layer which is an intermediate layer of various materials on a heterogeneous substrate before epi-film growth to minimize the difference in lattice constant and thermal expansion coefficient between the nitride semiconductor and the dissimilar substrate, An epitaxial lateral overgrowth (ELO) method in which a pattern layer in the form of a pattern is formed to induce growth from the side of the pattern to inhibit dislocation generation is widely used. Ultimately, the nitride semiconductor substrate from which the dissimilar substrate is removed is used as a substrate for crystal growth, and the nitride semiconductor substrate for crystal growth is referred to as a free-standing nitride semiconductor substrate.

On the other hand, in order to prepare a self-supporting nitride semiconductor substrate, a different substrate must be removed. As a process for removing a different substrate, a laser-lift off method is widely used. In the laser lift-off method, a KrF laser is irradiated onto sapphire, which is mainly used as a substrate for epitaxial growth of a nitride semiconductor (that is, a different substrate), thereby separating the sapphire substrate from the nitride semiconductor.

However, the self-supporting nitride semiconductor substrate thus produced has some problems, the biggest problem being the bowing of the substrate. When the substrate has a large warpage, when the crystal is grown on a substrate using an HVPE apparatus or the like, the self-supporting nitride semiconductor substrate and the nitride semiconductor layer grown thereon can not have uniform lattice distribution and impurity density and cracks are generated, It causes great damage.

Korean Patent No. 10-1034667 Korean Patent Publication No. 2015-0059102

The present invention provides a nitride substrate manufacturing method capable of reducing warpage.

The present invention provides a nitride substrate manufacturing method capable of reducing the warpage of a nitride semiconductor substrate separated by laser lift-off after being formed on a heterogeneous substrate.

According to an aspect of the present invention, there is provided a method of manufacturing a nitride substrate, comprising: polishing a nitride substrate; Wet etching one surface of the nitride substrate; And heat treating the nitride substrate.

One surface of the nitride substrate is a growth surface on which the nitride substrate is grown in contact with the dissimilar substrate.

The polishing is performed after mechanical polishing by chemical mechanical polishing.

After the mechanical polishing, a processing strained layer is formed on one surface of the nitride substrate, and warpage is increased.

After the chemical mechanical polishing, the thickness of the processed strained layer is reduced, and the warpage is reduced after mechanical polishing.

And forming a wetting prevention film on the surface opposite to the growth surface before the wet etching.

After the wet etching, the processed strained layer is removed, and the warpage is reduced after the chemical mechanical polishing.

The heat treatment is performed in a temperature range where the surface opposite to the growth surface is not decomposed.

The heat treatment is performed at a temperature of 700 캜 to 950 캜.

The nitride substrate according to another aspect of the present invention is a nitride substrate produced by performing first polishing, secondary polishing, and wet etching on the growth surface and heat treatment, and the absolute value of the warp is 10 탆 to 30 탆.

According to the present invention, the warpage of the substrate can be reduced by controlling the total dislocation density including the surface having a high dislocation density. For example, by performing primary polishing, secondary polishing, wet etching, and heat treatment on the growth surface of the nitride substrate, the dislocation density of the substrate can be controlled and the warp of the substrate can be reduced accordingly. Therefore, the yield can be improved by using the nitride substrate having a reduced warpage as a growth substrate for a nitride layer such as a light emitting diode.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a process flow diagram illustrating a method of manufacturing a nitride substrate according to an embodiment of the present invention; FIG.
2 to 6 are cross-sectional views of a nitride substrate in each step of a method of manufacturing a nitride substrate according to an embodiment of the present invention.
7 is a photograph of a surface of a nitride substrate in each step of a method of manufacturing a nitride substrate according to an embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. It should be understood, however, that the invention is not limited to the disclosed embodiments, but is capable of other various forms of implementation, and that these embodiments are provided so that this disclosure will be thorough and complete, It is provided to let you know completely.

1 is a process flow diagram illustrating a method of manufacturing a nitride substrate according to an embodiment of the present invention, and FIGS. 2 to 6 are sectional views of a nitride substrate according to a manufacturing method. 7 (a) is a photograph of the surface after the primary polishing, Fig. 7 (b) is a photograph of the surface after the secondary polishing, and Fig. 7 c) is a photograph of the surface after etching.

Referring to FIG. 1, a method of manufacturing a nitride substrate according to an exemplary embodiment of the present invention includes a step (S100) of preparing a nitride substrate, a step (S200) of primary polishing of one surface of the nitride substrate, A second polishing step S300, a step S400 of etching one surface of the nitride substrate, and a step S500 of heat treating the nitride substrate. Here, the primary polishing and the secondary polishing can be carried out by different polishing methods. The primary polishing can be carried out by mechanical polishing, and the secondary polishing can be carried out by chemical mechanical polishing. The etching can be performed by wet etching. On the other hand, one surface of the nitride substrate on which the primary and secondary polishing and etching are performed may be a surface having a high dislocation density, that is, a surface having a large lattice mismatch. A plane having a large dislocation density, that is, a plane having a large lattice mismatch will be described as a growth plane (or back plane or N plane).

1. Preparation of a nitride substrate (S100)

2 (a), the nitride layer 100a is formed on the base substrate 10 and then the nitride layer 100a is formed on the base substrate 10 as shown in FIG. 2 (b) (10).

The base substrate 10 serves as a base material or base for growing the nitride layer 100a to be the nitride substrate 100, and can be mainly a single crystal substrate. For example, a sapphire substrate can be used. have. The nitride layer 100a to be the nitride substrate 100 may be formed by a vapor phase growth method such as vapor phase epitaxy (HVPE), metal-organic chemical vapor deposition (MOCVD), or molecular beam epitaxy (MBE). The nitride layer 100a formed by the vapor phase growth method may be a variety of materials and may be a compound semiconductor including nitride semiconductors such as GaN, InN, AlN, Ga 1 -x- y Al x In y N, and the like. For example, Group III and Group V gases may be used to form the nitride layer 100a. For example, Ga and NH 3 gases may be used to form the GaN layer. The nitride layer 100a formed on the base substrate 10 can be grown to a thickness of 300 to 500 mu m, for example, so that the nitride substrate 100 can be formed to have such a thickness. A laser-lift off method may be used to separate the nitride layer 100a thus formed, for example a GaN layer, from the base substrate 10. [ In the laser lift-off method, a KrF laser is irradiated onto a base substrate 10, for example, sapphire, and the energy (5 eV, 248 nm) of KrF laser is smaller than sapphire (9.9 eV, 124 nm) ) to a more large sapphire is transmitted and the laser is absorbed by the surface is sapphire and GaN meet at a high temperature with nitrogen and liquid gallium decomposition (2GaN (s) → N 2 (g) + 2Ga (l)) is a sapphire substrate and a self-supporting nitride The semiconductor substrate is separated.

The nitride substrate 100 thus prepared has a plate shape including one surface and another surface facing each other and side surfaces connecting the surfaces, and may be provided, for example, in a circular shape. In addition, the nitride substrate 100 may be warped, and the absolute value of the difference between the minimum height and the maximum height of one surface and the other surface may be in the range of 100 μm to 400 μm. That is, the nitride substrate 100 may have a height difference of 100 μm to 400 μm between the center and the edge. At this time, the center portion of the nitride substrate 100 may be concavely curved or the central portion may be convexly curved.

On the other hand, the warpage of the nitride substrate 100, that is, the free-standing nitride semiconductor substrate is such that the dislocation densities of the growth surface 110 and the surface 120 of the nitride substrate 100 are different and the dislocation density in the nitride substrate 100 is different It is because it has. That is, as the difference in dislocation density between the both surfaces of the nitride substrate 100 increases, warpage also increases. The growth surface 110 is a bottom surface that contacts the base substrate 10 and begins to grow therefrom and is separated from the base substrate 10. The surface 120 is a top surface of the nitride substrate 100 . Therefore, it is essential to uniformly control the dislocation density distribution in the nitride substrate 100 in order to reduce warping of the nitride substrate 100. [

The reason why the difference in the dislocation density (mainly the blade potential) between the growth surface 110 and the surface 120 of the nitride substrate 100 causes warpage can be explained as follows. GaN, which is a kind of nitride semiconductor, has a high-density crystal structure with a hexagonal system structure, and growth axes between high-density crystal grains are slightly present in the GaN due to lattice mismatching with the substrate for growth of GaN (i.e., sapphire substrate) do. Therefore, GaN has a very high blade dislocation density on the growth surface which is the interface with the sapphire substrate. Between the edge dislocation density and grain size (d 0) is a substantially proportional relationship, the size (ε) in the size of the distortion (d 0) and the nitride substrate of the crystal grains can be expressed by the following relational expression like.

? =? / d 0

Here, Δ is almost the same as the Burger's vector of edge potentials. The nitride substrate having different edge potentials on one surface and the other surface differs in the size of the distortion inside the nitride substrate and the distortion is caused by the difference in the size of distortion in the nitride substrate.

On the other hand, when the nitride substrate 100 is manufactured by epitaxially growing the nitride layer 100a on the base substrate 10 and then removing the base substrate 10, the growth of the base substrate 10 and the nitride substrate 100 The surface 110 has a high dislocation density of 10 9 to 10 11 cm -2 due to the lattice mismatch between the two materials. When the nitride layer 100a is epitaxially grown by the vapor growth method, the average edge dislocation density on the surface becomes smaller as the thickness becomes thicker. In the case of GaN, the edge dislocation density of the surface 120, that is, the Ga surface is about 10 6 to 10 7 cm -2 when grown to a thickness of about 300 탆. Normally, the surface 120 of the 300 μm thick self-supporting GaN substrate has an average edge dislocation density of about 10 6 cm -2 and an average edge dislocation density of the back surface 110, ie, about 10 9 cm -2 . The absolute value of the warp of the self-supporting GaN substrate having a thickness of about 300 mu m is 100 mu m to 350 mu m. On the other hand, if the value on the growth surface 110 having a high edge dislocation density is as small as about 10 7 cm -2 , the curvature radius of the warp can be remarkably improved to about 10 m, and a substrate suitable for device application can be obtained.

2. First polishing (S200)

One side of the nitride substrate 100 is subjected to primary polishing, for example, mechanical polishing. Here, one surface of the nitride substrate 100 to be primary-polished may be a growth surface 110 (back surface or N surface). That is, when the nitride layer 100a is epitaxially grown on the base substrate 10, the growth surface 110 having a high dislocation density, that is, a large lattice mismatch is mechanically polished. When the growth surface 110 of the nitride substrate 100 having a high dislocation density is mechanically polished, the processed strained layer 130 is formed on the growth surface 110 as shown in FIG. 3, and the warpage is in the range of 20 to 80 Mu m. That is, in the nitride substrate 100, the processing strain layer 130 is formed by primary polishing at an initial value of the initial deflection of 100 mu m to 350 mu m, and the absolute value of the deflection increases to about 120 mu m to 430 mu m.

In order to mechanically polish the growth surface 110 of the nitride substrate 100 in the embodiment of the present invention, SUS is used as a surface plate. The surface 120 of the nitride substrate 100 is fixed by melting solid wax for polishing on the surface plate, Respectively. The thickness of the nitride substrate 100 is reduced by mechanically polishing the growth surface 110 of the nitride substrate 100 and the damaged layer 130 is formed on the polishing surface of the nitride substrate 100, . The damaged layer 130 can not be observed with an OM (optical microscope) or an SEM (scanning electron microscope) and can be a part which does not emit light when observing with a cathode luminescence (CL) or a fluorescence microscope or a scanning electron microscope (TEM) The darkened portion in the bright field of FIG.

On the other hand, in the mechanical polishing process of the present invention, abrasives capable of surface polishing such as diamond grindstone or sandpaper of # 80 to # 3000 were used. The larger the mesh number (#) of the grinding wheel, the finer the grinding wheel, and the smaller the depth of the damaged layer 130 can be reduced by using the smaller grinding wheel sequentially from the larger grinding wheel. For example, it is possible to gradually polish a grinding wheel with a large mesh from # 80 grinding wheel and finish polishing with a # 3000 grinding wheel. At this time, the damaged layer 130 may be formed to a thickness of 20 m to 40 m as shown in [Table 1]. The surface roughness at this time is about 2 nm, and the surface is roughened as shown in Fig. 7 (a) showing the surface photograph after the primary polishing.

Sample 1 Sample 2 Sample 3 Sample 4 Machine polishing Mesh # 3000 # 3000 # 3000 # 3000
Substrate Characteristics Processed altered layer (탆) 20 20 40 30 Surface roughness (nm) 2 2 2 2

3. Second polishing (S300)

After the primary polishing, the growth surface 110 of the nitride substrate 100 is secondarily polished. The secondary polishing can be performed by chemical mechanical polishing. For example, the growth surface 110 of the nitride substrate 100 can be mirror-polished using a diamond slurry. That is, since it is not preferable that the damaged layer 130 generated in the primary polishing process remains on the nitride substrate 100, the damaged layer 130 needs to be removed. KOH etching or H 3 PO 4 (phosphoric acid) etching may be performed immediately to remove the damaged layer 130. In this case, as the etching time for removing the damaged layer 130 is increased, 100, that is, the Ga face, is chemically stable. Therefore, it is necessary to reduce the thickness of the damaged layer 130 as much as possible before the wet etching, and the secondary polishing process is carried out accordingly. That is, the secondary polishing process is a sub-process for more progressing the wet etching, and enables the wet etching to proceed efficiently. 4, the thickness of the damaged layer 130 generated in the primary polishing may be reduced. For example, the thickness of the damaged layer 130 may be 1 to 5 Mu m. Further, by performing the secondary polishing, the warpage of the nitride substrate 100 can be reduced as compared with that after the primary polishing. For example, the warp after secondary polishing is reduced by about 10 占 퐉 to 20 占 퐉 after the primary polishing.

In the embodiment of the present invention, SUS can be used for the secondary polishing step, that is, the step of chemical mechanical polishing, as in the case of the first polishing step. The surface 120 of the nitride substrate 100 was fixed by fixing the solid wax for polishing to the surface of the base plate. As the polishing pad, a polyurethane suede pad was used, and a diamond slurry having a particle size of 30 nm was used. Since the secondary polishing step is not intended to remove the processed strained layer 130 but to reduce the thickness of the processed strained layer 130, the type and particle size of the slurry satisfy the purpose of reducing the thickness of the processed strained layer 130 It is enough. The results of chemical mechanical polishing using a diamond slurry having a particle size of 30 nm in the examples of the present invention are shown in [Table 2]. As shown in Table 2, the thickness of the processed strained layer 130 was 1 to 3 占 퐉, which was drastically reduced from 20 占 퐉 to 40 占 퐉 in the thickness of the processed strained layer 130 by the primary polishing step. On the other hand, the growth surface 110 which has been roughened by the secondary polishing is changed to the mirror surface as shown in Fig. 7 (b). That is, the surface roughness after the secondary polishing is about 0.2 nm, and the surface roughness after the primary polishing is reduced to 2 nm or more.

Sample 1 Sample 2 Sample 3 Sample 4 Chemical
Mechanical
Abrasive condition Slurry type Diamond Diamond Diamond Diamond Particle size (nm) 30 30 30 30
Substrate Characteristics Processed altered layer (탆) One 3 2 One Surface roughness (nm) 0.2 0.2 0.2 0.2

4. Wet  Etching (S400)

Primary and secondary polishing were carried out to control the warp by controlling the dislocation density between the growth surface 110 and the surface 120 of the nitride substrate 100. [ However, the damaged layer 130 is formed on the growth surface 110 of the nitride substrate 100 by primary and secondary polishing. The damaged layer 130 becomes a barrier for controlling warpage. The warpage of the nitride substrate 100 also increases while performing primary and secondary polishing.

Wet etching is performed on the growth surface 110 of the nitride substrate 100 to remove the damaged layer 130 as shown in FIG. The wet etching can be carried out at 80 DEG C using, for example, a 10% to 30% KOH solution. Of course, wet etching may be performed using phosphoric acid (H 3 PO 4 ) or the like. When the damaged layer 130 is wet-etched, the absolute value of the warp decreases as the etching time elapses. For example, when the wet etching is performed, the absolute value of the warp is reduced to about 30 mu m to 50 mu m. That is, the growth surface 110 of the nitride substrate 100 is corroded with a strong acid or a strong alkaline to cause the damaged layer 130 to decrease in thickness and warpage. On the other hand, when the damaged layer 130 is etched, the surface 120 of the nitride substrate 100 is chemically very stable and is not etched. However, a wet etching resistant material such as SiO 2 may be coated on the surface 120 of the nitride substrate 100 before etching to prevent etching of the surface 120. Further, when the growth surface 110 of the nitride substrate 100 is wet-etched, the mirror-finished GaN crystal is blurred into a glass-like shape by secondary polishing. This is because the growth surface 110 is corroded to be roughened, and warpage is reduced even if the growth surface 110 is not roughened.

The etching thickness increases with the etching time. As shown in Table 3, the etching thickness is adjusted to 1 to 60 占 퐉 according to the etching time of 10 to 150 minutes. In the present invention, etching is performed for about 20 minutes in order to remove about 3 탆 which is the maximum thickness of the remaining damaged layer 130 by the secondary polishing process. The etching amount according to the etching time in case of etching at 80 ° C using KOH is shown in [Table 4]. After the wet etching was performed for 20 minutes, the cross section of the sample was observed with cathode luminescence (CL), and as a result, there was no dark region observed after the primary polishing and the secondary polishing. That is, the damaged layer 130 can be completely removed as shown in [Table 4]. On the other hand, the growth surface 110 after the secondary polishing step was mirror-finished, but after the wet etching process, the surface was roughened as shown in Fig. 7 (c). As shown in Table 4, the surface roughness increased to 2 nm to 5 nm, which was larger than the surface roughness of 0.2 nm after the secondary polishing step shown in [Table 2]. That is, after the wet etching, the growth surface 110 is corroded to increase the surface roughness. However, since the damaged layer 130 is removed and warpage is reduced, the nitride substrate 100 can be used as a growth substrate for a nitride semiconductor layer such as a light emitting diode.

Etching time (min) 10 20 30 60 120 150 Etching amount (占 퐉) One 3 10 30 50 60

Sample 1 Sample 2 Sample 3 Sample 4 Etching condition
Kinds KOH KOH KOH KOH Temperature (℃) 80 80 80 80 Substrate Characteristics
Processed altered layer (탆) 0 0 0 0 Surface roughness (nm) 2 5 3 4

5. Heat treatment (S500)

The growth surface 110 having a high dislocation density was polished by the primary polishing and the secondary polishing, and the damaged layer 130 formed by polishing was removed by wet etching. The warpage of the nitride substrate 100 can be sufficiently controlled only by the primary polishing, the secondary polishing, and the wet etching process, and thus it may be used as a growth substrate for the nitride semiconductor layer. However, the purpose of controlling the warp of the self-supporting nitride semiconductor substrate of the present invention is to improve device yield or growth yield of the nitride semiconductor layer. Therefore, the self-supporting nitride semiconductor substrate is preferably as smooth as possible by controlling the bending as much as possible.

The heat treatment is a process for controlling the lattice mismatch remaining in the nitride substrate 100 in which the dislocation density is controlled in the primary polishing, the secondary polishing and the wet etching. That is, the heat treatment process is a process for reducing warpage by reducing lattice mismatch to eliminate distortion caused by lattice mismatching. The nitride substrate 100 having a reduced difference in dislocation density between the surface 120 and the growth surface 110 is annealed to reduce the residual stress and uniformly redistribute the internal stress to induce the grating rearrangement, Can be reduced to about 10 mu m to 30 mu m. Here, since the maximum temperature at which the surface 120 is not decomposed at normal pressure is about 900 DEG C, it is preferable to perform the heat treatment at about 900 DEG C, and the cooling is preferably slow cooling. That is, when the heat treatment is performed at about 950 ° C. for 5 hours or more, the surface 120 starts to be damaged, and the surface 120 is damaged more rapidly as the temperature is higher. If the surface 120 is damaged, the application of the device is difficult, and the growth yield of the nitride semiconductor layer is greatly deteriorated. Therefore, it is preferable to carry out the heat treatment at a temperature of, for example, 700 ° C to 950 ° C.

The purpose of the heat treatment is to sufficiently reduce the distortion caused by the lattice mismatch, and therefore the heat treatment time can be, for example, 1 hour to 15 hours. As an embodiment of the present invention, the heat treatment was performed at 900 占 폚 for 10 hours. After the heat treatment step, as shown in Table 5, the warpage was reduced by about 10 탆 to 30 탆 in absolute value. In terms of the radius of curvature, it is possible to obtain a substrate suitable for device application by about 10 m to 15 m, thereby satisfying the purpose of the heat treatment sufficiently.

Sample 1 Sample 2 Sample 3 Sample 4

Warpage (탆)

Before processing -197 -325 -258 -160 First polishing -256 -344 -300 -237 Second polishing -240 -326 -288 -233 Wet etching -35 -42 -49 -32 Heat treatment -28 -24 -29 -22

Table 6 shows the XRD measurement results after each step, and Table 7 shows the Raman measurement results after each step. As shown in Table 6, although the crystallinity decreased due to the increase of the warp after the primary polishing, the crystallinity was improved due to the alleviation of the warp as the secondary polishing, the wet etching and the heat treatment were performed. Also. As shown in Table 7, all the samples have considerable stress, but according to the results of each step carried out after the second polishing, the E 2 peak value of stain-free GaN is close to 567.1 cm -1 , The result of stress relaxation can be confirmed.

Sample 1 Sample 2 Sample 3 Sample 4
RC-FWHM
(102)
(arcsec)
Before processing 467 397 422 427 First polishing 760 929 638 530 Second polishing 583 400 441 495 Wet etching 243 255 231 316 Heat treatment 256 197 167 264

Sample 1 Sample 2 Sample 3 Sample 4 Raman
E 2 (High)
peak
(Cm -1 ) Before processing 566.19 566.68 566.78 566.50 First polishing 567.97 568.60 569.22 568.15 Second polishing 567.52 567.89 567.67 568.05 Wet etching 567.18 567.20 567.19 567.23 Heat treatment 567.19 567.15 567.20 567.18

As described above, in the method of manufacturing a nitride substrate according to an embodiment of the present invention, first and second polishing steps are performed on a growth surface of a nitride substrate formed by a vapor phase growth method on a base substrate and formed by a laser lift- Etching can be performed and heat treatment can be performed to reduce warpage. That is, the absolute value of the warp after the heat treatment can be reduced to 10 to 20 占 퐉 at an absolute value of the warp after the nitride substrate is separated from the base substrate of 100 占 퐉 to 350 占 퐉. In addition, the nitride substrate having such a reduced warp can be used as a substrate for growing a nitride layer such as a light emitting diode.

Although the technical idea of the present invention has been specifically described according to the above embodiments, it should be noted that the above embodiments are for explanation purposes only and not for the purpose of limitation. It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit and scope of the invention.

100: semiconductor substrate 110: growth surface
120: Surface 130: Processed altered layer

Claims (10)

A first polishing step and a second polishing step of polishing one surface of the nitride substrate;
Wet etching one surface of the nitride substrate; And
And heat treating the nitride substrate,
Further comprising the step of forming an etch stopping layer on the other surface opposite to the one surface of the nitride substrate before the wet etching,
The absolute value of the warpage of the nitride substrate is initially 100 mu m to 350 mu m and is 120 mu m to 430 mu m after the primary polishing. After the secondary polishing, the absolute value of the warpage is reduced to 10 mu m to 20 mu m after the primary polishing, Mu m to 50 mu m and 10 mu m to 30 mu m after the heat treatment.
2. The method of claim 1, wherein one surface of the nitride substrate is a growth surface in which the nitride substrate is grown in contact with the dissimilar substrate.
The method of claim 2, wherein the primary polishing is mechanical polishing and the secondary polishing is chemical mechanical polishing.
4. The method of manufacturing a nitride substrate according to claim 3, wherein a machining strain layer is formed on one surface of the nitride substrate after the mechanical polishing.
5. The method of claim 4, wherein the thickness of the processed strained layer is reduced after the chemical mechanical polishing.
delete The method of manufacturing a nitride substrate according to claim 5, wherein the processed strained layer is removed after the wet etching.
The nitride substrate manufacturing method according to claim 7, wherein the heat treatment is performed in a temperature range in which the surface facing the growth surface is not decomposed.
9. The method of claim 8, wherein the heat treatment is performed at a temperature of 700 ° C to 950 ° C.
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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003128499A (en) * 2001-10-18 2003-05-08 Hitachi Cable Ltd Method for producing nitride crystal substrate and nitride crystal substrate
KR100550491B1 (en) * 2003-05-06 2006-02-09 스미토모덴키고교가부시키가이샤 Nitride semiconductor substrate and processing method of nitride semiconductor substrate

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KR101034667B1 (en) 2010-12-03 2011-05-16 주식회사 나노케이 Method for manufacturing free standing nitride semiconductor and free standing semiconductor wafer using it
KR101660364B1 (en) 2013-11-18 2016-10-11 한국세라믹기술원 Method of manufacturing a substrate and method of manufacturing a light emitting device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003128499A (en) * 2001-10-18 2003-05-08 Hitachi Cable Ltd Method for producing nitride crystal substrate and nitride crystal substrate
KR100550491B1 (en) * 2003-05-06 2006-02-09 스미토모덴키고교가부시키가이샤 Nitride semiconductor substrate and processing method of nitride semiconductor substrate

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