KR101765529B1 - Stretchable and Flexible Device and Method for Manufacturing The Same - Google Patents

Abstract

The present invention relates to a flexible and flexible electronic device and a method of manufacturing the same. More particularly, the present invention relates to an elastic substrate; A first patterned polymer layer formed adjacent to the elastic substrate; An electronic device formed adjacent to the patterned polymer layer; And a second patterned polymer layer formed adjacent to the memory element, wherein each of the first and second electrodes of the memory element adjacent to the first patterned polymer layer and the second patterned polymer layer comprises a pattern Elastic and flexible electronic devices and methods of making the same.

Description

TECHNICAL FIELD [0001] The present invention relates to a flexible and flexible electronic device,

The present invention relates to a flexible and flexible electronic device and a method of manufacturing the same. More particularly, the present invention relates to an elastic substrate; A first patterned polymer layer formed adjacent to the elastic substrate; An electronic device formed adjacent to the patterned polymer layer; And a second patterned polymer layer formed adjacent to the memory element, wherein each of the first and second electrodes of the memory element adjacent to the first patterned polymer layer and the second patterned polymer layer comprises a pattern Elastic and flexible electronic devices and methods of making the same.

Recently, various home appliances and electronic products have been developed depending on the technology development of the electric industry and the electronic industry. Most household appliances and electronic products include circuit boards into which electrical components, electronic components and semiconductor packages are inserted. The circuit boards include circuit wiring that electrically connects the electrical element, the electronic element, and the semiconductor packages.

With the development of multimedia, the importance of flexible electronic devices is increasing. Accordingly, an organic light emitting display (OLED), a solar cell, a liquid crystal display (LCD), an electrophoretic display (EPD), a plasma display (PDP), a thin-film transistor (TFT), a microprocessor, a random access memory (RAM), and the like on a flexible substrate.

U.S. Patent No. 8,552,299 discloses a method of manufacturing an elongatable and bendable electronic device such as semiconductor, electronic circuitry and components that maintain performance even when stretched or compressed, bent or deformed. The technical feature of U.S. Patent No. 8,552,299 is to position an electronic device based on a top-down thin film process in a neutral mechanical layer to implement an extensible device.

In contrast, the present invention overcomes the problem that the silicon transfer process according to the prior art is time-consuming and difficult to implement in a large area by implementing a memory by a thin film deposition process. Further, the present invention can improve the ductility of a memory by utilizing a twisted wire pattern.

A basic object of the present invention is to provide an elastic substrate; A first patterned polymer layer formed adjacent to the elastic substrate; An electronic device formed adjacent to the patterned polymer layer; And a second patterned polymer layer formed adjacent to the memory element, wherein each of the first and second electrodes of the memory element adjacent to the first patterned polymer layer and the second patterned polymer layer comprises a pattern Elastic < / RTI > electronic devices.

It is still another object of the present invention to provide a method of manufacturing a semiconductor device, comprising: (i) sequentially coating a poly (methyl methacrylate) and a first polymer on a silicon substrate and curing; (ii) patterning the first polymer layer; (iii) fabricating an electronic device adjacent to the first patterned polymer layer; (iv) forming a second patterned polymer layer adjacent to the electronic device; (v) removing the silicon substrate and the poly (methyl methacrylate) to obtain a device encapsulated with the first polymer and the second polymer; And (vi) attaching an element encapsulated with the first polymer and the second polymer to an elastic substrate, wherein the first patterned polymer layer and the memory element adjacent to the second patterned polymer layer Wherein the first electrode and the second electrode of the first electrode and the second electrode are patterned.

The basic object of the present invention described above is to provide an elastic substrate; A first patterned polymer layer formed adjacent to the elastic substrate; An electronic device formed adjacent to the patterned polymer layer; And a second patterned polymer layer formed adjacent to the memory element, wherein each of the first and second electrodes of the memory element adjacent to the first patterned polymer layer and the second patterned polymer layer comprises a pattern By providing a flexible and flexible electronic device that is compliant.

As used herein, the term "stretchable and flexible electronic device" refers to an electronic device that exhibits a stable structure and operation even when deformed by stretching, compressing, bending, twisting,

In the flexible and flexible electronic device of the present invention, the elastic substrate may be polydimethylsiloxane or poly (glycerol sebacate).

In addition, the first patterned polymer layer or the second patterned polymer layer may be polyimide, benzocyclobutene (BCB) or SU-8. As used herein, the term "SU-8" refers to an epoxy-based negative photoresist.

In the flexible and flexible electronic device of the present invention, the first patterned polymer layer, the second patterned polymer layer, and the first patterned electrode and the second patterned electrode are in serpentine ). ≪ / RTI >

The electronic device included in the flexible and flexible electronic device of the present invention may be a memory device such as an active memory device or a passive memory device. The active memory device may be a DRAM, a flash memory, a spin-torque-transfer RAM (STT-RAM), or the like, and the passive memory device may include a Resistance RAM (RRAM), Phase Change RAM (PCRAM), Ferroelectric RAM (FERAM), and the like.

In particular, the electronic device may be a non-volatile resistive memory device. The non-volatile resistive memory element comprising: a first patterned electrode; A non-conductive layer made of a first metal oxide formed adjacent to the first electrode; A metal nanoparticle layer formed adjacent to the first metal oxide nonconductor layer; A non-conductive layer made of a second metal oxide formed adjacent to the metal nanoparticle layer; And a second patterned electrode formed adjacent to the second metal oxide layer.

As used herein, the term " Langmuir-blowjar assembly "refers to a solid substrate that is immersed in a liquid and then withdrawn to transfer one or more nanoparticle monolayers from the liquid subphase onto the solid substrate to form a two- Is formed.

As used herein, "self-assembly" refers to the process by which disordered systems of certain components form structured structures or patterns as a result of specific local interactions between the components.

The first patterned electrode of the non-volatile resistive memory device, which may be included in the flexible and flexible electronic device of the present invention, is made of a material selected from the group consisting of Al, Cu, Ag, Au, Pt, TiN, indium tin oxide (ITO) Mg, Zn or Fe.

The first metal oxide may be selected from titanium dioxide, tantalum oxide, vanadium oxide, molybdenum oxide, aluminum oxide, cobalt oxide, zinc oxide, magnesium oxide, zirconium oxide or hafnium oxide. The thickness of the first metal oxide nonconductor layer may be between 5 nm and 200 nm.

In addition, the metal nanoparticles may be Au, Pt, or Ag, and the size of the metal nanoparticles may be 2 nm to 100 nm. The metal oxide nanoparticle layer may be formed by a Langmuir-Blodgett, nano-layer, or spin-coating process of nanoparticles. Furthermore, the number of the metal oxide nanoparticle layers can be from 1 to 10, and can be adjusted to meet the required power. More preferably, the number of the metal oxide nanoparticle layers may be three.

The second metal oxide of the non-volatile resistive memory element may be selected from titanium dioxide, tantalum oxide, vanadium oxide, molybdenum oxide, aluminum oxide, cobalt oxide, zinc oxide, magnesium oxide, zirconium oxide or hafnium oxide. The thickness of the second metal oxide nonconductor layer may be between 5 nm and 200 nm.

The second patterned electrode may be selected from Al, Cu, Ag, Au, Pt, TiN, ITO, TaN, W, Mg, Zn or Fe.

It is still another object of the present invention to provide a method of manufacturing a semiconductor device, comprising: (i) sequentially coating a poly (methyl methacrylate) and a first polymer on a silicon substrate and curing; (ii) patterning the first polymer layer; (iii) fabricating an electronic device adjacent to the first patterned polymer layer; (iv) forming a second patterned polymer layer adjacent to the electronic device; (v) removing the silicon substrate and the poly (methyl methacrylate) to obtain a device encapsulated with the first polymer and the second polymer; And (vi) attaching an element encapsulated with the first polymer and the second polymer to an elastic substrate, wherein the first patterned polymer layer and the memory element adjacent to the second patterned polymer layer Wherein the first electrode and the second electrode of the first electrode and the second electrode are patterned, respectively.

In the method of the present invention, the elastic substrate may be polydimethylsiloxane or poly (glycerol sebacate).

Further, in the method of the present invention, the first polymer layer or the second polymer layer may be polyimide, benzocyclobutene (BCB) or SU-8.

In the method of the present invention, the first patterned polymer layer, the second patterned polymer layer, and the first patterned electrode and the second patterned electrode are patterned in a serpentine pattern .

In the method of the present invention, the electronic device may be a memory device such as an active memory device or a passive memory device. The active memory device may be a DRAM, a flash memory, a spin-torque-transfer RAM (STT-RAM), or the like, and the passive memory device may include a Resistance RAM (RRAM), Phase Change RAM (PCRAM), Ferroelectric RAM (FERAM), and the like.

In particular, the electronic device may be a non-volatile resistive memory device, the non-volatile resistive memory device comprising: a first electrode; A non-conductive layer made of a first metal oxide formed adjacent to the first electrode; A metal nanoparticle layer formed adjacent to the first metal oxide nonconductor layer; A non-conductive layer made of a second metal oxide formed adjacent to the metal nanoparticle layer; And a second electrode formed adjacent to the second metal oxide layer.

The first electrode of the nonvolatile memory element may be selected from Al, Cu, Ag, Au, Pt, TiN, ITO, TaN, W, Mg, Zn or Fe.

Also, the first metal oxide of the non-volatile memory element may be selected from titanium dioxide, tantalum oxide, vanadium oxide, molybdenum oxide, aluminum oxide, cobalt oxide, zinc oxide, magnesium oxide, zirconium oxide or hafnium oxide . The thickness of the first metal oxide nonconductor layer may be between 5 nm and 200 nm.

The metal nanoparticles of the non-volatile memory device may be Au, Pt, or Ag, and the size of the metal nanoparticles may be 2 nm to 100 nm. In addition, the metal oxide nanoparticle layer may be formed by Langmuir-Blodgett, nanofiltration or spin-coating of nanoparticles. Furthermore, the number of the metal oxide nanoparticle layers can be from 1 to 10, and can be adjusted to meet the required power. More preferably, the number of the metal oxide nanoparticle layers may be three.

The second metal oxide of the non-volatile memory element may be selected from titanium dioxide, tantalum oxide, vanadium oxide, molybdenum oxide, aluminum oxide, cobalt oxide, zinc oxide, magnesium oxide, zirconium oxide or hafnium oxide. The thickness of the second metal oxide nonconductor layer may be 5 nm to 200 nm.

The second electrode of the nonvolatile memory device may be selected from Al, Cu, Ag, Au, Pt, TiN, ITO, TaN, W, Mg, Zn or Fe.

More specifically, the non-volatile memory device comprises: (a) forming a first electrode on a substrate; (b) forming a non-conductive layer of a first metal oxide adjacent to the first electrode; (c) forming a metal nanoparticle layer adjacent to the first metal oxide nonconductor layer; (d) forming a non-conductive layer of a second metal oxide adjacent to the metal nanoparticle layer; And (e) forming a second electrode adjacent to the second metal oxide nonconductor layer.

In the non-volatile memory device fabrication method, the step (a) may be performed by a thermal deposition, an electron beam deposition, or a magnetron sputtering process. In the step (a), the first electrode may be selected from Al, Cu, Ag, Au, Pt, TiN, ITO, TaN, W, Mg, Zn or Fe.

In the non-volatile memory device manufacturing method, the step (b) may be performed by magnetron sputtering or atomic layer deposition. The first metal oxide may be selected from titanium dioxide, tantalum oxide, vanadium oxide, molybdenum oxide, aluminum oxide, cobalt oxide, zinc oxide, magnesium oxide, zirconium oxide or hafnium oxide. Also, the thickness of the first metal oxide non-conductive layer may be 5 nm to 200 nm.

In the nonvolatile memory device fabrication method, the step (c) may be performed by a Langmuir-Blodgett assembly, a layer-by-layer assembly or a spin-coating assembly process. The metal nanoparticles may be Au, Pt, or Ag. In addition, the number of the metal oxide nanoparticle layers can be from 1 to 10, and can be adjusted to meet the required power. More preferably, the number of the metal oxide nanoparticle layers may be three.

In the non-volatile memory device manufacturing method, the step (d) may be performed by magnetron sputtering or atomic layer deposition. The second metal oxide may be selected from titanium dioxide, tantalum oxide, vanadium oxide, molybdenum oxide, aluminum oxide, cobalt oxide, zinc oxide, magnesium oxide, zirconium oxide or hafnium oxide. The thickness of the second metal oxide nonconductor layer may be 5 nm to 200 nm.

In the non-volatile memory device fabrication method, the step (e) may be performed by a thermal deposition process, an electron beam deposition process, or a magnetron sputtering process. The second electrode may be selected from Al, Cu, Ag, Au, Pt, TiN, ITO, TaN, W, Mg, Zn or Fe.

The flexible and flexible electronic device of the present invention stably operates the electronic device despite deformation such as elongation, compression, bending, twisting and the like. Therefore, the elastic and flexible electronic devices of the present invention can be applied not only to stress but also to living bodies such as wearable electronic devices and skin.

1A is a diagram illustrating Langmuir-BlowJet (LB) assembly and stearic acid (SAM) functionalization; FIG. 1B is a photograph of the LB assembly process (top) and plane TEM photographs (bottom) for 1-layer gold nanoparticles and 3-layer gold nanoparticles; Figure 1C is a cross-sectional TEM image of fabricated memory cells; FIG. 1D is an EDS profile showing the thickness of a three-layer gold nanoparticle in MINIM (metal-insulator-nanoparticle-nonconductor-metal).
FIG. 2A is a schematic view of a third embodiment of the present invention in which MIM (metal-insulator-metal), MISIM (metal-insulated-self-assembled monolayer (SAM) IV characteristics of bipolar resistive switching of structures; Figure 2b is a diagram illustrating low current resistive switching due to gold NP-induced traps; Figure 2C is an IV curve at MIM and MINIM attached to PDMS and encapsulated in polyimide; Figure 2D shows IV characteristics at a compliance current of about 100 A or less at MIM and MINIM attached to PDMS and encapsulated in polyimide; Figure 2e shows the results of the reliability test (durability (left) and retention (right)) of a MINIM encapsulated in polyimide attached to PDMS (resistance value measurement at -0.5 V); 2f is the cumulative probability at MIM and MINIM attached to PDMS and encapsulated in polyimide; Figure 2g shows MIM (left-hand side) and MIM (right-hand side) MLC (multi-layer cell) operation attached to PDMS and encapsulated in polyimide.
FIG. 3 is a graph showing changes in the elongation and relaxation of the stretchable and soft memory elements in Example 4 according to the present invention when the stretchable and soft memory elements are stretched at a strain value of about 3% to 25% (Fig. 3B), and a flexed and flexible resistive memory arrangement in a bent state (left in Fig. 3C) and a twisted state (right in Fig. 3C).

Hereinafter, the present invention will be described in more detail with reference to the following examples or drawings. It is to be understood, however, that the following description of the embodiments or drawings is intended to illustrate specific embodiments of the invention and is not intended to be exhaustive or to limit the scope of the invention to the precise forms disclosed.

Example  1. Synthesis of gold nanoparticles

0.4 g of _{HAuCl 4 · 3H 2 O (99.9} %, Strem, USA), oleyl amine (90%, Acros, USA) and 30 mL of 1-octadecene (90%, Sigma Aldrich, USA ) at room temperature for 50 mL glass vial. The vial was placed in an oil bath and heated to 90 ° C. The solution was heated for 2 hours, after which the nanoparticles were precipitated, washed twice with ethanol and then centrifuged. The precipitated nanoparticles were redispersed in 5 mL of chloroform.

Example  2. Fabrication of Nonvolatile Resistive Memory Device

(PMMA) (A11, Microchem, USA; about 1 μm, spin coated at 3000 rpm for 30 seconds) and polyamic acid (PI) (polyamic acid, Sigma Aldrich, coated for 60 seconds at rpm) was spin-coated onto a silicon handle wafer (test grade, 4science, Korea). After the PMMA and PI were cured at 200 ° C for 2 hours, aluminum used as a first electrode was deposited by thermal evaporation (350 nm thick), patterned by photolithography, and wet etched. Then, a first TiO ₂ nanomembrane (66 nm thick) was RF magnetron sputtered (base pressure: 5 × 10 ^-6 Torr, room temperature, deposition pressure: 5 mTorr, 20 sccm, RF Power 150 W) (first metal oxide nonconductor layer).

The gold nanoparticles synthesized in Example 1 were assembled on the first TiO ₂ nanomembrane through a LB assembly process as follows (FIG. 1A). First, gold nanoparticles capped with oleylamine were dispersed in chloroform (50 mg / mL). The dispersion was added dropwise onto the water sub-phase of an LB trough (IUD 1000, KSV instrument, Finland). After evaporating the solvent, the surface layer was compressed using a mobile barrier (5 mm / min). After the surface pressure reached 30 mN / m, the substrate was lifted and immersed at a rate of 1 mm / min to assemble the gold nanoparticle layer on the substrate.

1B shows photographs (upper part) for the LB assembly process and plane TEM photographs (lower) for one layer of gold nanoparticles and three layers of gold nanoparticles. The number of assembly layers can be controlled by the number of dipping / pulling cycles. Instead of the gold nanoparticle layer, the first TiO ₂ nanomembrane was coated with a self-assembled monolayer (stearic acid) to confirm the ligand effect on memory performance (FIG. 1A). (ii) a metal-non-conductor-nanoparticle (NP) comprising a layer of gold nanoparticles (about 12 nm), a nonconductor- (MINIM), iii) a MINIM containing three closely packed gold nanoparticles (about 26 nm) is shown in FIG. The thickness of the three-layered gold nanoparticle layer was confirmed through an energy dispersive X-ray spectroscopy profile of the cross section (Fig. 1d). In the LB assembly, a closely-packed monolayer assembly plays an important role in device uniformity as well as precise thickness control of a plurality of single layers.

Then, using the same method as the deposition of the TiO ₂ nano-membrane of claim 1, it was deposited to a second TiO ₂ nano-membrane (second non-conductive metal oxide layer) on the gold nanoparticle layer (66 nm thick). An aluminum second electrode was deposited adjacent to the second TiO ₂ nanomembrane by thermal evaporation. The second electrode layer was patterned by a photolithography method to fabricate a serpentine-patterned resistance memory. Next, the PI precursor was spin-coated to form the active layer in the vicinity of the neutral mechanical plane, and a reactive ion etching (RIE) process using O ₂ and SF ₆ (O ₂ flow rate of 100 sccm, chamber pressure of 100 mTorr, 150 W RF power, 5 minutes, SF ₆ flow rate of 50 sccm, chamber pressure of 55 mTorr, 250 W RF power, 4 minutes and 30 seconds).

After the fabrication of the memory device, all devices on the silicon wafer were immersed in boiling acetone. The acetone removed the PMMA layer and separated the PI encapsulated device from the silicon handle wafer. Thereafter, the memory element was separated using a water-soluble tape (3M, USA) and transferred onto printed PDMS (polydimethyl siloxane).

Example  3. Characterization of Nonvolatile Resistive Memory Devices

In order to evaluate the electrical performance, a bipolar IV curve for the MIM, MISIM and MINIM structures attached to PDMS and encapsulated in PDMS, prepared according to the method of Example 2, was determined (Fig. 2a ). The inset of FIG. 2A shows the bias order. The initial state is a high-resistance state (HRS), and a low-resistance state (LRS) transition occurs when a negative voltage ("set") is applied. Thereafter, the structures are switched to the HRS by a positive voltage ("reset"). The I-V characteristics of MIM and MISIM attached to PDMS and encapsulated in polyimide were nearly identical; The formation of one gold nanoparticle layer in the TiO2 layer reduced the set and reset currents by an order of magnitude compared to the MIM structure. The current level was further reduced by an order of three in the MIMIN containing three layers of gold nanoparticles. These results indicate that the assembly of uniform gold nanoparticles in the active layer plays an important role in reducing power consumption and that the stearic acid ligand has little effect on current reduction. This low power consumption characteristic plays an important role in the long-term use of the memory device.

Figure 2B is a diagram illustrating low current switching due to gold nanoparticle-induced traps. 2C is a log-log IV curve emphasizing the negative voltage region. The conduction mechanism in MINIM, which is attached to PDMS and encapsulated in polyimide, is similar to the conduction mechanism of MIM, and the trap-controlled space-charge-limited-current (SCLC) theory . Figure 2d shows IV curves at different compliance currents for MIM (left) and MINIM (right) attached to PDMS and encapsulated in polyimide. At a compliance current of less than 100 μA, MINIMs attached to PDMS and encapsulated with polyimide showed better on / off ratio than MIM and MISIM attached to PDMS and encapsulated with polyimide. The reliability (endurance and retention) of MINIM, MIM and MISIM attached to PDMS and encapsulated in polyimide are shown in Figure 2E, respectively. The durability was not substantially degraded in continuous sweeping over 100 cycles (left in FIG. 2e), and good retention rate from room temperature to 1,000 seconds was confirmed (right in FIG. 2e). Multi-level cell (MLC) operation means that multiple data storage is possible in a single cell with a discrete compliance current that has a discrete resistance value (FIG. 2D). Such different resistance values can store multiple information in a single cell (Figure 2g). An MLC with a current value of -100 μA or less was performed in a MINIM encapsulated in a polyimide attached to a PDMS, and the data was preserved in read operations over 100 times.

Example  4. Mechanical Stability of Flexible and Flexible Resistive Memory Devices

Optical micrographs of the flexible and flexible resistive memory devices prepared in Example 2 and their properties in the stretching process are shown in FIGS. 3A and 3B, respectively. When the device was elongated by about 25%, the device exhibited stable electrical operation. The flexible and flexible resistive memory device was also stable in bending and twisting (Figure 3c).

Claims (55)

An elastic substrate;
A first patterned polymer layer formed adjacent to the elastic substrate;
An electronic device formed adjacent to the first patterned polymer layer;
And a second patterned polymer layer formed adjacent to the electronic device,
Wherein each of the first and second electrodes of the electronic device adjacent to the first patterned polymer layer and the second patterned polymer layer is a patterned first patterned electrode and a second patterned electrode,
The electronic device is a memory device,
Wherein the electronic device is encapsulated by the first patterned polymer layer and the second patterned polymer layer,
Wherein the first patterned polymer layer, the second patterned polymer layer, and the first patterned electrode and the second patterned electrode are patterned in a serpentine pattern. Soft electronic device. The flexible and flexible electronic device according to claim 1, wherein the elastic substrate is polydimethylsiloxane or poly (glycerol sebacate). The flexible and flexible electronic device according to claim 1, wherein the first patterned polymer layer or the second patterned polymer layer is selected from the group consisting of polyimide, benzocyclobutene, and SU-8. delete 2. The flexible and flexible electronic device of claim 1, wherein the electronic device is an active memory device or a passive memory device. 6. The flexible and flexible electronic device of claim 5, wherein the active memory device is selected from the group consisting of a DRAM, a flash memory, and a spin-torque-transfer RAM. 6. The flexible and flexible electronic device of claim 5, wherein the passive memory device is selected from the group consisting of resistive RAM, phase change RAM, and ferroelectric RAM. The flexible and flexible electronic device of claim 1, wherein the electronic device is a non-volatile resistive memory device. 9. The non-volatile memory device of claim 8,
A first patterned electrode;
A non-conductive layer made of a first metal oxide formed adjacent to the first electrode;
A metal nanoparticle layer formed adjacent to the first metal oxide nonconductor layer;
A non-conductive layer made of a second metal oxide formed adjacent to the metal nanoparticle layer; And
And a second patterned electrode formed adjacent to the second metal oxide nonconductor layer. 10. The flexible and flexible electronic device of claim 9, wherein the first patterned electrode and the second patterned electrode are patterned serpentine. 11. The method of claim 9, wherein the first patterned electrode is selected from the group consisting of Al, Cu, Ag, Au, Pt, TiN, ITO, TaN, W, Mg, Electronic device. The method of claim 9, wherein the first metal oxide is selected from the group consisting of titanium dioxide, tantalum oxide, vanadium oxide, molybdenum oxide, aluminum oxide, cobalt oxide, zinc oxide, magnesium oxide, zirconium oxide, Features a flexible and flexible electronic device. The flexible and flexible electronic device according to claim 9, wherein the first metal oxide nonconductor layer has a thickness of 5 nm to 200 nm. 10. The flexible and flexible electronic device of claim 9, wherein the metal nanoparticles are nanoparticles of a metal selected from the group consisting of Au, Pt, and Ag. The flexible and flexible electronic device according to claim 9, wherein the metal nanoparticles have a size of 2 nm to 100 nm. 10. The method of claim 9, wherein the metal nanoparticle layer is formed by a process selected from the group consisting of Langmuir-blown assembly, layer-by-layer assembly, and spin-coating assembly of nanoparticles. Electronic device. 10. The flexible and flexible electronic device according to claim 9, wherein the number of the metal nanoparticle layers is 1 to 10 layers. 10. The flexible and flexible electronic device according to claim 9, wherein the number of the metal nanoparticle layers is three. The method of claim 9, wherein the second metal oxide is selected from the group consisting of titanium dioxide, tantalum oxide, vanadium oxide, molybdenum oxide, aluminum oxide, cobalt oxide, zinc oxide, magnesium oxide, zirconium oxide, Features a flexible and flexible electronic device. The flexible and flexible electronic device according to claim 9, wherein the thickness of the second metal oxide non-conductive layer is 5 nm to 200 nm. 11. The method of claim 9, wherein the second patterned electrode is selected from the group consisting of Al, Cu, Ag, Au, Pt, TiN, ITO, TaN, W, Mg, Electronic device. (i) sequentially coating a poly (methyl methacrylate) and a first polymer on a silicon substrate and curing to form a poly (methyl methacrylate) layer and a first polymer layer;
(ii) patterning the first polymer layer to form a first patterned polymer layer;
(iii) fabricating an electronic device adjacent to the first patterned polymer layer;
(iv) forming a second patterned polymer layer adjacent to the electronic device;
(v) removing the silicon substrate and the poly (methyl methacrylate) to obtain a device encapsulated with the first patterned polymer layer and the second patterned polymer layer; And
(vi) attaching the encapsulated device to an elastic substrate,
Wherein each of the first and second electrodes of the electronic device adjacent to the first patterned polymer layer and the second patterned polymer layer is a patterned first patterned electrode and a second patterned electrode,
The electronic device is a memory device,
Wherein the electronic device is encapsulated by the first patterned polymer layer and the second patterned polymer layer,
Wherein the first patterned polymer layer, the second patterned polymer layer, and the first patterned electrode and the second patterned electrode are patterned in a serpentine pattern. A method of manufacturing a flexible electronic device. 23. The method of claim 22, wherein the elastic substrate is polydimethylsiloxane or poly (glycerol sebacate). The flexible electronic device according to claim 22, wherein the first patterned polymer layer or the second patterned polymer layer is selected from the group consisting of polyimide, benzocyclobutene, and SU-8. Way. delete 23. The method of claim 22, wherein the electronic device is an active memory device or a passive memory device. 27. The method of claim 26, wherein the active memory device is selected from the group consisting of a DRAM, a flash memory, and a spin-torque-transfer RAM. 27. The method of claim 26, wherein the passive memory element is selected from the group consisting of resistive RAM, phase change RAM, and ferroelectric RAM. 23. The method of claim 22, wherein the electronic device is a non-volatile resistive memory device. 30. The non-volatile memory device of claim 29,
A first patterned electrode;
A non-conductive layer made of a first metal oxide formed adjacent to the first electrode;
A metal nanoparticle layer formed adjacent to the first metal oxide nonconductor layer;
A non-conductive layer made of a second metal oxide formed adjacent to the metal nanoparticle layer; And
And a second patterned electrode formed adjacent to the second metal oxide nonconductor layer. ≪ Desc / Clms Page number 19 > 31. The method of claim 30, wherein the first patterned electrode is selected from the group consisting of Al, Cu, Ag, Au, Pt, TiN, ITO, TaN, W, Mg, A method of manufacturing an electronic device. 31. The method of claim 30, wherein the first metal oxide is selected from the group consisting of titanium dioxide, tantalum oxide, vanadium oxide, molybdenum oxide, aluminum oxide, cobalt oxide, zinc oxide, magnesium oxide, zirconium oxide, Wherein the flexible electronic device is a flexible electronic device. 31. The method of claim 30, wherein the thickness of the first metal oxide nonconductor layer is 5 nm to 200 nm. 31. The method of claim 30, wherein the metal nanoparticles are nanoparticles of a metal selected from the group consisting of Au, Pt, and Ag. 31. The method of claim 30, wherein the metal nanoparticles have a size of 2 nm to 100 nm. 31. The method of claim 30, wherein the metal nanoparticle layer is formed by a process selected from the group consisting of Langmuir-blowing, layer-by-layer, and spin-coating of nanoparticles. A method of manufacturing an electronic device. 31. The method according to claim 30, wherein the number of the metal nanoparticle layers is 1 to 10 layers. 31. The method of claim 30 wherein said second metal oxide is selected from the group consisting of titanium dioxide, tantalum oxide, vanadium oxide, molybdenum oxide, aluminum oxide, cobalt oxide, zinc oxide, magnesium oxide, zirconium oxide, Wherein the flexible electronic device is a flexible electronic device. 31. The method of claim 30, wherein the thickness of the second metal oxide nonconductor layer is 5 nm to 200 nm. 31. The method of claim 30, wherein the second patterned electrode is selected from the group consisting of Al, Cu, Ag, Au, Pt, TiN, ITO, TaN, W, Mg, A method of manufacturing an electronic device. 32. The non-volatile memory device of claim 30,
(a) forming a first patterned electrode on the first patterned polymer layer;
(b) forming a non-conductive layer of a first metal oxide adjacent to the first electrode;
(c) forming a metal nanoparticle layer adjacent to the first metal oxide nonconductor layer;
(d) forming a non-conductive layer of a second metal oxide adjacent to the metal nanoparticle layer; And
(e) forming a second patterned electrode adjacent to the second metal oxide nonconductor layer. < Desc / Clms Page number 19 > 42. The method of claim 41, wherein step (a) is performed by a process selected from the group consisting of thermal evaporation, electron beam evaporation, and magnetron sputtering. 42. The method of claim 41, wherein the first patterned electrode is selected from the group consisting of Al, Cu, Ag, Au, Pt, TiN, ITO, TaN, W, Mg, A method of manufacturing an electronic device. 42. The method of claim 41, wherein step (b) is performed by magnetron sputtering or atomic layer deposition. 42. The method of claim 41 wherein said first metal oxide is selected from the group consisting of titanium dioxide, tantalum oxide, vanadium oxide, molybdenum oxide, aluminum oxide, cobalt oxide, zinc oxide, magnesium oxide, zirconium oxide, Wherein the flexible electronic device is a flexible electronic device. 42. The method of claim 41, wherein the thickness of the first metal oxide non-conductive layer is 5 nm to 200 nm. 42. The method of claim 41, wherein step (c) is performed by a process selected from the group consisting of Langmuir-blowjoint assembly, layer-by-layer assembly and spin-coating assembly. Way. 42. The method of claim 41, wherein the metal nanoparticles are nanoparticles of a metal selected from the group consisting of Au, Pt, and Ag. 42. The method of claim 41, wherein the number of the metal nanoparticle layers is 1 to 10 layers. 42. The method according to claim 41, wherein the number of the metal nanoparticle layers is three. 42. The method of claim 41, wherein step (d) is performed by magnetron sputtering or atomic layer deposition. 42. The method of claim 41 wherein said second metal oxide is selected from the group consisting of titanium dioxide, tantalum oxide, vanadium oxide, molybdenum oxide, aluminum oxide, cobalt oxide, zinc oxide, magnesium oxide, zirconium oxide, Wherein the flexible electronic device is a flexible electronic device. 42. The method of claim 41, wherein the thickness of the second metal oxide non-conductive layer is 5 nm to 200 nm. 42. The method of claim 41, wherein step (e) is performed by a process selected from the group consisting of thermal deposition, electron beam deposition, and magnetron sputtering. 42. The method of claim 41, wherein the second patterned electrode is selected from the group consisting of Al, Cu, Ag, Au, Pt, TiN, ITO, TaN, W, Mg, A method of manufacturing an electronic device.

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