KR101745964B1 - A high speed true random number generator using comparator - Google Patents

A high speed true random number generator using comparator Download PDF

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KR101745964B1
KR101745964B1 KR1020150163438A KR20150163438A KR101745964B1 KR 101745964 B1 KR101745964 B1 KR 101745964B1 KR 1020150163438 A KR1020150163438 A KR 1020150163438A KR 20150163438 A KR20150163438 A KR 20150163438A KR 101745964 B1 KR101745964 B1 KR 101745964B1
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South Korea
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comparator
output
outputting
voltage
correction
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KR1020150163438A
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Korean (ko)
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KR20170059271A (en
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김철우
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고려대학교 산학협력단
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/58Random or pseudo-random number generators
    • G06F7/588Random number generators, i.e. based on natural stochastic processes
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/165Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values
    • G01R19/16566Circuits and arrangements for comparing voltage or current with one or several thresholds and for indicating the result not covered by subgroups G01R19/16504, G01R19/16528, G01R19/16533
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04Generating or distributing clock signals or signals derived directly therefrom

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  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Manipulation Of Pulses (AREA)

Abstract

A random number generator using a comparator is provided. A random number generator using a comparator according to an embodiment of the present invention includes a power supply unit for outputting an input voltage of a direct current; A comparator for receiving an output of the power applying unit at two input terminals and outputting a comparator output comparing a random voltage difference between the two input terminals caused by an internal thermal noise; And a correction unit that receives the comparator output and outputs a correction output that is corrected to a predetermined voltage corresponding to low or high.

Description

Technical Field [0001] The present invention relates to a random number generator using a comparator,

The present invention relates to a true random number generator and a generating method, and more particularly, to a real random number generator and a generation method using a metastability and a thermal noise of a comparator.

With the development of the Internet of things, many devices are connected through the Internet, and as personal mobile devices increase, data encryption and information security become very important. Therefore, a random number generator required for data encryption and information security is attracting attention, and a real random number generator is recognized as an essential element for encryption.

Generally, there are two kinds of random number generators: a pseudo random number generator and a true random number generator. The pseudo-random number generator has periodicity because it has a fixed period and random number is repeated. On the other hand, a real random number generator has a high uncertainty (entropy) and has unpredictable characteristics, making it more suitable for data encryption and information security.

Thus, the present invention is implemented in a way that uses unpredictable thermal noise to generate random random numbers for use in data encryption and information security.

A related prior art is Registered Patent Publication No. 10-0089985 (the name of the invention: a random number generator, public date: November 30, 2002).

The present invention seeks to provide an apparatus and method for generating a random random number using a thermal noise inside a circuit that can not be predicted.

In order to achieve the above object, the present invention provides a real random number generator using a comparator, comprising: a power supply unit for outputting a DC input voltage; A comparator for receiving an output of the power applying unit at two input terminals and outputting a comparator output comparing a random voltage difference between the two input terminals caused by an internal thermal noise; And a correction unit that receives the comparator output and outputs a correction output that is corrected to a predetermined voltage corresponding to low or high.

Preferably, the reconfigurable unit further includes a decompression unit that receives the correction output and outputs a clock recovery output converted in response to the second clock signal. The comparator may perform the comparison operation based on the first clock signal have.

Preferably, the decompression unit may be a D-flip flop.

Advantageously, the comparator is capable of performing the comparison operation in metastability that occurs when the same input is applied to the two inputs.

The power applying unit may further include a voltage converting unit for converting the input voltage into the operating voltage of the comparator.

Preferably, the correction unit may be a slicer.

Preferably, an output buffer for storing the correction output may be further included.

According to another aspect of the present invention, there is provided a method of generating a random number using a comparator, the method including: outputting a DC input voltage; The comparator receiving the output of the power applying unit at two input terminals and outputting a comparator output comparing the random voltage differences of the two input terminals caused by internal thermal noise; And a correction unit receiving the comparator output and outputting a correction output corrected to a predetermined voltage corresponding to low or high.

Preferably, the restoring unit may receive the correction output and output the clock recovery output converted in response to the second clock signal. The comparator output comparing the random voltage differences of the two input stages may be output May perform the comparison operation based on the first clock signal.

Preferably, the step of outputting the converted clock recovery output corresponding to the second clock signal may be performed by a D-flip-flop.

Preferably, the step of outputting the comparator output comparing the voltage differences of the two input terminals may be performed in a metastable state in which the same input is applied to the two input terminals.

The step of outputting the DC input voltage may further include converting the input voltage into the operating voltage of the comparator.

Preferably, the step of outputting the correction output corrected with the predetermined voltage may be performed by the slicer.

Preferably, the output buffer stores the correction output.

The present invention is based on the metastability and thermal noise of a comparator and is composed of a simpler circuit than a conventional technique using a ring oscillator and can output a real random number with a higher bit rate while consuming a lower power There are advantages.

1 is a view for explaining a random number generator according to an embodiment of the present invention.
2 is a view for explaining a method of generating random numbers according to an embodiment of the present invention.
3 is a diagram for explaining the output waveform of the comparator.
4 is a diagram for explaining the output waveform of the restoration section.
5 is a view for explaining a random number generator according to another embodiment of the present invention.

While the invention is susceptible to various modifications and alternative forms, specific embodiments thereof are shown by way of example in the drawings and will herein be described in detail. It should be understood, however, that the invention is not intended to be limited to the particular embodiments, but includes all modifications, equivalents, and alternatives falling within the spirit and scope of the invention. Like reference numerals are used for like elements in describing each drawing.

The terms first, second, A, B, etc. may be used to describe various elements, but the elements should not be limited by the terms. The terms are used only for the purpose of distinguishing one component from another. For example, without departing from the scope of the present invention, the first component may be referred to as a second component, and similarly, the second component may also be referred to as a first component. And / or < / RTI > includes any combination of a plurality of related listed items or any of a plurality of related listed items.

It is to be understood that when an element is referred to as being "connected" or "connected" to another element, it may be directly connected or connected to the other element, . On the other hand, when an element is referred to as being "directly connected" or "directly connected" to another element, it should be understood that there are no other elements in between.

The terminology used in this application is used only to describe a specific embodiment and is not intended to limit the invention. The singular expressions include plural expressions unless the context clearly dictates otherwise. In the present application, the terms "comprises" or "having" and the like are used to specify that there is a feature, a number, a step, an operation, an element, a component or a combination thereof described in the specification, But do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, or combinations thereof.

Unless defined otherwise, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. Terms such as those defined in commonly used dictionaries are to be interpreted as having a meaning consistent with the contextual meaning of the related art and are to be interpreted as either ideal or overly formal in the sense of the present application Do not.

Hereinafter, preferred embodiments according to the present invention will be described in detail with reference to the accompanying drawings.

1 is a view for explaining a random number generator according to an embodiment of the present invention.

Referring to FIG. 1, the real random number generator 100 includes a power applying unit 110, a comparator 120, and a correcting unit 130. In addition, it may further include a restoring unit (not shown) and an output buffer 510.

The power applying unit 110 outputs a DC input voltage.

Here, the DC input voltage output by the power applying unit 110 may be a voltage within an input range determined by the comparator 120.

In another embodiment, the power applying unit 110 may further include a voltage converting unit (not shown) for converting the input voltage into an operating voltage of the comparator 120. [

For example, when the voltage applied to the power applying unit 110 exceeds the range of the operating voltage determined according to the comparator 120, the voltage converting unit is switched to a voltage exceeding a predetermined operating voltage range according to the comparator 120 .

The comparator 120 receives the output of the power applying unit 110 at two input terminals and outputs a comparator output that compares the random voltage differences of the two input terminals caused by internal thermal noise.

At this time, the comparator 120 may perform a comparison operation based on the first clock signal. That is, when the first clock signal is applied to the comparator 120, the comparator 120 performs the comparison operation in accordance with the first clock signal.

The reason why the output of the power applying unit 110 is input to the two input terminals is that the same voltage is input to the two input terminals of the comparator 120 and the voltage difference between the two input terminals due to the internal thermal noise is input to the comparator 120, For comparison purposes.

Here, the thermal noise is a noise caused by irregular movement of free electrons and electrons and ions in the semiconductor due to heat, and the noise is increased as the temperature increases.

For example, instantaneous and random thermal noise may occur due to differences in characteristics of the internal transistors connected to the two input terminals of the comparator 120, and a voltage difference may occur between the two input terminals of the comparator 120 due to such thermal noise. When the comparator 120 is operated by a clock signal of 3 GHz, the waveform of the waveform shown in FIG. 3 can be outputted due to the generation of the thermal noise.

In another embodiment, the comparator 120 may perform a comparison operation in metastability that occurs when the same input is applied to both inputs.

Here, the metastable state refers to a state in which the comparator 120 can not determine the magnitude of the two input terminals because the same voltage is applied to the two input terminals of the comparator 120. At this time, when the voltage of any one of the two input terminals changes due to thermal noise, the comparator 120 can determine the magnitude of the two input terminals.

The correction unit 130 receives the comparator output and outputs a correction output corrected to a predetermined voltage corresponding to low or high.

Here, the output of the comparator 120 is expressed by dividing the output of the comparator 120 into a low value or a high value, so that the voltage corresponding to the row is recognized as 0 in the binary expression and the voltage corresponding to the high is outputted. 1 < / RTI >

For example, if the output of the comparator 120 fails to be output at a predetermined voltage corresponding to low or high for any reason, this voltage can not be recognized as a value of either low or high inside the real random number generator 100 . This is because the real random number generator 100 is set to recognize the voltages corresponding to low and high as 0 and 1, respectively. Therefore, it may be necessary to correct this voltage to one of the voltages corresponding to low and high.

More specifically, referring to FIG. 4, the correction unit 130 may output a waveform obtained by correcting the output of the comparator 120 to a predetermined voltage corresponding to low or high.

In another embodiment, referring to FIG. 5, the corrector 130 may be a slicer 504.

Here, the slicer 504 is a circuit for selectively outputting only a waveform of a predetermined level or higher, and a predetermined voltage corresponding to low and high can be set as needed.

A restoring unit (not shown) receives the correction output and outputs a clock recovery output converted corresponding to the second clock signal. Here, as described above, the first clock signal is a clock signal input to the comparator 120, and the comparator 120 performs a comparison operation according to the signal. The second clock signal is input to the restoration unit And a clock signal in which the restoration unit performs conversion according to the signal as a clock signal.

For example, if the first clock signal and the second clock signal are all at 3 GHz, if the delay occurs while performing the correction operation in the correction unit 130, the correction output is difficult to be an accurate 3 GHz output, It is possible to extract the correction output value in accordance with the rising edge of the clock signal and output the clock recovery output. At this time, since the clock recovery output has a frequency of 3 GHz, the bit rate of the output random number can be up to 3 Gb / s (bits per second). 5, the first clock signal is input to the first clock signal input unit 502, and the second clock signal is input to the second clock signal input unit of the D-flip flop 508 corresponding to the restoration unit 506).

On the other hand, the recovery unit may have a characteristic of maintaining the value of the existing voltage output corresponding to the previous clock signal as it is until the new voltage is output in response to the next clock signal. For example, when the output of the recovery unit corresponding to the previous clock signal is high and the output corresponding to the next clock signal is also high, the output of the recovery unit can be kept high continuously while the previous and next clock signals are input.

Referring to FIG. 4, the output waveform of the restoration unit having the above-described characteristics can be confirmed.

5, the D-flip-flop 508 may extract the correction output value in accordance with the rising edge of the input second clock signal, and output the extracted value.

Finally, the output buffer 510 stores the correction output.

Referring to FIG. 5, the output buffer 510 is a buffer for storing a correction output, and may be connected to use a random number generated by the real random number generator 100 through another circuit. On the other hand, when the restoration unit or the D-flip flop 508 is present, the output buffer 510 can store the clock recovery output without storing the correction output.

As described above, the random random number generator according to the embodiment of the present invention has the effect of generating real random number of high bitrate even in a simple circuit configuration by using random and random thermal noise inside the circuit.

2 is a view for explaining a method of generating random numbers according to an embodiment of the present invention.

In step S210, the power applying unit 110 outputs a DC input voltage.

In another embodiment, step S210 may further comprise converting the input voltage to an operating voltage of the comparator 120. [

In step S220, the comparator 120 receives the output of the power applying unit 110 at two input terminals, and outputs a comparator output that compares a random voltage difference between the two input terminals due to internal thermal noise.

In another embodiment, the comparator 120 may perform a comparison operation in a metastable state in which the same input is applied to both inputs. In addition, the comparator 120 can perform the comparison operation based on the first clock signal.

In step S230, the corrector 130 receives the comparator output and outputs a correction output that is corrected to a predetermined voltage corresponding to low or high.

In another embodiment, the correction of the correction unit 130 may be performed by the slicer 504. [

In another embodiment, the recovery unit (not shown) may receive the correction output and output the clock recovery output converted corresponding to the second clock signal.

In another embodiment, the reconstruction unit may be comprised of a D-flip flop 508.

In another embodiment, the output buffer 510 may store the correction output.

The above-described embodiments of the present invention can be embodied in a general-purpose digital computer that can be embodied as a program that can be executed by a computer and operates the program using a computer-readable recording medium.

The computer readable recording medium includes a magnetic storage medium (e.g., ROM, floppy disk, hard disk, etc.), optical reading medium (e.g., CD ROM, DVD, etc.).

The present invention has been described with reference to the preferred embodiments. It will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims. Therefore, the disclosed embodiments should be considered in an illustrative rather than a restrictive sense. The scope of the present invention is defined by the appended claims rather than by the foregoing description, and all differences within the scope of equivalents thereof should be construed as being included in the present invention.

Claims (14)

A power supply unit for outputting a DC input voltage;
A comparator that receives the output of the power applying unit equally at two input terminals and outputs a comparator output comparing a random voltage difference between the two input terminals caused by an internal thermal noise; And
A comparator for receiving the comparator output and outputting a correction output corrected to a predetermined voltage corresponding to low or high;
And generating a random number generator using the comparator.
The method according to claim 1,
A restoring unit for receiving the correction output and outputting a clock recovery output converted corresponding to the second clock signal;
Further comprising:
Wherein the comparator performs the comparison operation based on the first clock signal.
3. The method of claim 2,
The restoring unit
And a D-flip-flop.
The method according to claim 1,
The comparator
Wherein the comparison operation is performed in metastability generated when the same input is applied to the two input terminals.
The method according to claim 1,
The power applying unit
Further comprising a voltage converting unit for converting an input voltage into an operating voltage of the comparator.
The method according to claim 1,
The correction unit
Wherein the slicer is a slicer.
The method according to claim 1,
An output buffer for storing the correction output;
And generating a random number generator using the comparator.
Outputting an input voltage of a DC power supply unit;
Outputting a comparator output by comparing a random voltage difference between the two input terminals caused by an internal thermal noise by receiving a same input of the output of the power applying unit from the comparator; And
The correction unit receiving the comparator output and outputting a correction output corrected to a predetermined voltage corresponding to the low or high level;
And generating a random number by using the comparator.
9. The method of claim 8,
The restoring unit receiving the correction output and outputting the clock recovery output converted corresponding to the second clock signal;
Further comprising:
Wherein the step of outputting a comparator output comparing a random voltage difference between the two input terminals performs the comparison operation based on a first clock signal.
10. The method of claim 9,
The step of outputting the converted clock recovery output corresponding to the second clock signal
Wherein the conversion is performed by a D-flip-flop.
9. The method of claim 8,
The step of outputting the comparator output comparing the voltage differences of the two input terminals
Wherein the comparison operation is performed in a metastable state generated by applying the same input to the two input terminals.
9. The method of claim 8,
The step of outputting the DC input voltage by the power applying unit
And converting the input voltage to an operating voltage of the comparator.
9. The method of claim 8,
The step of outputting the correction output corrected by the predetermined voltage
Wherein the correction is performed by a slicer.
9. The method of claim 8,
The output buffer storing the correction output;
And generating a random number using the comparator.
KR1020150163438A 2015-11-20 2015-11-20 A high speed true random number generator using comparator KR101745964B1 (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11366639B2 (en) 2018-05-11 2022-06-21 Electronics And Telecommunications Research Institute Apparatus and method for generating quantum random number

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102286432B1 (en) * 2020-07-17 2021-08-04 인천대학교 산학협력단 True random number generator capable of improving errors associated with offset voltage and operating method thereof

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004064196A (en) * 2002-07-25 2004-02-26 Renesas Technology Corp Slice circuit
KR100725978B1 (en) * 2005-07-06 2007-06-08 삼성전자주식회사 Low power random bit generator using thermal noise

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004064196A (en) * 2002-07-25 2004-02-26 Renesas Technology Corp Slice circuit
KR100725978B1 (en) * 2005-07-06 2007-06-08 삼성전자주식회사 Low power random bit generator using thermal noise

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11366639B2 (en) 2018-05-11 2022-06-21 Electronics And Telecommunications Research Institute Apparatus and method for generating quantum random number

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