KR101737621B1 - Array antenna - Google Patents

Abstract

Provided is an array antenna. The array antenna includes: a plurality of radiating element arrays including a plurality of radiating elements arranged in a first direction on a first substrate and arranged in a second direction; and a diplexer formed on the first substrate and configured to transmit a signal of a desired frequency band among the plurality of signals to the plurality of radiating element arrays through filtering on the plurality of signals. The present invention has a function for preventing channel interference among multiple frequency channels.

Description

Array antenna {ARRAY ANTENNA}

The present invention relates to an array antenna having a channel interference suppression function.

In a radar detector, frequency channel scalability is a very important performance. When a radar detector is installed, the frequency channel scalability greatly affects the flexibility and scalability of installation work and the performance of the error.

Conventional radar detectors (eg, frequency modulation continuous wave (FMCW) radar detectors) perform frequency channel separation based on precise voltage control for each bandwidth. However, due to the limitation of the voltage control accuracy and the performance limitations of the RF (radio frequency) transceiver, signals other than the frequency channel signal are transmitted or received, thereby causing an error in the luer detector.

An object of the present invention is to provide an array antenna having a function of suppressing channel interference between a plurality of frequency channels and a radar sensor including the array antenna.

According to an embodiment of the present invention, an array antenna is provided. The array antenna includes a plurality of radiating element arrays each including a plurality of radiating elements arranged in a first direction on a first substrate and arranged in a second direction; And a diplexer formed on the first substrate and transmitting a signal of a desired frequency band among the plurality of signals to the plurality of radiating element arrays through filtering on the plurality of signals.

The diplexer comprising: a first resonator for passing a signal of the first frequency band among the plurality of signals to the plurality of radiating element arrays when the desired frequency band is the first frequency band; And a second resonator formed inside the first resonator, wherein, when the desired frequency band is a second frequency band different from the first frequency band, a signal of the second frequency band, And a second resonator passing through the heat.

The first resonator and the second resonator have a closed loop shape and may be formed on the first substrate.

The diplexer comprising: a first perturbation connected to the first resonator, the perturbation adjusting a capacitance corresponding to an area of the first resonator to adjust a bandwidth of the first frequency band; And a second disturber connected to the second resonator and adjusting a capacitance corresponding to an area of the second resonator to adjust a bandwidth of the second frequency band.

The transmission admittance for the diplexer may be determined based on at least one of a capacitance corresponding to an area of the first disturbance and a capacitance corresponding to an area of the second disturbance.

The input admittance for the even mode of the first resonator and the second resonator is determined based on at least one of a capacitance corresponding to an area of the first disturbance and a capacitance corresponding to an area of the second disturbance .

The input admittance for the odd mode of the first resonator and the second resonator may be determined based on the capacitance between the first resonator and the second resonator.

The diplexer comprising: a first diode located in the first resonator, the first diode turning on the first resonator when the desired frequency band is the first frequency band; And a second diode located in the second resonator and turning on the second resonator when the desired frequency band is the second frequency band.

Wherein the diplexer provides a first bias for turning on the first diode when the desired frequency band is the first frequency band and when the desired frequency band is the second frequency band, And a bias line for providing a second bias for turning on the second diode.

The second disturbance may be connected to a region of the plurality of regions included in the second resonator that is diagonally symmetric with respect to an area where the second diode is located.

The diplexer includes: a first interdigital line receiving the plurality of signals; And a second inter-digital line for transmitting the signal of the desired frequency band to the plurality of radiating element arrays.

The diplexer includes: a first DGS (defected ground structure) located at a lower end of the first inter- digital line and not including a copper foil; And a second DGS located at a lower end of the second inter digital line and not including a copper foil.

The diplexer may further include an RF (radio frequency) inductor disposed between the second resonator and the bias line and providing a predetermined inductance.

The diplexer may pass a reception signal of the desired frequency band among a plurality of reception signals received through the plurality of radiating element arrays.

An equivalent circuit corresponding to the diplexer includes: a first sub-equivalent circuit corresponding to the first inter-digital line; A second sub-equivalent circuit corresponding to the second resonator; And a third sub-equivalent circuit located outside the second sub-equivalent circuit and corresponding to the first resonator.

The third sub-equivalent circuit comprises: a first microstrip transmission line, one end of which is connected to the first node; And a first capacitor having one end connected to the first node and the other end grounded.

The second sub-equivalent circuit comprising: a second microstrip transmission line having one end connected to a second node; And a second capacitor having one end connected to the second node and the other end grounded.

Wherein the first sub-equivalent circuit includes: a third capacitor having one end connected to a third node included in the second sub-equivalent circuit and the other end grounded; A fourth capacitor whose one end is connected to the third node; And a first inductor having one end connected to the fourth capacitor and the other end connected to a fourth node included in the third sub-equivalent circuit.

According to the embodiment of the present invention, by combining a high-performance diplexer with an array antenna, two or more frequency channels can be separated, and channel interference between the frequency channels can be suppressed.

Further, according to the embodiment of the present invention, since a high performance single diplexer for a single substrate is combined with the array antenna, a false alarm caused by inter-frequency channel interference can be completely eliminated. This allows two or more radar detectors with different frequency channels to be installed simultaneously in the same location and on the same fixed support, and the frequency channel can be extended to four or more frequency channels by applying it.

According to the embodiment of the present invention, it is possible to reduce the construction cost by using the same fixed support through the frequency channel expandability, and to provide flexible security planning in various installation environments. This can greatly improve the performance and construction flexibility of the radar detector.

Also, according to the embodiment of the present invention, a fence type radar detector including a 24 GHz array antenna can be implemented.

1 is a diagram showing an operation frequency channel for each radar detector.
2 is a diagram illustrating frequency interference between frequency channels.
3A is a plan view of an array antenna having a channel interference suppression function according to an embodiment of the present invention.
FIG. 3B is a three-dimensional view of an array antenna according to an embodiment of the present invention.
4A is a diagram showing an electrical equivalent circuit corresponding to a diplexer according to an embodiment of the present invention.
4B is a diagram showing an ABCD matrix corresponding to a diplexer according to an embodiment of the present invention.
5 is a diagram showing a frequency response characteristic of a diplexer according to an embodiment of the present invention.
6 is a diagram illustrating a frequency response characteristic according to an even mode and an odd mode of a resonator according to an embodiment of the present invention.
7A is a diagram illustrating a circuit according to an even mode analysis according to an embodiment of the present invention.
7B is a diagram illustrating a circuit according to an odd mode analysis according to an embodiment of the present invention.
8 is a view of a radar detector according to an embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily carry out the present invention. The present invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. In order to clearly illustrate the present invention, parts not related to the description are omitted, and similar parts are denoted by like reference characters throughout the specification.

In the present specification, 'A or B' may include 'A', 'B', or 'both A and B'.

FIG. 1 is a diagram showing an operation frequency channel for each radar detector, and FIG. 2 is a diagram showing frequency interference between frequency channels.

A method of separating a frequency channel using a diplexer is used in order to improve the isolation characteristic between a transmitter and a receiver using different frequencies in a communication system. However, there is no technology currently available to extend the operating frequency channel to a plurality of frequencies by applying a diplexer to a microwave type radar detector having a transmitter and a receiver using the same frequency.

As noted above, existing radar detectors (eg, FMCW radar detectors) perform frequency channel separation based on precise voltage control for each bandwidth. However, due to the limitation of the voltage control accuracy and the performance limitations of the RF (radio frequency) transceiver, signals other than the frequency channel signal are transmitted or received, thereby causing an error in the luer detector.

1 (a) and 1 (b) show a case where a radar detector (radar 1) operating in a frequency channel (channel 1) and a radar detector (radar 2) operating in a frequency channel (channel 2) Are illustrated. In such a case, due to the limitations described above (e.g., limit of voltage control accuracy, performance limit of the RF transceiver, etc.), radar detector (radar) operating on the frequency channel 1) can cause an interference signal to a radar detector (radar 2) operating on a different frequency channel (channel 2) due to the non-linearity of the active device.

In particular, it is very difficult to remove such interference signals in a very high frequency band (e.g., 24 GHz band, etc.).

However, according to the embodiment of the present invention, a high performance small diplexer implemented in the form of a microstrip line is coupled to the array antenna, so that the array antenna according to the embodiment of the present invention can detect Frequency channels can be separated.

Unlike a typical stacked diplexer, a diplexer according to an embodiment of the present invention includes two closed loop resonators formed (or arranged) on a single substrate, so that the microstrip- Can be combined. Also, the array antenna according to the embodiment of the present invention can easily control the operation bandwidth of each channel through perturbation. Hereinafter, the array antenna according to the embodiment of the present invention will be described in detail.

3A is a plan view of an array antenna having a channel interference suppression function according to an embodiment of the present invention.

Specifically, the array antenna 1000 includes an array antenna feeder 100, power dividers 101, 102 and 107, a serial feeder 103, a radiating element 104, a metamaterial isolator 105, A ground plane 106, and a diplexer 108.

The array antenna feeder 100 feeds power for the array antenna 1000. Specifically, the array antenna feeder 100 may be in the form of a microstrip. Meanwhile, the array antenna feeder 100 can be changed into various feeding forms such as a coaxial line and a coplanar waveguide (CPW) through a transition structure.

The power distributor 101 is a power distributor in the form of a serial feed type. Specifically, the power splitter 101 may be an unequal power splitter that unequally distributes power, or it may be an even power splitter that evenly distributes power. The power splitter 101 may be bilaterally symmetrical with respect to the array antenna feeder 100.

The power divider 102 is a power divider for feeding to each radiating element column including a plurality (e.g., nine) of radiating elements 104 connected in series. Specifically, the power divider 102 may be an unequal Wilkinson power splitter that unequally distributes power, or may be an even power splitter that evenly distributes power. 3A, there are four power dividers 102 on the left and right sides of the array antenna feeder 100, respectively, and each power divider 102 is connected to two radiating element arrays.

 The power divider 101 and the power divider 102 are provided with a Chebyshev polynomial with a side lobe level of -30 dB for a uniform sense width in the horizontal direction (X-axis direction) Feed (or apply) the excitation coefficient to each radiating element row. Meanwhile, at the same time, the power divider 101 and the power divider 102 can perform an impedance conversion function for impedance matching between the radiating element array and the array antenna feeding part 100.

The series feed line 103 is a feed line between the radiating elements 104. On the other hand, by adjusting the phase of the series feed line 103 to adjust the phase of the current input to each radiating element 104, the tilting of the radiation beam can be adjusted if necessary.

The radiating element 104 may be a radiating element in the form of a microstrip patch. The radiation conductance (G _R ) of the radiating element 104 can be designed to be adjusted according to various required performances such as gain and sub-lobe level characteristics.

The array antenna 1000 includes a plurality of radiating element rows arranged in the horizontal direction (X-axis direction). Each of the plurality of radiating element rows includes a plurality of radiating elements 104 connected in series in the vertical direction (Y-axis direction). In Fig. 3A, the case where the array antenna 1000 includes sixteen radiating element rows, and each radiating element row includes nine radiating elements 104 is illustrated. 3A, the array antenna 1000 includes eight radiating element rows (hereinafter referred to as 'first radiating element row') located on the left side of the power distributor 107 (or the array antenna feeding portion 100) (Hereinafter referred to as " second radiating element row ") located on the right side with respect to the first radiating element 107 (or the array antenna feeding portion 100). 3A, the remaining eight radiating elements 104 are placed symmetrically (e.g., in position, size, etc.) relative to the fifth radiating element 104 of the nine radiating elements 104 belonging to one radiating element row Is exemplified. 3A illustrates a case where the arrangement structure of the radiating elements 104 (e.g., the size of the radiating elements 104, the spacing between the radiating elements 104, and the like) is determined by the Chebyshev arrangement function. The array structure of the radiating element 104 may be designed using various types of array functions such as uniform, binomial, or Taylor, as well as the Chebyshev array function .

The metamaterial isolator 105 has a metamaterial and is positioned between each serial feed radiating element row to improve the degree of isolation (or separation) between the radiating element rows. Thereby, the meta-material isolator 105 forms a super-directivity radiation beam characteristic.

The power divider 107 is a power divider for feeding the first radiating element row and the second radiating element row. Specifically, the power divider 107 may be a power divider for feeding the first radiating element row having the bilateral symmetrical structure and the second radiating element row. Specifically, the power divider 107 may be a -3 dB uniform Wilkinson power divider that evenly distributes power to the first and second radiating element rows, or may be an unequal power divider that unequally distributes power. Meanwhile, at the same time, the power divider 107 can perform the impedance conversion function.

The diplexer 108 separates and passes a plurality of (e.g., two) frequency band signals. The diplexer 108 passes a signal of a desired frequency band among the plurality of signals through filtering on the received plurality of signals. For example, the diplexer 108 may transmit a signal of a desired frequency band among the signals input from the port Port1 to the port Port2, or receive signals received from the port Port2 And transmits the received signal of the desired frequency band among the signals received through the column to the port Port1.

Specifically, the diplexer 108 includes a plurality of (e.g., two) resonators 108a and 108b, a plurality of (e.g., two) distractors 108c and 108d, a bias line 108e, A plurality of (e.g., two) diodes 108f and 108g, a defected ground structure (DGS) 108h, an interdigital line 108i, and an RF inductor 108j .

The resonator 108a functions to pass signals of a lower frequency band out of a plurality of (for example, two) operating frequency bands. On the other hand, as illustrated in Fig. 3A, the resonator 108a may be formed similarly to the circular shape.

The resonator 108b functions to pass signals of a high frequency band out of a plurality of (for example, two) operating frequency bands. Specifically, as illustrated in Fig. 3A, the resonator 108b may be located inside the resonator 108a. The resonator 108a and the resonator 108b may be closed loop resonators and may be formed on a single substrate, as illustrated in Fig. 3a. On the other hand, as illustrated in FIG. 3A, the resonator 108b may include four sections (or areas) that are symmetrical to each other. The diode 108g may be positioned in one of the four sections and the disturbance 108d may be positioned in a section diagonally symmetric with respect to the section where the diode 108g is located. And the RF inductor 108j may be connected to the remaining two of the four sections.

The disturbing member 108c may be located in a section that is symmetrical with a section between the input / output ports Port1 and Port2 of the resonator 108a (e.g., a section where the diodes 108f and 108g are located). Specifically, the disturber 108c can adjust a frequency bandwidth of a low operating frequency band by adjusting capacitance according to its microstrip area.

The confuser 108d may be located in a section that is symmetrical in the interval between the input / output ports Port1 and Port2 of the resonator 108b. Specifically, the confuser 108d may be located in the same direction as the confuser 108c and may be located inside the confuser 108c. The confuser 108d can adjust the frequency bandwidth of the high operating frequency band by adjusting the capacitance according to its microstrip area.

The bias line 108e is a bias line for turning on / off the diodes 108f and 108g. Specifically, the bias line 108e can provide a bias for turning on / off the diodes 108f and 108g.

Diode 108f is positioned (coupled to resonator 108a) in resonator 108a. Specifically, the diode 108f performs a function of turning on / off a low operating frequency band among a plurality of (for example, two) operating frequency bands based on electrical signal control by the bias line 108e. For example, the diode 108f can turn on / off the resonator 108a based on electrical signal conditioning by the bias line 108e to select / deselect the lower operating frequency band.

Diode 108g is positioned (coupled to resonator 108b) in resonator 108b. Specifically, the diode 108g performs a function of turning on / off a high operating frequency band among a plurality of (for example, two) operating frequency bands based on electrical signal control by the bias line 108e. For example, the diode 108g can select / deselect a high operating frequency band by turning on / off the resonator 108b based on electrical signal regulation by the bias line 108e. Only one resonator corresponding to the desired frequency band among the resonators 108a and 108b is turned on and the remaining resonators are turned off through the on / off operation of the diode 108f and the diode 108g. For example, when the array antenna 1000 desires to transmit / receive a signal in a low frequency band, the resonator 108a may be turned on and the resonator 108b may be turned off. On the other hand, the diode 108f and the diode 108g may be PIN diodes.

The DGS 108h is a region without a copper foil among regions of the ground plane 106 located at the lower end of the inter digital line 108i for the input / output ports Port1 and Port2. Specifically, the DGS 108h is a structure for reducing transmission loss.

The inter digital line 108i is located between the input / output ports Port1 and Port2 and the resonators 108a and 108b. More specifically, the inter-digital line 108i can perform a capacitance function for strong coupling between the input / output ports Port1 and Port2 and the resonators 108a and 108b.

The RF inductor 108j is located between the resonators 108a and 108b and the bias line 108e. Specifically, the RF inductor 108j may be an RF block inductor that provides a predetermined inductance.

The power feeding process of the array antenna 1000 is as follows. The array antenna power supply unit 100 supplies power for the array antenna 1000. [ The power distributor 107 divides the power received from the array antenna power feeder 100 through the diplexer 108 into a power divider 101 located on the left side of the power divider 107 and a power divider 101 located on the right side of the power divider 107 To the power splitter 101 located in the power splitter 101. The left power divider 101 located on the left side of the power divider 107 distributes the power received from the power divider 107 to a plurality of nodes Nd1a, Nd1b, Nd1c, and Nd1d connected in series. The power distributor 102 connected to each of the nodes Nd1a to Nd1d divides the power delivered to each of the nodes Nd1a to Nd1d into at least one first radiating element row connected to the power distributor 102 One radiating element row is connected to one power distributor 102). Likewise, the right power distributor 101 located on the right side of the power distributor 107 distributes the power received from the power distributor 107 to a plurality of nodes Nd2a, Nd2b, Nd2c and Nd2d connected in series. The power distributor 102 connected to each of the nodes Nd2a to Nd2d divides the power delivered to each of the nodes Nd2a to Nd2d into at least one second radiating element row connected to the power distributor 102 2 radiating element rows are connected to one power distributor 102).

FIG. 3B is a three-dimensional view of an array antenna according to an embodiment of the present invention.

The array antenna 1000 further includes a dielectric substrate 200.

The ground plane 106 is formed at the lower end of the dielectric substrate 200 in the Z-axis direction.

The configurations (100 to 105, 107, and 108) of the array antenna 1000 illustrated in FIG. 3A can be formed (or printed) on the top of the dielectric substrate 200 in the Z axis direction. That is, the radiating element 104 and the diplexer 108 may be formed on a single dielectric substrate 200.

Therefore, the array antenna 1000 according to the embodiment of the present invention is a substrate printing type printed on the dielectric substrate 200, and can be manufactured in a 2D form (flat form), so that the design and the process are very easy, It is advantageous.

The array antenna 1000 may be a 24 GHz array antenna for a fence type radar detector.

On the other hand, the power distributors 101 and 102 and the radiating element 104 may be designed (or calculated) using a Chebyshev array function with an SLL for the horizontal direction of -30 dB and an SLL for the vertical direction of -20 dB .

The array antenna 1000 is designed in accordance with a Chebyshev array function with an SLL of -20 dB and -30 dB for the vertical direction (Y-axis direction) and the horizontal direction (X-axis direction), respectively, for narrow and uniform detection width implementation . The array function or array factor (AF) for the vertical direction (Y-axis direction) can be defined as Equation (1) below.

In Equation 1, M represents the number of total radiating elements 104 included in one radiating element row, and in the embodiment of Fig. 3A, M = 9.

M radiating elements 104 included in one radiating element row may be symmetrical to each other with reference to a specific radiating element 104, where i ₀ is a specific radiating element 104 (Hereinafter referred to as " reference radiating element 104 "). For example, in the embodiment of FIG. 3A, the reference radiating element 104 is the fifth radiating element 104 of the nine radiating elements 104 included in one radiating element row.

In Equation (1), i _m is an (m-1) / 2 radiating element 104 located at one side of the reference radiating element 104 among the M radiating elements 104 included in one radiating element row, Represents the current of the radiating element. For example, in the embodiment of FIG. 3A, i _m is the number of radiating elements 104 of the four radiating elements 104 located at one side of the fifth radiating element 104 of the nine radiating elements 104 included in one radiating element row Lt; th > radiating element. Here, i ₁ denotes the current of the reference radiation element 104 of four radiating element 104 from the reference radiation element 104 and the nearest radiating element 104 which is located to one side of, i ₄ is based on the radiating element ( 104) and the farthest away from the radiating element (104).

,

, d는 방사 소자(104) 간의 간격을 나타내며,

이고, ω= 각속도를 나타낸다.In Equation (1)

,

, d is the spacing between radiating elements 104,

And? = Angular velocity.

On the other hand, the array function AF with respect to the horizontal direction (X-axis direction) can be defined by the following equation (2), similar to the array function AF with respect to the vertical direction (Y-axis direction).

In Equation (2), P represents the total number of radiating element rows included in the array antenna 1000. Specifically, the number of the first radiating element rows in the P radiating element rows is P / 2, and the number of the second radiating element rows is P / 2. For example, in the embodiment of FIG. 3A, P = 16.

In Equation (2), i _xm represents the current of the xth radiating element 104 among the radiating elements 104 included in the mth radiating element row among the P / 2 first radiating element rows (or the second radiating element row) . For example, in the embodiment of FIG. 3A, i _xm represents the current of the xth radiating element 104 among the nine radiating elements 104 included in the mth radiating element row among the eight first radiating element rows.

In the case where SLL = -20 dB is applied, the Chebyshev polynomial power supply coefficient in the vertical direction (Y-axis direction) can be obtained by using Equation (1). In the case where SLL = -30 dB is applied, the Chebyshev polynomial power supply coefficient in the horizontal direction (X-axis direction) can be obtained by using Equation (2).

On the other hand, the diplexer 108 applies diodes 108f and 108g, which are controlled by an electrical signal, to the two closed loop resonators 108a and 108b, as illustrated in FIG. 3A, Bandwidth) can be easily turned on / off (or selected / deselected). Further, since the diplexer 108 is designed on a single substrate, unlike the stacked type, it can be easily compounded to the array antenna 1000. [ Details of such a diplexer 108 will be described with reference to Figs. 4A and 4B.

4A is a diagram illustrating an electrical equivalent circuit corresponding to a diplexer 108 according to an embodiment of the present invention and FIG. 4B is a diagram illustrating an equivalent circuit of the internal resonator 108a of the diplexer 108 , 108b) corresponding to the ABCD matrix shown in FIG.

4A, an equivalent circuit corresponding to the diplexer 108 includes bi-interdigital sections (Sec1 and Sec3), bi-interdigital sections (Sec1 and Sec3) connected to the input / output ports Port1 and Port2 An inner section Sec2 positioned between the sub-circuits C _sub1 and C _sub2 , and sub-circuits C _sub1 and C _sub2 . In Figure _{4a r 1 -r 1 ', r} 2 -r 2' is a reference line.

The bi-interdigital section Sec1 connected to the port Port1 corresponds to the inter-digital line 108i located between the port Port1 and the resonators 108a and 108b. The bi-interdigital section Sec3 connected to the port Port2 corresponds to the inter-digital line 108i located between the port Port2 and the resonators 108a and 108b. The sub circuit C _sub1 corresponds to the resonator 108b and the sub circuit C _sub2 corresponds to the resonator 108a.

The bi-interdigital section Sec1 may include a plurality of capacitors C _p , C _g1 , C _dgs , and C _g2 and a plurality of inductors L _g1 and L _g2 . Specifically, the bi-inter digital section Sec1 may correspond to the DGS 108h and the inter digital line 108i.

For the sake of convenience, the capacitance of a capacitor can be represented by the same reference numerals as those of the corresponding capacitor. For example, a capacitance having a capacitor (C _p) can be represented by C _p. Similarly, the inductance of an inductor can be represented by the same reference numerals as those of the corresponding inductor. For example, inductance of the inductor (L _g1) has may be represented as L _g1.

The bi-interdigital section Sec3 may include a plurality of capacitors C _p , C _g2 , C _dgs , and C _g1 and a plurality of inductors L _g2 and L _g1 . Specifically, the bi-interdigital section Sec3 may correspond to the DGS 108h and the inter digital line 108i.

subcircuits (C _sub1) in the inner section (Sec2) may comprise a plurality of microstrip transmission lines (EI1e, EI1f, EI1g) and a capacitor (C _i). The microstrip transmission lines EI1e and EI1g have a length of ₃ beta ₂ and have a Z ₀ characteristic impedance. Here,? Is the propagation phase constant of the transmission line.

The sub circuit C _sub2 may include a plurality of microstrip transmission lines EI1a, EI1b, EI1c, EI1d, EI1h and EI1i and a plurality of capacitors C _inh and C _o . The capacitor C _inh has an inherent capacitance. A microstrip transmission line (EI1a, EI1d, EI1h, EI1i ) has a length of as much as βl _1, has a characteristic impedance Z _0. A microstrip transmission line (EI1b, EI1c) has a length of as much as 2βl _1, has a characteristic impedance Z _0. Where l ₁ may be 1/8 of the total length of the resonator 108a and l ₂ may be 1/8 of the total length of the resonator 108b. For example, the total length of the resonator (108a) may be a 8βl _1, and the total length of the resonator (108b) may be a 8βl _2,

FIG. 4B illustrates an ABCD matrix corresponding to the section (Sec1, Sec2, Sec3) of FIG. 4A.

Specifically, the inter section Sec1m illustrated in FIG. 4B corresponds to a portion of the bi-interdigital section Sec1 of FIG. 4A and the inter section Sec3m illustrated in FIG. 4B corresponds to the bi-interdigital section Sec3 ). ≪ / RTI > The inner section Sec2m illustrated in FIG. 4B corresponds to the inner section Sec2 (or sub-circuit C _sub1 ) of FIG. 4A. In Figure 4b, the turns ratio between the primary and secondary windings is N: 1.

)는 아래의 수학식 3과 같이 유도될 수 있다.On the other hand, on the basis of the ABCD matrix for each section (Sec1m, Sec2m, Sec3m) illustrated in Fig. 4A and the sections shown in Fig. 4B, the transfer admittance (admittance) (or transfer function,

) Can be derived as shown in Equation (3) below.

은 아래 수학식 4와 같이 정의되는

를 이용하여 표현될 수 있다.And

Is defined as < RTI ID = 0.0 >

. ≪ / RTI >

는 유전체 기판(200)의 유효 유전율을 나타낸다.In Equation 4, f is the frequency, c is the speed of light,

Represents the effective permittivity of the dielectric substrate 200. [

)는, 교란자(108c, 108d)의 면적에 대응하는 캐패시턴스(예, C_o, C_i)의 영향을 받을 수 있다.As illustrated in equations (3) and (4), the transfer admittance for the diplexer 108

May be affected by the capacitance (e.g., C _o , C _i ) corresponding to the area of the perturbers 108c, 108d.

5 is a diagram showing a frequency response characteristic of a diplexer according to an embodiment of the present invention.

)를 가지는 다이플렉서(108)의 주파수 응답 특성이 예시되어 있다. 도 5에서 S-파라미터 S₂₁_measurement는 실제 측정된 파라미터 S₂₁ 값을 나타내고, S-파라미터 S₂₁_FEM은 FEM(finite element method) 방식을 통해 시뮬레이션된 값을 나타낸다.Specifically, in Fig. 5, the transfer admittance (

The frequency response characteristic of the diplexer 108 having the frequency response characteristic shown in Fig. Fig S- parameters from 5 _measurement S ₂₁ represents the actual measured parameter value of S _21, S ₂₁ _FEM S- parameter represents the simulated value over a (finite element method) FEM method.

=0 인 주파수에서 생성된다.As shown in FIG. 5, a high skirt characteristic (frequency selectivity characteristic) is provided at the end of the upper and lower bandwidths between the two frequency bands as well as two operating frequency bandwidths (bandwidth 1 and bandwidth 2) There are also transfer zeroes for. At this time,

= 0 < / RTI >

6 is a diagram illustrating a frequency response characteristic according to an even mode and an odd mode of a resonator according to an embodiment of the present invention.

The two operating frequency bandwidths (bandwidth 1, bandwidth 2) can be easily adjusted through microstrip area adjustment of the disturber 108c and the disturber 108d illustrated in FIG. 3A. The adjustment of the microstrip area of the disturbances 108c and 108d corresponds to the capacitance adjustment of the capacitors C _o and C _i included in the equivalent circuit of Fig. 4a.

Thus, when the capacitance is changed by the control of the disturbances 108c and 108d, the frequency bandwidth is adjusted by the even mode and the odd mode frequency change of the resonators 108a and 108b.

Fig. 6 shows the results of a circuit simulation based on Figs. 4A and 4B and a comparison between derived even mode and odd mode analysis formulas. Specifically, the Even-mode_Cal. (GR1e) illustrated in FIG. 6 represents the even mode frequency analysis, Odd-mode_Cal. (GR1o) represents the odd mode frequency analysis, And Odd-mode_Circuit (GR2o) represents a circuit simulation of the odd mode.

On the other hand, the Even mode and Odd mode frequency analysis can be derived using Figs. 7A and 7B.

FIG. 7A is a diagram illustrating a circuit according to an even mode analysis according to an embodiment of the present invention, and FIG. 7B is a diagram illustrating a circuit according to an odd mode analysis according to an embodiment of the present invention.

Specifically, the circuit illustrated in Fig. 7A and the circuit illustrated in Fig. 7B correspond to the Even and Odd mode circuits of the equivalent circuit illustrated in Fig. 4A. In Figs. 7A and 7B, P-P 'is a reference line representing half of the circuit illustrated in Fig. 4A.

The circuit illustrated in Figs. 7A and 7B includes microstrip transmission lines EI2a, EI2b, EI2c, EI2d, EI2e, and EI2f.

A microstrip transmission line (EI2a) has a length of as much as ₀₁ βl, has a characteristic impedance Z _0. Here, l ₀₁ is a length of a feed line located before a microstrip transmission line region whose width gradually becomes narrower than a port (Port1, Port2) area connected to a bi-interdigital section Sec1, Sec3, Lt; / RTI >

A microstrip transmission line (EI2b) has a length of as much as ₀₂ βl, and has a Z _0/3 characteristic impedance. Here, l ₀₂ may be a line length of a microstrip transmission line region where the width of the port (Port1, Port2) connected to the bi-interdigital section Sec1, Sec3 is gradually narrowed, as illustrated in Fig.

The microstrip transmission line EI2c has a length of 3 beta ₁ and has a Z ₀ characteristic impedance. The microstrip transmission line EI2c corresponds to the microstrip transmission line EI1a and the microstrip transmission line EI1b in Fig. 4A.

The microstrip transmission line EI2d corresponds to the microstrip transmission line EI1g in Fig. 4A.

A microstrip transmission line (EI2e) has a length of as much as βl _2, has a characteristic impedance Z _0. The microstrip transmission line EI2e corresponds to a part of the microstrip transmission line EI1f in Fig. 4A.

The microstrip transmission line EI2f corresponds to the microstrip transmission line EI1h in Fig. 4A.

)는 도 7a에 기초하여, 아래의 수학식 5와 같이 유도될 수 있다.On the other hand, the input admittance for the even mode frequency analysis (or the input admittance for the even mode of the resonators 108a and 108b,

Can be derived as shown in the following equation (5) based on Fig. 7A.

)는, 교란자(108c, 108d)의 면적에 대응하는 캐패시턴스(예, b_o, b_i)의 영향을 받을 수 있다.As illustrated in equation (5), the input admittance (

May be affected by the capacitance (e.g., b _o , b _i ) corresponding to the area of the confiscators 108c and 108d.

)는 even 모드 주파수 해석과 유사하게, 도 7b에 기초하여 아래의 수학식 6과 같이 유도될 수 있다.On the other hand, the input admittance for the odd mode frequency analysis (or the input admittance for the odd mode of the resonators 108a, 108b,

Can be derived as shown in Equation (6) below based on Fig. 7B, similar to even mode frequency analysis.

8 is a view of a radar detector according to an embodiment of the present invention.

The radar detector 2000 detects presence or absence of an object, distance to an object, and the like. Specifically, the radar detector 2000 includes a processor 210, a memory 220, a transceiver 230, and an array antenna 1000.

The array antenna 1000 of the radar detector 2000 has the same or similar structure and function as the array antenna 1000 described above.

Processor 210 may be configured to implement functions, procedures, and methods associated with detection. In particular, the processor 210 may control the array antenna 1000 such that the array antenna 1000 performs the functions, operations, and methods described herein. In addition, the processor 210 may control each configuration of the radar detector 2000.

The memory 220 is coupled to the processor 210 and stores various information related to the operation of the processor 210. [

The transceiver 230 is connected to the processor 210 and transmits or receives signals through the array antenna 1000.

In the meantime, although the embodiment of the present invention has been described by taking as an example the case where the operation frequency band is two, it is only an example. The embodiment of the present invention can also be applied to the case where three or more operating frequency bands are used.

Meanwhile, according to the embodiment of the present invention, a diplexer 108 of a miniaturized high-performance microstrip type can be combined (combined) to the array antenna 1000 on a single substrate for frequency channel expansion .

Further, the array antenna 1000 can have two frequency channel characteristics completely separated by the diplexer 108, and can select the frequency channel by adjusting the electrical signal. Specifically, by coupling the high performance small diplexer 108 to the array antenna 1000, more than two frequency channels can be easily separated by electrical signal control.

In addition, the array antenna 1000 can secure four or more frequency channels by applying the diplexer 108. [ Specifically, it is also possible to extend the transmission / reception frequency channel to four or more by extending the diplexer 108 to a plurality of. Such a frequency channel expansion characteristic or a frequency channel separation characteristic provides scalability in which a plurality of radar detectors 2000 can be installed in the same place, thereby enabling various security planning. Specifically, due to these advantages, a plurality of radar detectors 2000 can be installed in the same place and the same fixed support, so that not only cost reduction but also various security designs can be supported.

Also, according to an embodiment of the present invention, a false alarm due to mutual frequency channel interference can be completely eliminated through the frequency channel separation characteristic.

Also, the radar detector 2000 can be installed in various forms, and the flexibility of the installation work can be dramatically improved.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments, It belongs to the scope of right.

Claims (20)

A plurality of radiating element arrays each including a plurality of radiating elements arranged in a first direction on a first substrate and arranged in a second direction; And
And a diplexer formed on the first substrate and transmitting a signal of a desired frequency band among the plurality of signals to the plurality of radiating element arrays through filtering on the plurality of signals,
Wherein the diplexer comprises:
A first resonator in the form of a closed loop for passing a signal of the first frequency band among the plurality of signals to the plurality of radiating element arrays when the desired frequency band is the first frequency band; And
Wherein the first frequency band is a first frequency band and the second frequency band is a second frequency band different from the first frequency band, And a second resonator in the form of a closed loop for passing
Array antenna.
delete The method according to claim 1,
The first resonator and the second resonator are formed on the first substrate
Array antenna. The method according to claim 1,
Wherein the diplexer comprises:
A first resonator connected to the first resonator, the first resonator adjusting a capacitance corresponding to an area of the first resonator to adjust a bandwidth of the first frequency band; And
And a second disturber coupled to the second resonator for adjusting a capacitance corresponding to an area of the second resonator to adjust a bandwidth of the second frequency band
Array antenna. 5. The method of claim 4,
The propagation admittance for the diplexer is given by:
Based on at least one of a capacitance corresponding to an area of the first disturbance and a capacitance corresponding to an area of the second disturbance
Array antenna. 5. The method of claim 4,
Wherein the input admittance for the even mode of the first resonator and the second resonator,
Based on at least one of a capacitance corresponding to an area of the first disturbance and a capacitance corresponding to an area of the second disturbance
Array antenna. 5. The method of claim 4,
Wherein the input admittance for the odd mode of the first resonator and the second resonator,
And a capacitance between the first resonator and the second resonator
Array antenna. 5. The method of claim 4,
Wherein the diplexer comprises:
A first diode located in the first resonator, the first diode turning on the first resonator when the desired frequency band is the first frequency band; And
And a second diode located in the second resonator and turning on the second resonator when the desired frequency band is the second frequency band
Array antenna. 9. The method of claim 8,
Wherein the diplexer comprises:
Providing a first bias to turn on the first diode when the desired frequency band is the first frequency band and providing a first bias to turn on the second diode when the desired frequency band is the second frequency band Further comprising a bias line for providing a second bias for < RTI ID = 0.0 >
Array antenna. 9. The method of claim 8,
The second disturbance may include:
And a second diode connected to a region of the plurality of regions included in the second resonator that is diagonally symmetric with respect to the region where the second diode is located
Array antenna. The method according to claim 1,
Wherein the diplexer comprises:
A first interdigital line receiving the plurality of signals; And
And a second inter-digital line for transmitting the signal of the desired frequency band to the plurality of radiating element arrays
Array antenna. 12. The method of claim 11,
Wherein the diplexer comprises:
A first DGS (defected ground structure) located at the lower end of the first inter- digital line and not including a copper foil; And
And a second DGS located at the lower end of the second inter- digital line and not including a copper foil
Array antenna. 10. The method of claim 9,
Wherein the diplexer comprises:
Further comprising an RF (radio frequency) inductor located between the second resonator and the bias line and providing a predetermined inductance,
Array antenna. The method according to claim 1,
Wherein the diplexer comprises:
And transmitting the reception signal of the desired frequency band among a plurality of reception signals received through the plurality of radiating element arrays
Array antenna. 12. The method of claim 11,
An equivalent circuit corresponding to the diplexer,
A first sub-equivalent circuit corresponding to the first inter-digital line;
A second sub-equivalent circuit corresponding to the second resonator; And
And a third sub-equivalent circuit located outside the second sub-equivalent circuit and corresponding to the first resonator,
The third sub-
A first microstrip transmission line once connected to the first node; And
And a first capacitor having one end connected to the first node and the other end grounded
Array antenna. 16. The method of claim 15,
The propagation admittance for the diplexer,
Is determined based on the first value obtained by the following equation (1)
Array antenna.
[Equation 1]

(

: The first value, Z _0: characteristic of the first micro-strip transmission line impedance, β: propagation phase constant, l _1: a value based on the length of the first _{resonator, b 0 = ωC o, C} o: wherein 1 capacitance of capacitor, ω: angular velocity) 16. The method of claim 15,
Wherein the second sub-
A second microstrip transmission line once connected to the second node; And
And a second capacitor having one end connected to the second node and the other end grounded
Array antenna. 18. The method of claim 17,
The propagation admittance for the diplexer,
Is determined based on the first value obtained by the following equation (1)
Array antenna.
[Equation 1]

(ir _11: the first value, Z _0: the second characteristic of the microstrip transmission line impedance, β: propagation phase constant, l _2: values based on the length of the second _{resonator, b i = ωC i, C} i : Capacitance of the second capacitor, omega: angular velocity) 18. The method of claim 17,
Wherein the first sub-
A third capacitor having one end connected to a third node included in the second sub-equivalent circuit and the other end grounded;
A fourth capacitor whose one end is connected to the third node; And
And a first inductor whose one end is connected to the fourth capacitor and the other end is connected to a fourth node included in the third sub-equivalent circuit
Array antenna. 20. The method of claim 19,
The propagation admittance for the diplexer,
Is determined based on the first value and the second value obtained by the following equation (1)
Array antenna.
[Equation 1]

(X: the first value, b _p: the second value, C _p: the capacitance of the third capacitor, ω: angular velocity, C _g2: the capacitance of the fourth capacitor, L _g2: the inductance of the first inductor)

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