KR101666569B1 - Low power CAN transceiver - Google Patents

Low power CAN transceiver Download PDF

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KR101666569B1
KR101666569B1 KR1020150141134A KR20150141134A KR101666569B1 KR 101666569 B1 KR101666569 B1 KR 101666569B1 KR 1020150141134 A KR1020150141134 A KR 1020150141134A KR 20150141134 A KR20150141134 A KR 20150141134A KR 101666569 B1 KR101666569 B1 KR 101666569B1
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type
terminal
transistor
bus
reverse current
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KR1020150141134A
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Korean (ko)
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이명희
조원희
강석환
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울산과학기술원
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H04L12/40006—Architecture of a communication node
    • H04L12/40045—Details regarding the feeding of energy to the node from the bus
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H04L2012/40208—Bus networks characterized by the use of a particular bus standard
    • H04L2012/40215—Controller Area Network CAN

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Dc Digital Transmission (AREA)

Abstract

The present invention relates to a CAN transceiver, and in a CAN transceiver including a driver and a transceiver, the transceiver includes a first reverse current prevention element and a second reverse current prevention element, And the heat dissipation environment is excellently consumed from the outside to consume the internal power consumption so that the heat can be effectively generated by the efficient heat design.

Description

Low power CAN transceiver < RTI ID = 0.0 >

The present invention relates to a CAN transceiver, and more particularly, to a low-power CAN transceiver that enables efficient heat generation through effective thermal design by consuming internal power consumption instead of the external environment, which is more excellent in a heat dissipation environment.

CAN (Controller Area Network) is a serial communication protocol that efficiently supports distributed real-time control with high level security. The application of CAN ranges from high-speed digital communication networks to low-cost multiplexed wiring.

CAN is a high-integrity serial data communication bus for real-time applications. CAN operates at data rates up to 1 Megabits per second, has excellent error detection and confinement capability, and was originally developed for use in vehicles.

The motivation behind CAN is to improve the interoperability of information processing of vehicle electronic devices, engine control devices, sensors, antiskid brake system (ABS), etc., while reducing wiring harness weight and complexity, Reliable, safe, and fuel-efficient.

Since the launch of CAN, the CAN protocol has gained wide popularity in industrial automation and automotive / truck applications.

The ability to detect and recover from CAN bus stiffness and fault conditions in a noisy environment makes CAN suitable for use in industrial control equipment, medical equipment, test equipment, mobile and portable machines, and consumer electronics.

CAN is an asynchronous serial bus system with one logical bus, for example, containing two wires. CAN has an open linear bus structure with the same bus nodes. The CAN bus consists of two or more nodes. The number of nodes on the bus can be changed dynamically without interfering with the communication of other nodes.

The CAN logic bus corresponds to a " wired-OR mechanism ", and "recessive" bits (all but not necessarily correspond to logic level &Quot; bits " (usually logic "0"). As long as the bus node does not transmit a dominant bit, the bus line is in a hot state, but the dominant bit from any bus node generates a dominant bus line state.

Thus, in the case of a CAN bus line, a medium is selected that can transmit the two possible bus states (dominant and non-dominant). The common physical medium used is a twisted wire pair.

So the bus wires are called "CANH" and "CANL" and can be connected to the CAN controller nodes either directly to the CAN applications, or via their controller, as described above with the CAN controller.

In the CAN bus protocol, the address information is contained in the transmitted messages, not the bus nodes.

This is done through an identifier (part of each message) that identifies message content, e.g., engine speed, oil temperature, and the like.

The identifier further indicates the priority of the message. The lower the binary value of the identifier is, the higher the priority of the message becomes (the dominant bit increases).

On the other hand, it is very important to maintain high reliability because CAN applications must ensure operation in harsh operating environments.

Factors that impair reliability include circuit noise, over-voltage, over-current, reverse voltage, and over-temperature.

Reducing the power consumption within the CAN transceiver can reduce the heat generated by the circuit. Thus ensuring stable circuit operation in higher temperature environments.

Domestic registered patent 10-0897895 Japanese Patent Publication No. 2012-172568

The present invention is to provide a low-power CAN transceiver that enables efficient heat generation through efficient thermal design by consuming the internal power consumption instead of the external excellent heat dissipation environment.

One aspect of the present invention is a CAN transceiver including a driver and a transceiver, wherein the transceiver forms the can bus in a dominant state in a state where the first reverse current prevention element and the second reverse current prevention element included therein are off.

According to an aspect of the present invention, the transceiver includes a first type first transistor having a first terminal connected to a reference voltage terminal and a second terminal connected to the driver; A first type second transistor having a first terminal connected to a third terminal of the first type first transistor, a second terminal connected to the driver, and a third terminal connected to the first bus terminal; A second type first transistor having a third terminal connected to the ground terminal and a second terminal connected to the driver; And a second type second transistor having a first terminal connected to a second bus terminal, a first terminal connected to the first terminal of the second type transistor and a second terminal connected to the driver The first terminal of the first reverse current blocking element is connected to the first terminal of the first type second transistor and the second terminal is connected to the third terminal of the first type second transistor, The second terminal of the second reverse current blocking element is connected to the first terminal of the second type second transistor and the second terminal is connected to the third terminal of the second type second transistor.

The first type first transistor and the first type second transistor are PMOS transistors and the second type first transistor and the second type second transistor are NMOS transistors in one aspect of the present invention.

In addition, the driver of one aspect of the present invention is characterized in that, when a dominant drive signal is inputted, the first type first transistor, the first type second transistor, the second type first transistor and the second type second transistor are turned on And the first reverse current prevention element and the second reverse current prevention element maintain the off state.

In addition, the driver of one aspect of the present invention turns off the first type first transistor, the first type second transistor, the second type first transistor, and the second type second transistor when the drive signal of the hysteresis is inputted And the first and second reverse current blocking elements are kept in the off state to shut off the reverse current inputted from the can bus.

Further, the first and second reverse current prevention elements in one aspect of the present invention are diodes.

In addition, the first type first transistor and the first reverse current prevention element in one aspect of the present invention are formed integrally with a first type double diffusion type transistor, and the second type second transistor and the second type reverse current prevention element Is formed integrally with the second type double diffusion type transistor.

According to another aspect of the present invention, there is provided a driver for separating a drive signal and a receive signal. And a transceiver for allowing a drive signal and a receive signal to be exchanged between the can bus and the driver, wherein the transceiver includes a first reverse current prevention element and a second reverse current prevention element, The can bus is formed in the dominant state.

In another aspect of the present invention, the transceiver includes a first type first transistor having a first terminal connected to a reference voltage terminal and a second terminal connected to the driver; A first type second transistor having a first terminal connected to a third terminal of the first type first transistor, a second terminal connected to the driver, and a third terminal connected to the first bus terminal; A second type first transistor having a third terminal connected to the ground terminal and a second terminal connected to the driver; And a second type second transistor having a first terminal connected to a second bus terminal, a first terminal connected to the first terminal of the second type transistor and a second terminal connected to the driver The first terminal of the first reverse current blocking element is connected to the first terminal of the first type second transistor and the second terminal is connected to the third terminal of the first type second transistor, The second terminal of the second reverse current blocking element is connected to the first terminal of the second type second transistor and the second terminal is connected to the third terminal of the second type second transistor.

In addition, the first type first transistor and the first reverse current prevention element of the other aspect of the present invention are integrally formed of a first type double diffusion type transistor, and the second type second transistor and the second type reverse current prevention element Is formed integrally with the second type double diffusion type transistor.

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 According to the present invention, the heat dissipation problem of the CAN transceiver IC can be solved through efficient thermal design by consuming the power consumption inside the CAN transceiver outside the CAN transceiver, which is better in a heat dissipation environment.

That is, the present invention can effectively dissipate heat by dissipating heat through the coarse and long CAN bus wire on the outside.

Reducing the heat generated within the CAN transceiver ensures a stable circuit operation in higher temperature environments.

Further, the present invention is further cost competitive in the design using the DMOS process, because a transistor and a diode can be implemented simultaneously using a DMOS parasitic diode provided in the DMOS process.

1 is a block diagram of a low power CAN transceiver according to an embodiment of the present invention.
2 is a schematic block diagram of a CAN transceiver according to the prior art.
3 is a block diagram of a low power CAN transceiver according to another embodiment of the present invention.
4 is a flowchart of a method of controlling a low power CAN transceiver according to an embodiment of the present invention.

BRIEF DESCRIPTION OF THE DRAWINGS The present invention is capable of various modifications and various embodiments, and specific embodiments will be described in detail below with reference to the accompanying drawings.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

The terms first, second, etc. may be used to describe various components, but the components are not limited by the terms, and the terms are used only for the purpose of distinguishing one component from another Is used.

1 is a block diagram of a low power CAN transceiver according to an embodiment of the present invention.

Referring to FIG. 1, a low power CAN transceiver according to an embodiment of the present invention includes a driver 10, a transceiver 20, and a CAN bus 30.

The driver 10 separates the drive signal and the receive signal and the transceiver 20 allows the drive signal and the receive signal to be exchanged between the can bus 30 and the driver 10.

The transceiver 20 has a first bus terminal 21 for supplying a signal CANH to the first wire 31 of the can bus 30 and a second bus terminal 21 for supplying a signal CANL to the second wire 32. [ And a bus terminal 22.

The transceiver 20 includes a first transistor M1 having a first terminal connected to the reference voltage terminal Vcc and a second terminal connected to the driver 10. [

Here, the first type is P type, and the first type first transistor M1 is a PMOS transistor. Here, the first terminal is a source terminal, the second terminal is a gate terminal, and the third terminal is a drain terminal.

In the transceiver 20, a first terminal is connected to a third terminal of the first type transistor M1, a second terminal is connected to the driver 10, and a third terminal is connected to the first bus M1. And a first type second transistor M3 connected to a first terminal of the first type transistor M3, wherein the first type is a P type and the first type second transistor M3 is a PMOS transistor, The second terminal is a gate terminal, and the third terminal is a drain terminal.

The transceiver 20 includes a first reverse current prevention element D1 connected to the first terminal and the third terminal of the first type second transistor M3 to prevent a current flowing from the third terminal to the first terminal, . Here, the first reverse current blocking element D1 is a diode, the first terminal is a cathode terminal, and the second terminal is a cathode terminal.

The transceiver 20 has a first terminal connected to the third terminal of the second transistor M4, a third terminal connected to the ground terminal GND, and a second terminal connected to the driver And a second transistor M2 connected to the second transistor M2. Here, the second type is the N type, and the second type first transistor M2 is the NMOS transistor. In this case, the first terminal is a drain terminal, the second terminal is a gate terminal, and the third terminal is a source terminal.

The transceiver 20 has a first terminal connected to the second bus terminal 22 and a third terminal connected to the first terminal of the second transistor M2. And a second type transistor M4 having a second terminal connected to the second terminal M3. The second type transistor M4 is an N-type transistor and the first type second transistor M3 is an NMOS transistor, The terminal is a drain terminal, the second terminal is a gate terminal, and the third terminal is a source terminal.

The transceiver 20 includes a second reverse current prevention element D2 connected to the first terminal and the third terminal of the second type transistor M4 to prevent a current flowing from the third terminal to the first terminal, . Here, the second reverse current blocking element D2 is a diode, the first terminal is a cathode terminal, and the second terminal is a cathode terminal.

In this configuration, when the driver 10 receives a dominant (for example, 0 signal) drive signal from the outside, it outputs a dominant signal to the transceiver 20. When the dominant signal is input to the transceiver 20 Thereby making can bus 30 dominant.

More specifically, if the driving signal is inputted from the outside, the driver 10 outputs the first type first transistor M1, the first type second transistor M3, and the second type transistor M2 of the transmission / reception unit 20, Type first transistor M2 and the third type second transistor M4 are turned on to form a current path between the reference voltage terminal and the first bus terminal and between the second bus terminal and the ground terminal, To a dominant state. At this time, a current path is formed and a low voltage is applied between the first and second reverse current prevention elements D1 and D2 to turn off.

Alternatively, if the driver 10 receives a drive signal that is externally passive (for example, one signal), it outputs a passive signal to the transceiver 20, and when the passive signal is input to the transceiver 20, (30) to a recessive state.

In more detail, the driver 10 receives the externally-driven drive signal and outputs the first type first transistor M1, the first type second transistor M3, and the second type transistor M3 of the transmitting and receiving unit 20, Type first transistor M2 and the third type second transistor M4 to turn off the current path between the first bus terminal and the second bus terminal at the reference voltage terminal and disconnect the current path from the second bus terminal to the ground terminal, Let it be in a recessive state.

At this time, as the current path is blocked, the first reverse current prevention element D1 and the second reverse current prevention element D2 are also turned off, but at this time, the high voltage (from the wire side) -Voltage) to prevent the circuit from being damaged.

Next, the CAN bus 30 is a 2-wire bus having two wires 31 and 32 connected to a first bus terminal 21 and a second bus terminal 22, .

The two bus wires 31 and 32 of the CAN bus 30 are referred to as CANH 31 and CANL 32 and a pull-down resistor 33 and a pull-up resistor 33 up resistor 34. The pull-

Here, the pull-down resistor 33 is composed of two series-connected resistors connected between the first bus wire 31 and the second bus wire, for example, each may be 60 ohms.

The pull-up resistor 34 is also composed of two series-connected resistors connected between the first bus wire 31 and the second bus wire, for example, each may be 60 ohms.

The voltages on the two bus wires have opposite polarities, so that the pseudo-electromagnetic fields emitted by the two wires cancel each other out. If the symmetry is high, the bus wire can take the form of a twisted wire and does not require costly shielding.

In the CAN transceiver as described above, the place where the most current consumption is generated is a path (hereinafter referred to as an output terminal) for outputting a signal to the CAN bus 30, which is emphasized in FIG. 1 in bold.

A CAN transceiver with a conventional architecture has a total current consumption of 50mA when transmitting a dominant bit (0) under normal conditions. Since the output stage consumes approximately 40mA of current, most of the total current consumption It can be said that it occupies.

Therefore, reducing the power consumed in this area is the most effective in improving the heat dissipation characteristics. The recessive bit (1) is negligible because no current flows through the output stage.

In this situation, when the power consumed inside the CAN transceiver is denoted as P INT and the power consumed outside the CAN transceiver is denoted as P EXT , the power P can be generated as shown in Equation 2 by modifying Equation 1 .

(1)

P = IV

(2)

P = P INT + P EXT = I (V INT + V EXT )

V INT is the sum of the voltages across the components of the transceiver 20 as the internal voltage of the CAN transceiver and V EXT is the sum of the pull-up or pull-down resistances of the CAN bus 30 to the external voltage of the CAN transceiver. Means both-end voltage.

In this situation, decreasing V INT reduces P INT .

2 is a schematic block diagram of a CAN transceiver according to the related art.

Referring to FIG. 2, V INT can be rewritten as follows.

(3)

V INT = V M1 + V D1 + V D2 + V R1

Here, V M1 and V M2 are voltage drops of transistors M1 and M2, V D1 and V D2 are voltage drops of diodes D1 and D2, which are reverse current blocking elements, and V R1 , voltage drop of terminal resistance of the can bus.

 Depending on the fabrication process, the voltage drop across transistors M1 and M2 is typically 0.3V and the voltage drop across diodes D1 and D2 is typically 0.7V.

In order to reduce V INT , V D1 and V D2 can be greatly reduced by changing the circuit as suggested in FIG.

Here, assuming that the reference voltage is 5V, I represents a current.

division existing Invention VM1 0.3V 0.3V VM2 0.3V 0.3V VD1 0.7V 0.3V VD2 0.7V 0.3V I 40mA 40mA PINT 80mW 48mW PEXT 120mW 152mW P 200mW 200mW

In other words, it is essential to reduce the V D1 and V D2 from 0.7V to 0.3V by adding a transistor to the diode.

As shown in Table 1, the power consumed inside the CAN transceiver has dropped to 60% of the previous level.

On the other hand, the power consumption of the wires on the CAN bus increases by 32 mW, which is reduced by the CAN transceiver.

However or wires of the CAN bus gateu the hold is at least 40m in length, CAN transceiver is only a size of a normal level of 1cm 2. Thus, the wires on the CAN bus have much lower thermal densities than the CAN transceivers. Therefore, lowering the thermal density of the CAN transceiver in the overall system-level design helps improve system reliability.

3 is a block diagram of a low power transceiver according to another embodiment of the present invention.

3, a low-power transceiver according to another embodiment of the present invention differs from the low-power transceiver according to the embodiment of FIG. 1 in that a first type second transistor and a first reverse current prevention element are connected to a first type double diffusion Type transistor (P type DMOS) DM1.

That is, the first type second transistor is implemented by the transistor element M3 of the first type double diffusion type transistor DM1, and the first type reverse current prevention element is a parasitic diode of the first type double diffusion type transistor PD1). Here, the parasitic diode PD1 is a diode formed by bonding the body of the first type double diffusion type transistor and the semiconductor layer, and is inherent to the first type double diffusion type transistor DM1.

Similarly, a low power transceiver according to another embodiment of the present invention includes a second type second transistor and a second type reverse current prevention element of the low power transceiver according to the embodiment of FIG. 1, and a second type double diffusion type transistor DM2. As shown in FIG.

That is, the second type second transistor is implemented by the transistor element M4 of the second type double diffusion type transistor DM2, and the second type reverse current prevention element is implemented by the transistor M3 of the second type double diffusion type transistor DM2. And a parasitic diode (PD2). Here, the parasitic diode PD2 is a diode formed by the junction of the body of the second type double diffusion type transistor DM2 and the semiconductor layer, and is inherent to the second type double diffusion type transistor DM2.

Here, the double diffusion type transistor has a short channel length by continuously performing the diffusion process twice and has an advantage of being able to apply a high current and a high voltage.

Such a double diffusion type transistor can be classified into VDMOS (Vertical Double Diffused MOS) and LDMOS (Lateral Double Diffused MOS). VDMOS is mainly composed of individual elements, and LDMOS is mainly applied to the output terminal of the power IC. In the present invention, VDMOS is used as a double diffusion type transistor.

As described above, the present invention is more cost competitive in the design using the DMOS process because a transistor and a diode can be implemented simultaneously using a parasitic diode of a DMOS provided in the DMOS process. In this case, the present invention can be implemented at no additional cost.

4 is a flowchart of a method of controlling a low power CAN transceiver according to an embodiment of the present invention.

Referring to FIG. 4, in a method of controlling a low power CAN transceiver according to an exemplary embodiment of the present invention, when a driver receives a dominant driving signal from an external source (S10), the first reverse current prevention device A current path is formed between the reference voltage terminal and the first bus terminal (S12).

More specifically, the driver turns on the first-type first transistor and the first-type second transistor of the transmitting and receiving unit to form a current path between the reference voltage terminal and the first bus terminal, thereby making the can bus dominant I make it.

Then, the driver forms a current path between the second bus terminal and the ground terminal in a state in which the second reverse current blocking element is kept off (S14).

To be more specific, the driver turns on the second type first transistor and the second type second transistor of the transmitting and receiving unit to form a current path between the second bus terminal and the ground terminal.

On the other hand, when a drive signal which is externally hot is inputted (S16), the driver cuts off the current path between the reference voltage terminal and the first bus terminal to make the canvas in a recessive state. At this time, the first reverse current blocking element maintains the off state (S18).

In more detail, the driver turns off the first-type first transistor and the first-type second transistor of the transmission / reception unit when the drive signal is externally input, cuts off the current path between the reference voltage terminal and the first bus terminal Make the can bus into a recessive state.

Further, the driver cuts off the current path between the second bus terminal and the ground terminal, and the second reverse current prevention element maintains the OFF state (S20).

More specifically, the driver turns off the second-type second transistor and the second-type second transistor of the transmitting and receiving unit when the external drive signal is input, thereby blocking the current path from the second bus terminal to the ground terminal.

At this time, as the current path is shut off, the first and second reverse current prevention elements are also turned off, but a high-voltage (from the wire side) is drawn from the outside (S22) so as to prevent the reverse circuit from being damaged.

The foregoing description is merely illustrative of the technical idea of the present invention, and various changes and modifications may be made by those skilled in the art without departing from the essential characteristics of the present invention. Therefore, the embodiments described in the present invention are not intended to limit the technical spirit of the present invention but to illustrate the present invention. The scope of protection of the present invention should be construed according to the following claims, and all technical ideas within the scope of equivalents thereof should be construed as being included in the scope of the present invention.

10: Driver 20: Transmitting /
21: first bus terminal 22: second bus terminal
30: can bus 31: first wire
32: second wire

Claims (14)

delete A CAN transceiver comprising a driver and a transceiver,
The transceiver unit forms the can bus in a dominant state in a state in which the first and second reverse current blocking elements included therein are off,
The transmitting /
A first type first transistor having a first terminal connected to the reference voltage terminal and a second terminal connected to the driver;
A first type second transistor having a first terminal connected to a third terminal of the first type first transistor, a second terminal connected to the driver, and a third terminal connected to the first bus terminal;
A second type first transistor having a third terminal connected to the ground terminal and a second terminal connected to the driver; And
And a second type second transistor having a first terminal connected to the second bus terminal, a first terminal connected to the first terminal of the second type transistor and a second terminal connected to the driver, ,
The first terminal of the first reverse current blocking element is connected to the first terminal of the first type second transistor and the second terminal is connected to the third terminal of the first type second transistor,
The second terminal of the second reverse current blocking element is connected to the first terminal of the second type second transistor and the second terminal is connected to the third terminal of the second type second transistor. The method according to claim 2,
Wherein the first type first transistor and the first type second transistor are PMOS transistors and the second type first transistor and the second type second transistor are NMOS transistors. The method according to claim 2,
The driver turns on the first type first transistor, the first type second transistor, the second type first transistor and the second type second transistor to turn the can bus into a dominant state when a dominant drive signal is inputted And the first reverse current prevention element and the second reverse current prevention element maintain the OFF state. The method according to claim 2,
The driver turns off the first type first transistor, the first type second transistor, the second type first transistor and the second type second transistor when the drive signal of the thermal type is inputted to turn the can bus into a thermal state And the first and second reverse current prevention elements are kept off to cut off the reverse current input from the CAN bus. The method according to claim 2,
Wherein the first reverse current prevention element and the second reverse current prevention element are diodes. The method according to claim 2,
Wherein the first type first transistor and the first reverse current prevention element are formed integrally with a first type double diffusion type transistor and the second type second transistor and the second type reverse current prevention element are formed integrally with the second type double diffusion type transistor The CAN transceiver being formed integrally with the CAN transceiver. delete A driver that isolates the drive signal and the receive signal; And
And a transceiver for allowing the drive signal and the receive signal to be exchanged between the can bus and the driver,
The transceiver unit forms the can bus in a dominant state in a state in which the first and second reverse current blocking elements included therein are off,
The transmitting /
A first type first transistor having a first terminal connected to the reference voltage terminal and a second terminal connected to the driver;
A first type second transistor having a first terminal connected to a third terminal of the first type first transistor, a second terminal connected to the driver, and a third terminal connected to the first bus terminal;
A second type first transistor having a third terminal connected to the ground terminal and a second terminal connected to the driver; And
And a second type second transistor having a first terminal connected to the second bus terminal, a first terminal connected to the first terminal of the second type transistor and a second terminal connected to the driver, ,
The first terminal of the first reverse current blocking element is connected to the first terminal of the first type second transistor and the second terminal is connected to the third terminal of the first type second transistor,
The second terminal of the second reverse current blocking element is connected to the first terminal of the second type second transistor and the second terminal is connected to the third terminal of the second type second transistor. The method of claim 9,
Wherein the first type first transistor and the first reverse current prevention element are formed integrally with a first type double diffusion type transistor and the second type second transistor and the second type reverse current prevention element are formed integrally with the second type double diffusion type transistor The CAN transceiver being formed integrally with the CAN transceiver. delete delete delete delete
KR1020150141134A 2015-10-07 2015-10-07 Low power CAN transceiver KR101666569B1 (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11032300B2 (en) 2017-07-24 2021-06-08 Korea University Research And Business Foundation Intrusion detection system based on electrical CAN signal for in-vehicle CAN network

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Publication number Priority date Publication date Assignee Title
KR100897895B1 (en) 2002-09-18 2009-05-18 페어차일드코리아반도체 주식회사 Semiconductor device
JP2012172568A (en) 2011-02-21 2012-09-10 Ngk Spark Plug Co Ltd Energization control apparatus for glow plug

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Publication number Priority date Publication date Assignee Title
KR100897895B1 (en) 2002-09-18 2009-05-18 페어차일드코리아반도체 주식회사 Semiconductor device
JP2012172568A (en) 2011-02-21 2012-09-10 Ngk Spark Plug Co Ltd Energization control apparatus for glow plug

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* Cited by examiner, † Cited by third party
Title
데이터시트(TEXAS INSTRUMENTS, "SN65HVD1050 EMC Optimized CAN Bus Transceiver", 2015.02.10.)* *

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11032300B2 (en) 2017-07-24 2021-06-08 Korea University Research And Business Foundation Intrusion detection system based on electrical CAN signal for in-vehicle CAN network

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