KR101625097B1 - method for controlling power consumption decrease based on active stand-by mode transmission in electronic device, and computer-readable recording medium for the same - Google Patents

method for controlling power consumption decrease based on active stand-by mode transmission in electronic device, and computer-readable recording medium for the same Download PDF

Info

Publication number
KR101625097B1
KR101625097B1 KR1020150104844A KR20150104844A KR101625097B1 KR 101625097 B1 KR101625097 B1 KR 101625097B1 KR 1020150104844 A KR1020150104844 A KR 1020150104844A KR 20150104844 A KR20150104844 A KR 20150104844A KR 101625097 B1 KR101625097 B1 KR 101625097B1
Authority
KR
South Korea
Prior art keywords
electronic device
active
interface module
standby mode
mode
Prior art date
Application number
KR1020150104844A
Other languages
Korean (ko)
Inventor
윤홍수
강희열
박형종
김대중
정윤근
Original Assignee
가온미디어 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 가온미디어 주식회사 filed Critical 가온미디어 주식회사
Priority to KR1020150104844A priority Critical patent/KR101625097B1/en
Application granted granted Critical
Publication of KR101625097B1 publication Critical patent/KR101625097B1/en

Links

Images

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/63Generation or supply of power specially adapted for television receivers
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/43Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
    • H04N21/443OS processes, e.g. booting an STB, implementing a Java virtual machine in an STB or power management in an STB
    • H04N21/4436Power management, e.g. shutting down unused components of the receiver
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/44Receiver circuitry for the reception of television signals according to analogue transmission standards

Abstract

The present invention relates to a technology to control a decrease in power consumption of a device by blocking a power supply of an external A/V interface module such as an HDMI interface module, an A/V component interface module, an A/V composite interface module, and an SPDIF interface module when a mode of the device is switched to an active standby mode wherein the device communicates only a communication signal with an external device. More specifically, the present invention relates to a technology to control the decrease in power consumption of a device by changing a self refresh cycle of a DDR RAM, and setting the operating clock and core of a CPU to be down when switching from an active mode to an active standby mode is identified. According to the present invention, power consumption is able to be reduced to be about 33% in the active standby mode.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a method for controlling power consumption reduction in an electronic device,

The present invention relates to a technology for controlling power consumption of an apparatus when an electronic apparatus connected to an external apparatus and a network is switched from an active mode to an active standby mode.

More particularly, the present invention relates to an audio / video (AV) interface module, an A / V component interface module, an A / V composite interface module, a SPDIF interface Module and the like by cutting off the power supply of the external A / V interface module.

Particularly, the present invention relates to a technology for controlling the power consumption by reducing the self refresh period of the DDR RAM and setting the operation clock and core of the CPU down when the transition from the active mode to the active standby mode is identified.

Generally, an electronic device including a set-top box is equipped with various functional modules for a specific service (for example, public broadcasting, cable broadcasting).

Normally, when an electronic device is connected to an external device via a network, all function modules mounted on the electronic device perform smoothly in 'active mode', and in 'active standby mode' It maintains a state of exchanging communication signals with external equipment.

However, power is also consumed in the 'active standby mode' in which the power of the electronic device is turned off. For example, current typical set-top boxes consume about 10 W standby power in the 'active standby mode'. This means that only about 10% to 20% of the power consumption is reduced even in the 'active mode' in which the normal operation is performed.

In major developed countries such as North America and Europe, the government is making efforts to improve power consumption in 'active standby mode' through the standby power program. As part of that, one of the major chip set makers 'Stmicro' And low-power chipsets for set-top box platforms that incorporate power management and power reduction algorithms.

Intel also launched a low-power open source platform development community (lessWatts.org) in 2007 to run research and development projects to reduce power consumption based on the Intel platform.

However, there is still an effort to develop a technology that can dramatically reduce the power consumption of the active standby mode compared to the active mode, and implementation of such technology is urgently required.

Korean Patent Application No. 10-2009-0122301 "Electronic Device Power Control Device and Method Thereof, Power Consumer Power Control System & Korean Patent Application No. 10-2011-0028480 entitled "Electronic Apparatus, Power Control Method, and Power Management Apparatus" Korean Patent Application No. 10-2006-0030238 "Power System Control Device and Control Method of Electronic Device System" Korean Patent Application No. 10-2012-0035597 "Power Management Method of Electronic Device and Electronic Device" Korean Patent Application No. 10-2009-7015210 entitled "System and Method for Thresholding System Power Loss Notification in Data Processing System" Korean Patent Application No. 10-2006-0037506 entitled " Device for Automatic Control of Electricity Amount in Building Using Wireless Signal and Appropriate Control Method & Korean Patent Application No. 10-2009-0000889 "Image forming apparatus and power consumption control method thereof" Korean Patent Application No. 10-2008-7007140 "Power consumption control device, image processing device, self-emission display device, electronic device, power consumption control method and computer program" Korean Patent Application No. 10-2010-7023794 entitled "Reduction of power consumption in a remote control electronic device"

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems, and it is an object of the present invention to provide a method and apparatus for controlling power consumption of an external device by blocking power supply to an external A / V interface module included in an electronic device when an electronic device is switched from an active mode to an active standby mode And to provide a technology for reducing control.

Another object of the present invention is to provide a technique for controlling power consumption by controlling the self refresh cycle of the DDR RAM when the electronic device is switched from the active mode to the active standby mode.

It is still another object of the present invention to provide a technique for controlling power consumption by reducing the operating clock of the CPU when the electronic device is switched from the active mode to the active standby mode.

It is another object of the present invention to reduce power consumption by turning off the remaining cores except for the active core and setting the operating clock of the active core down for the CPU having the multicore when the electronic device is switched from the active mode to the active standby mode And to provide a technique for controlling the power supply.

According to another aspect of the present invention, there is provided a method of controlling power consumption of an electronic device when an electronic device having a plurality of function modules and connected with a network is switched from an active mode to an active standby mode, Identifying a transition from a mode to an active standby mode; And interrupting the power supply to the external A / V interface module built in the electronic device.

In this case, the external A / V interface module may include an HDMI interface module, an A / V component interface module, an A / V composite interface module, and an SPDIF interface module.

Identifying a connection release of an analog cable corresponding to the A / V component interface module; Identifying disconnection of an analog cable corresponding to the A / V composite interface module; And stopping power supply to the DAC module incorporated in the electronic device.

Preferably, the method further includes inserting a timeout period (t) through a temporary timer setting for each self refresh period in the active standby mode for the DDR RAM built in the electronic device.

Preferably, the method further comprises down-setting an operation clock of the CPU having at least one core embedded in the electronic device.

On the other hand, in the CPU having one or more cores, turning on the one core (hereinafter, referred to as 'active core') and turning off the remaining cores; And setting an operation clock of the active core to be down.

On the other hand, a computer-readable recording medium according to the present invention records a program for causing a computer to execute a power consumption reduction control method according to an active standby mode switching in an electronic apparatus as described above.

When the electronic device is switched from the active mode to the active standby mode, the power supply to the external A / V interface module is interrupted, the DDR RAM self refresh period is changed, the CPU operation clock is set down, The power consumption of the electronic device is reduced in the active standby mode through setting of the turn-off, setting of the operation clock down for the active core of the CPU, and the like.

Accordingly, the present invention has an effect of reducing the power consumption amount in the active standby mode by about 33% as compared with the prior art.

1 is an example of an electronic device for power consumption reduction control according to the active standby mode switching according to the present invention;
FIG. 2 is a diagram showing an individual switch for switching on and off in a power supply line from the power supply module to each function module according to the present invention,
3 is an exemplary diagram illustrating efficiency increase through power supply control according to the present invention,
4 is a flowchart illustrating a power supply control process of the external A / V interface module according to the present invention.
5 is a flowchart illustrating a power supply control process of the DAC module according to the present invention,
FIG. 6 is a flowchart illustrating a power supply control process through self refresh control of a DDR RAM according to the present invention;
FIG. 7 is a flowchart illustrating a power supply control process through a clock-down control of a CPU according to the present invention;
8 is a flowchart illustrating a power supply control process through an active core and a clock down control of a CPU according to the present invention.

Hereinafter, the present invention will be described in detail with reference to the drawings.

1 is an example of an electronic device for power consumption reduction control according to the active standby mode switching according to the present invention. As shown in FIG. 1, various functional modules (for example, an HDMI interface module, an A / V component interface module, an A / V composite interface module, an SPDIF interface module, a DAC Module) is preferably connected to an external device via a network.

In this case, the 'active mode' is optimized for the electronic device so that the installed functional modules perform the normal operation smoothly. In the 'active standby mode', even when the power is turned off, Maintains the status of sending and receiving signals.

However, power is consumed in the 'active standby mode' in which the power of the electronic device is turned off. For example, most of the set-top boxes currently consume about 10 W standby power in the 'active standby mode'. On the contrary, the present invention can be configured to consume 7W or less of standby power in the 'active standby mode', preferably to consume 5W or less of standby power.

FIG. 2 is a diagram illustrating an individual switch for switching on and off in a power supply line from a power supply module to each function module according to the present invention. Referring to FIG. 2, when the electronic device identifies the transition from the active mode to the active standby mode, a plurality of function modules (e.g., a DMI interface module, an A / V component interface module, an A / V composite interface Module, an SPDIF interface module, a DAC module).

At this time, the functional module mounted on the electronic device is composed of one chip, and there is a functional module which can be switched on and off by software, but a functional module which must be switched on and off by hardware can also be constituted. As shown in FIG. 2, the functional modules which must be switched on and off in hardware are provided with separate individual switches (for example, switches # 1 to # 4) connected to the power supply modules for individual functional modules .

3 is an exemplary diagram illustrating an increase in efficiency through power supply control according to the present invention. Referring to FIG. 3, the set-top box of the electronic device according to the present invention is configured to consume approximately 6.7 W of standby power in a normal 'active standby mode' in which no separate power consumption reduction control is performed.

At this time, when the power supply to the external A / V interface module including the HDMI interface module, the A / V component interface module, the A / V composite interface module, and the SPDIF interface module is cut off by identifying the transition to the active standby mode 6.5 W of standby power is consumed, which saves approximately 3% (0.2 W) of power consumption compared to the normal state.

If the operating clock of the CPU having one or more cores (for example, dual cores) is set down, the power consumption of about 6% (0.4 W) compared to the normal state is further reduced by consuming 6.1 W of standby power.

Here, the operation clock-down setting for the CPU is performed by setting the rising width of the second frequency f 1 in the process of dividing the core frequency by the second frequency f 1 with respect to the first low frequency f 0 provided to the CPU Indicating the lowering process (down setting).

In addition, by setting a time-out period (t) by setting a temporary timer for each self-refresh period in the active standby mode for the DDRAM, 5.2 W standby power is consumed, and thus about 13% (0.9 W) Is further reduced.

In addition, as only one of the dual cores of the CPU (active core) remains turned on and the remaining cores are turned off, 4.8 W of standby power is consumed, thereby consuming approximately 6% (0.4 W) Additional savings.

If the operating clock of the turned-on active core is further down-set, 4.5 W of standby power is consumed, thereby saving about 4.5% (0.3 W) of power consumption compared to the normal state.

As a result, as shown in FIG. 3, the power consumption of the active standby mode is reduced from about 6.7 W to about 4.5 W by about 33% (2.2 W) in comparison with the prior art through a series of control operations .

4 is a flowchart illustrating a power supply control process of the external A / V interface module according to the present invention.

Step S110: First, an electronic device (set-top box) according to the present invention includes a plurality of function modules and performs a normal operation in an 'active mode' in a state of being connected to an external device via a network.

In this case, when the set-top box identifies the transition from the active mode to the active standby mode, the external A (including the HDMI interface module, the A / V component interface module, the A / V composite interface module, and the SPDIF interface module) / V Interrupts the power supply to the interface module. In S mode, it does not output audio and video to an external monitor (eg digital TV) or audio output device (eg speaker, amplifier).

As a result, 6.5 W of standby power is consumed, as shown in FIG. 3, thereby saving about 3% (0.2 W) of power consumption compared to the normal state.

5 is a flowchart illustrating a power supply control process of the DAC module according to the present invention.

Steps S131, S132, and S133: Disconnecting the analog cable corresponding to the A / V component interface module and disconnecting the analog cable corresponding to the A / V composite interface module with the electronic device (set top box) By identifying the disconnection of the corresponding analog cable, the standby power consumption of the set-top box can be further reduced by disabling the power supply to the DAC (digital analog converter) module built in the set-top box.

Referring to FIG. 4, the power supply to the A / V component interface module and the A / V composite interface module is interrupted when the active standby mode is switched to the active standby mode. However, the DAC module located in the previous stage of signal processing for these modules does not always stop the power supply when the mode is switched to the 'active standby mode', but only when the corresponding analog cable is disconnected, .

I will look at why. The A / V component interface module and the A / V composite interface module are analog modules, and the standby time due to switching between the 'active mode' and the 'active standby mode' is very short. However, since the DAC module is 'active mode' The transition time is long.

As a result, when switching from active standby mode to active mode, the A / V component interface module and the A / V composite interface module can immediately boot and perform operations, but wait until the DAC module boot time And there is a problem in that the display can not be displayed on the television screen for a considerable time.

Therefore, even if the power supply to the A / V component interface module and the A / V composite interface module is disconnected according to the 'active standby mode' identification, the A / V component interface It is desirable to maintain the power supply to the DAC module because it means that modules and A / V composite interface modules are available.

When the A / V component interface module and the A / V composite interface module are resumed, the operation associated with the DAC module is performed at the same time as the power supply to the DAC module is maintained. And a broadcast image can be quickly implemented on a digital television.

However, when the analog cable is disconnected from the A / V component interface module and the A / V composite interface module, switching to the 'active mode' immediately means that the analog cable is not used until the analog cable is connected. Mode ', it is desirable to cut off the power supply to the DAC module to reduce the power consumption of the electronic device.

6 is a flowchart illustrating a power supply control process through self refresh control of the DDR RAM according to the present invention.

Step S210: The electronic device (set-top box) preferably sets the self refresh of the DDR RAM to operate in best-effort in the 'active mode'.

Step S220: Next, when the electronic device has a plurality of function modules and performs a normal operation in an 'active mode' in a network connection with an external device, the DDR RAM built in the electronic device is self- And performs a self refresh operation.

Here, the DDR RAM records the bit of '0' or '1' as the amount of charge contained in the capacitor in the integrated circuit (IC). However, over time, the electrons of the capacitor are short-circuited, thereby losing the stored information. In order to prevent this, the self-refresh operation that supplies power to the capacitor periodically before the capacitor's electrons are completely short-circuited will be able to maintain the information stored in the DDR RAM.

However, the DDR RAM is busy with performing the original operation in which arbitrary information is stored and information is read from an arbitrary cell, but the self refresh operation must be performed in parallel.

Therefore, when the electronic device performs a normal operation in the 'active mode', the DDR RAM must perform the self-refresh operation separately allocated to the original operation. Therefore, in order to avoid the stored information, the self- As shown in FIG.

In this way, the self-refresh operation of the optimized DDR RAM in the 'active mode' causes a problem in that unnecessary power consumption is caused as described below when the device is operated as the best port in the 'active standby mode'.

In this case, if the set top box identifies the transition from the active mode to the active standby mode, it is determined whether or not the set top box is in the active standby mode for the best effort in the active mode set for the DDR RAM A timer is temporarily set to insert a timeout time (t) for each self-refresh period.

That is, in the 'active mode', the self-refresh of the DDR RAM is set as the best effort, and the self-refresh is performed as often as the circumstances permit. However, in the 'active standby mode', the time- So that the self-refresh operation is performed while slightly resting. As compared with the prior art in which the self-refresh is performed in the best-effort manner in the 'active standby mode', the cycle of the self-refresh operation is set to be long and the power consumption is reduced.

In the present invention, the reason why it is possible to insert the rest time in the middle of the self-refresh in the 'active standby mode' will be described.

In the prior art, the self refresh of the DDR RAM was always performed at the best effort in both the 'active mode' and the 'active standby mode'. However, even if the best effort port is set, the actual self-refresh period in the active mode and the active standby mode are slightly different.

That is, even if the self refresh of the DDR RAM is set as the best effort in the 'active mode', the time gap g1 between the self refresh operations is maintained above a certain level because the electronic device is busy performing its operation. On the other hand, in the 'active standby mode', the time gap g2 between the self-refresh operations becomes shorter than that in the 'active mode' because the electronic device does not have to process much. That is, in the 'active standby mode', self refresh operations are performed unnecessarily frequently, which means power wastage.

Accordingly, in the present invention, a timeout time (t), that is, a rest time, set in advance in the middle of the self-refresh in the active standby mode is inserted. Even if the timeout period is inserted in this way, if the time gap g3 between the self-refresh operations in the active standby mode is kept substantially equal to the time gap g1 in the 'active mode' Does not occur.

As shown in FIG. 3, the power consumption of about 13% (0.9 W) compared with the normal state is further reduced by consuming the standby power of 5.2 W through the setting of the temporary timer operating in the active standby mode do.

Step S250 and S260: On the other hand, if the set-top box identifies the transition from the 'active standby mode' to the 'active mode', temporarily set the timeout period t to be inserted every self- It is preferable that the self refresh of one DDR RAM is configured to return to the best effort.

7 is a flowchart illustrating a power supply control process through clock down control of a CPU according to the present invention.

Steps S310 and S320: The electronic device (set-top box) has a plurality of function modules and performs a normal operation in an 'active mode' while being connected to an external device through a network, thereby identifying a transition to an 'active standby mode'.

Step S330: Next, the operation clock of the CPU having the dual core built in the set-top box is set down by identifying the switch to the active standby mode. As a result, the standby power consumption of 6.1 W is consumed as shown in FIG. 3, so that the power consumption of about 6% (0.4 W) is further saved in comparison with the normal state.

Meanwhile, although the CPU according to the embodiment of the present invention obtains a dual core as an example as shown in FIG. 3, the CPU according to the present invention includes a single core, a quad core, a hex core, .

Here, in case of a CPU having a quad core or more, the reduction in the power consumption will be larger when the operation clock of the CPU is set down.

8 is a flowchart illustrating a power supply control process through an active core and a clock down control of a CPU according to the present invention.

Steps S410 and S420: The electronic device (set-top box) has a plurality of function modules and performs a normal operation in an 'active mode' while being connected to an external device through a network, and identifies a transition to an 'active standby mode'.

Step S430: At this point, one or more cores, for example a CPU having a dual core, maintain a turn-on state for one core (active core) and turn off the other one. Then, the operation clock for the active core in the turned-on state is set down.

As a result, the standby power consumption of 4.5 W is consumed as shown in FIG. 3, so that the power consumption of about 10.5% (0.7 W) is further saved in comparison with the normal state.

3, the CPU according to the present invention can be configured to include a single core, a quad core, a hexa core, and an octa core. In case of a CPU having quad core or more, if the operating clock of the CPU is set down, the amount of power consumption reduction will be larger than the result of [Fig. 3].

The present invention can also be embodied in the form of computer readable code on a computer readable recording medium. At this time, the computer-readable recording medium includes all kinds of recording apparatuses in which data that can be read by a computer system is stored.

Examples of the computer-readable recording medium include a ROM, a RAM, a CD-ROM, a magnetic tape, a floppy disk, an optical data storage, and the like, and may be implemented in the form of a carrier wave . The computer-readable recording medium can also be stored and executed by a computer-readable code in a distributed manner on a networked computer system. And functional programs, codes, and code segments for implementing the present invention can be easily deduced by programmers skilled in the art to which the present invention belongs.

Claims (8)

1. A method for controlling power consumption of an apparatus when a plurality of function modules are provided and an electronic apparatus connected to the external apparatus via a network is switched from an active mode to an active standby mode,
Identifying that the electronic device switches from the active mode to the active standby mode;
Blocking power supply to an external A / V interface module built in the electronic device;
The timeout period (t) is inserted between cycles of the self-refresh operation for the DDR RAM built in the electronic device through the temporary timer setting maintained while the electronic device operates in the active standby mode Thereby extending the cycle of self-refresh;
Wherein the power saving mode is switched to the active standby mode in the electronic device.
The method according to claim 1,
Wherein the external A / V interface module includes an HDMI interface module, an A / V component interface module, an A / V composite interface module, and an SPDIF interface module. Control method.
The method of claim 2,
Identifying disconnection of an analog cable corresponding to the A / V component interface module;
Identifying disconnection of an analog cable corresponding to the A / V composite interface module;
Blocking power supply to a DAC module built in the electronic device;
Wherein the power saving mode is switched to the active standby mode in the electronic device.
delete The method according to claim 1,
Setting an operation clock of a CPU having one or more cores built in the electronic device down;
Wherein the power saving mode is switched to the active standby mode in the electronic device.
The method according to claim 1,
Maintaining a turn-on state for one particular core (hereinafter referred to as 'active core') for a CPU having one or more cores embedded in the electronic device and turning off the other cores;
Wherein the power saving mode is switched to the active standby mode in the electronic device.
The method of claim 6,
Setting an operating clock of the active core down;
Wherein the power saving mode is switched to the active standby mode in the electronic device.
A computer-readable recording medium storing a program for causing a computer to execute a power consumption reduction control method according to an active standby mode switching in an electronic device according to any one of claims 1 to 3, and 5 to 7.
KR1020150104844A 2015-07-24 2015-07-24 method for controlling power consumption decrease based on active stand-by mode transmission in electronic device, and computer-readable recording medium for the same KR101625097B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1020150104844A KR101625097B1 (en) 2015-07-24 2015-07-24 method for controlling power consumption decrease based on active stand-by mode transmission in electronic device, and computer-readable recording medium for the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020150104844A KR101625097B1 (en) 2015-07-24 2015-07-24 method for controlling power consumption decrease based on active stand-by mode transmission in electronic device, and computer-readable recording medium for the same

Publications (1)

Publication Number Publication Date
KR101625097B1 true KR101625097B1 (en) 2016-05-27

Family

ID=56106216

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020150104844A KR101625097B1 (en) 2015-07-24 2015-07-24 method for controlling power consumption decrease based on active stand-by mode transmission in electronic device, and computer-readable recording medium for the same

Country Status (1)

Country Link
KR (1) KR101625097B1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20240003910A (en) 2022-07-04 2024-01-11 정다운 Power Consumption Reducing Circuit for Emergency Relay

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20240003910A (en) 2022-07-04 2024-01-11 정다운 Power Consumption Reducing Circuit for Emergency Relay

Similar Documents

Publication Publication Date Title
JP4018533B2 (en) Low power broadcast receiver
US7574615B2 (en) Method of managing power consumption of a network interface
CN109151961B (en) Operation method of mobile terminal, terminal and computer readable storage medium
US20120319656A1 (en) Power control apparatus and power control method
US9846471B1 (en) Systems and methods for power management in devices
US20100273519A1 (en) Methods and apparatuses of network system with power saving functions
US20040254683A1 (en) Home gateway system with power management function
JP2006134325A (en) Electrical supply apparatus and electrical power supply module
US20120320283A1 (en) Video display apparatus and external power-supply apparatus
CN105376645A (en) Set-top box and power consumption reduction method
KR101625097B1 (en) method for controlling power consumption decrease based on active stand-by mode transmission in electronic device, and computer-readable recording medium for the same
KR101986099B1 (en) Method and Apparatus for Filtering for Reducing Wake-UP Frequency
US20120044230A1 (en) Display apparatus, power supply apparatus and power supply method thereof
KR101780059B1 (en) scenario-based method for controlling power consumption of digital broadcasting representation devices
WO2022076120A1 (en) Electronic device, method, medium and apparatus for managing extender nodes
CN111050216A (en) Energy-saving method, equipment and storage medium for set top box sound mode
US7944341B2 (en) Network system using DC power bus and auto power control method
KR102160909B1 (en) Image processing apparatus and control method thereof
EP3358762B1 (en) Communication device, information processing device, and communication method
CN105227872B (en) A kind of TV control method and separate type TV
CN103905900A (en) Set top box starting method, set top box and system
EP2988391B1 (en) Mobile power supply terminal and power supply method therefor
CN110049264B (en) Laser television power supply control system and method
JP2004348186A (en) Apparatus and method for processing information, and program
JPH10111737A (en) Resetting device

Legal Events

Date Code Title Description
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20190313

Year of fee payment: 4