KR101620389B1 - Sample adaptive offset for high efficiency video coding - Google Patents
Sample adaptive offset for high efficiency video coding Download PDFInfo
- Publication number
- KR101620389B1 KR101620389B1 KR1020150038905A KR20150038905A KR101620389B1 KR 101620389 B1 KR101620389 B1 KR 101620389B1 KR 1020150038905 A KR1020150038905 A KR 1020150038905A KR 20150038905 A KR20150038905 A KR 20150038905A KR 101620389 B1 KR101620389 B1 KR 101620389B1
- Authority
- KR
- South Korea
- Prior art keywords
- offset
- pixel information
- adaptive sample
- pixel
- information
- Prior art date
Links
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
- H04N19/102—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or selection affected or controlled by the adaptive coding
- H04N19/117—Filters, e.g. for pre-processing or post-processing
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/42—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
- H04N19/423—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation characterised by memory arrangements
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/42—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
- H04N19/436—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation using parallelised computational arrangements
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/70—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by syntax aspects related to video coding, e.g. related to compression standards
Abstract
Description
The present invention relates to an adaptive sample offset (SAO) of an HEVC, and more particularly to an adaptive sample offset (SAO) of an HEVC that reduces computation time and computational complexity.
Recently, as the video and communication technology rapidly develops, popularization of HDTV and multimedia devices supporting high resolution images has been achieved, and users' interest and demand for high resolution image services have increased. The development direction of the next generation imaging devices is progressing to ultra high resolution image of 4K, 8K UHD (Ultra High Definition) class which is more than 4 times higher than FHD (Full High Definition) class of 1920x1080 resolution.
As the resolution of video increases, the need for new video compression standard technology has emerged. The Video Coding Experts Group (VCEG) group of ITU-T and ISO / IEC Moving Picture Experts Group (MPEG) VC (Joint Colaborative Team on Video Coding) was formed to develop the next generation image compression standard technology HEVC.
HEVC has been developed as an international standardization process in April 2013, and has been developed as a major issue of ultra high resolution image and parallel processing structure. HEVC supports various image resolutions ranging from low-resolution images to ultra-high-resolution images, and includes various image compression techniques to improve coding efficiency. HEVC has improved coding efficiency by more than 50% compared with H.264 / AVC, which is the previous image compression standard.
HEVC uses block-based encoding and quantization techniques as well as H.264 / AVC, which performs transcoding using fixed 8x8 macroblock units, and blocks blocks of various sizes from 4x4 to 32x32 To perform transcoding. However, as the block unit of the transform coding becomes larger, the image distortion occurs more strongly due to errors occurring in quantizing the transform coefficients. Therefore, HEVC requires a technique to reduce image distortion caused by the quantization process. In addition, it adopts a new technology called SAO (Sample Adaptive Offset) as well as DBF (DeBlocking Filter) Respectively.
The adaptive sample offset is a region-based filter that obtains an optimal offset value based on the intra-region property, and then applies an offset value on a pixel-by-pixel basis to reduce the average pixel distortion in the region. However, since the calculation is performed on a pixel basis, a large amount of computation time and computation amount are required in order to process an ultra high resolution image.
SUMMARY OF THE INVENTION It is an object of the present invention to provide an adaptive sample offset of an HEVC that reduces computation time and computation amount.
According to an aspect of the present invention, there is provided a display device including a control module for outputting a control signal, a memory module for reading pixel information from an external memory storing the largest coding unit information according to a control signal, An adaptive sample offset of the HEVC including a processing module for classifying information into edge offsets and band offsets, determining and outputting an optimal offset and an optimal adaptive sample offset parameter, and compensating the reconstructed image using an adaptive sample offset parameter, to provide.
Here, the memory module receives the pixel information, shifts up to a 643 buffer for parallel processing, stores the pixel information, and outputs pixel information stored in each buffer according to an adaptive sample offset performing sequence.
At this time, the processing module receives the pixel information and obtains information to be classified into a band offset and an edge offset. In case of an edge offset, the processing module generates flag information as a pixel classification condition table and determines a category of an edge offset using the generated flag information Classification module.
At this time, the processing module includes a common operator that receives the accumulated value of the difference between the original pixel and the reconstructed pixel, and generates a rate-distortion cost at a time by implementing the product included in the rate-distortion cost calculation formula for the offset as a shifter and an adder do.
At this time, the processing module classifies the pixel information in the current largest coding unit, determines an optimal adaptive sample offset parameter, compensates the current largest coding unit based on the determined adaptive sample offset parameter, And determines optimal adaptive sample offset parameters.
When the adaptive sample offset (SAO) of the HEVC according to the present invention is used, the computation time and the computation amount can be reduced.
1 is an exemplary diagram showing four pattern classes of edge offsets.
2 is a diagram showing an example of band configuration of a band offset.
3 is a block diagram illustrating an adaptive sample offset hardware architecture in accordance with an embodiment of the invention.
4 is an exemplary diagram showing a two-dimensional array buffer structure.
5 is an exemplary diagram showing a pixel classification structure.
6 is an exemplary diagram showing flag generation for category determination of an edge offset.
7 is a block diagram showing a common operator for rate-distortion cost calculation.
8 is an exemplary diagram showing a two-stage pipeline structure of an adaptive sample offset.
While the invention is susceptible to various modifications and alternative forms, specific embodiments thereof are shown by way of example in the drawings and will herein be described in detail. It should be understood, however, that the invention is not intended to be limited to the particular embodiments, but includes all modifications, equivalents, and alternatives falling within the spirit and scope of the invention. Like reference numerals are used for like elements in describing each drawing.
The terms first, second, A, B, etc. may be used to describe various elements, but the elements should not be limited by the terms. The terms are used only for the purpose of distinguishing one component from another. For example, without departing from the scope of the present invention, the first component may be referred to as a second component, and similarly, the second component may also be referred to as a first component. And / or < / RTI > includes any combination of a plurality of related listed items or any of a plurality of related listed items.
It is to be understood that when an element is referred to as being "connected" or "connected" to another element, it may be directly connected or connected to the other element, . On the other hand, when an element is referred to as being "directly connected" or "directly connected" to another element, it should be understood that there are no other elements in between.
The terminology used in this application is used only to describe a specific embodiment and is not intended to limit the invention. The singular expressions include plural expressions unless the context clearly dictates otherwise. In the present application, the terms "comprises" or "having" and the like are used to specify that there is a feature, a number, a step, an operation, an element, a component or a combination thereof described in the specification, But do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, or combinations thereof.
Unless defined otherwise, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. Terms such as those defined in commonly used dictionaries are to be interpreted as having a meaning consistent with the contextual meaning of the related art and are to be interpreted as either ideal or overly formal in the sense of the present application Do not.
Hereinafter, preferred embodiments according to the present invention will be described in detail with reference to the accompanying drawings.
1 is an exemplary diagram showing four pattern classes of edge offsets.
The Adaptive Sample Offset (SAO) is performed after the DBF is processed by the area-based filter. The basic idea of the adaptive sample offset is to classify the pixels in the area to perform filtering, to obtain an optimal offset value based on the classified information, and then to apply an offset value to the restored pixel to reduce the average pixel distortion in the area.
The adaptive sample offset uses two types of edge offsets and band offsets to classify pixels within an area and obtain an offset value. The edge offset is a method for effectively reducing the distortion of the reconstructed image considering edge characteristics between pixels in the area. The band offset is a method for effectively reducing the distortion of the reconstructed image considering similar brightness value characteristics among the pixels in the area.
The adaptive sample offset reduces the distortion between the original image and the reconstructed image, thereby improving not only the subjective image quality and the objective image quality but also the coding efficiency.
Edge offset
The edge offset uses four pattern classes representing one-dimensional directionality in order to classify pixels in consideration of edge characteristics of pixels in the area. Figure 1 shows four pattern classes of edge offsets.
C shown in each class in FIG. 1 represents a pixel to be classified at present, and A and B represent peripheral pixels according to each direction. The edge offset obtains the neighboring pixel information for the horizontal and vertical classes and two diagonal classes as shown in FIG. 1, and classifies the current pixel to be classified and the two neighboring pixel information into the lower category according to the pixel classification conditional expression shown in Table 1. [
Table 1. Pixel classification condition of edge offset.
((C == A) & (C < B))
((C == A) & (C > B))
The edge offsets are classified into respective sub-categories by comparing the pixels to be classified at present with the surrounding pixel information according to the four pattern classes using the conditional expression in Table 1, and based on the classified information, an optimum offset value . That is, the four pattern classes of the edge offset have four subcategories of each, and the edge offset obtains a total of 16 offset values based on the classified information.
2 is a diagram showing an example of band configuration of a band offset.
The band offset is a method of classifying pixels in consideration of similar brightness value characteristics of pixels in the area. The band offset is obtained by dividing a brightness value range of a pixel into bands having a predetermined interval and classifying the divided bands according to brightness values of the pixels to be classified.
FIG. 2 shows an example of a band structure for classifying pixels of a band offset in a pixel representation scheme having 8-bit depth.
As shown in FIG. 2, the band offset is obtained by dividing the brightness range of the pixel into 32 uniform band sections, and classifies the band into corresponding bands according to the brightness values of the pixels to be classified. That is, if the brightness value of the pixel to be classified is 21, the pixel is classified into the third band. The band offset obtains an offset value for a total of 32 bands.
Adaptive sample offset parameters
The adaptive sample offset computes each rate-distortion cost when determining the 16 offset values of the edge offset and the 32 offset values of the band offset to determine the offset values having the minimum rate-distortion cost as the optimal offset value .
Once all 48 optimal offset values for the edge and band offsets are determined, the edge offset computes the rate-distortion cost for each class and determines the optimal class with the smallest rate-distortion cost. At the band offset, the rate-distortion cost is calculated for each band group consisting of four consecutive bands, and the optimum band group having the smallest rate-distortion cost is determined.
Finally, the adaptive sample offset compares the Merge parameter, the edge offset, and the rate-distortion cost of the band offset, respectively, to determine the optimal adaptive sample offset parameter for the current area to obtain information with the lowest rate-distortion cost Optimal adaptive sample offset parameter, and the adaptive sample offset parameter includes type information, four offset values, Merge flag information, and the like.
3 is a block diagram illustrating an adaptive sample offset hardware architecture in accordance with an embodiment of the invention.
The adaptive sample offset hardware architecture proposed in the present invention processes four pixels in parallel to reduce the computation time due to the pixel-by-pixel operation of the standard adaptive sample offset technique, and classifies pixels and performs rate-distortion optimization And the optimal adaptive sample offset parameter is applied to the reconstructed pixel to compensate for the compensated sample offset parameter. In order to minimize the hardware area, the hardware and the chrominance components are processed in a single structure to reuse hardware resources.
An overall block diagram of the adaptive sample offset hardware architecture proposed in the present invention is shown in FIG.
A memory module (MEMCtrl) for reading the pixel information from the external memory storing the largest coding unit information according to the control signal and transmitting the pixel information to the processing module, and a memory module And a band offset, a processing module (SAO process) for determining and outputting an optimal offset and an optimal adaptive sample offset parameter, and compensating the reconstructed image using an adaptive sample offset parameter.
The adaptive sample offset hardware architecture proposed in the present invention generates signals for controlling the entire operation of the adaptive sample offset in the control module (SAOCtrl) as shown in FIG. 3, and outputs the signals to the processing module (SAO process) and the memory module send. The memory module MEMCtrl reads and stores the pixel information for performing the adaptive sample offset from the external memory storing the largest coding unit (LCU) information according to the control signal, To the processing module (SAO process).
The processing module (SAO process) consists of CalcStats, Merge, RdoSAO, and ApplySAO modules that perform the actual adaptive sample offset. The SAO process classifies the input pixels into edge offsets and band offsets and determines and outputs optimal offset values and optimal adaptive sample offset parameters and simultaneously compensates the restored image using adaptive sample offset parameter information .
4 is an exemplary diagram showing a two-dimensional array buffer structure.
The memory module MEMCtrl receives the pixel information, shifts up to a 643 buffer for parallel processing, and stores and outputs pixel information stored in each buffer according to the adaptive sample offset performing sequence.
The adaptive sample offset hardware architecture proposed in the present invention reduces the computation time by four times as compared with the standard adaptive sample offset method, which processes four pixels in parallel by processing in units of one pixel.
When four pixels are classified into an edge offset and a band offset, only four pieces of pixel information to be classified are required for a band offset. However, in the case of an edge offset, two pieces of neighboring pixel information corresponding to four pattern classes are additionally required. Therefore, the proposed adaptive sample offset hardware architecture uses a two-dimensional array buffer structure as shown in Fig. 4 to process four pixels in parallel.
As shown in Fig. 4, the two-dimensional array buffer receives input lines of 64 pieces of pixel information per cycle from an external memory storing the largest coding unit (LCU) (64x64) information, and receives a bottom buffer and a middle buffer Up buffer with a mid buffer and a top buffer. And outputs the pixel information stored in each buffer according to the order of performing the adaptive sample offset.
The two-dimensional array buffer structure has three cycles of delay to fill the bottom buffer, the mid buffer, and the top buffer when receiving the first pixel information of the LCU from the memory. However, in the next operation, it is possible not only to store and input one line of pixel information per one cycle, but also to minimize the number of memory accesses, and to correspond to the proposed adaptive sample offset hardware structure, The pixel information and the surrounding pixel information can be efficiently transmitted and processed.
5 is an exemplary diagram showing a pixel classification structure.
The adaptive sample offset classifies input pixels into edge offsets and band offsets, respectively, and calculates optimal offset values based on the classified information. The classified information refers to the cumulative value of the difference between the original pixel and the restored pixel and the cumulative value of the number of pixels classified for the corresponding category or band when the pixel is classified. Therefore, the pixel classification operation of the adaptive sample offset must classify the pixels and accumulate and store the difference between the restored pixel and the original pixel classified in each category or band and the number of classified restored pixels.
5 shows a pixel classification structure of the proposed adaptive sample offset hardware structure.
The SAO process receives pixel information and obtains information to be classified into a band offset and an edge offset. In case of an edge offset, the SAO process generates flag information as a pixel classification condition table, and generates a category of the edge offset using the generated flag information. And a classification module for determining the classification.
The pixel classification structure of the adaptive sample offset hardware proposed in the present invention is a structure in which information (Error, Category, Band) to be classified in Classification Module is obtained as shown in FIG. 5, (Error, Count) in the corresponding category or band register. The classification scheme shown in FIG. 5 shows a classification operation for one pixel. The proposed adaptive sample offset hardware structure processes four pixels in parallel, so that there are four classification modules (Classification) do. Common registers are commonly used by four classification modules to accumulate and store classified information (Error, Count).
In case of band offset, since each band interval has a constant size of 8, it can be easily classified into corresponding bands by using the upper 5 bits of the restored pixel value. However, in the case of an edge offset, the restored pixel must be classified into two sub-categories according to the two surrounding pixel information according to each pattern class and the conditional expression in Table 1. [
6 is an exemplary diagram showing flag generation for category determination of an edge offset.
When the category decision module of edge offset is implemented in hardware, the conditional expressions in Table 1 can be implemented by using the if statement and comparison operators (>, <, ==). However, as shown in Table 1, the use of many comparison operators and the use of comparison operators in each conditional can cause an unnecessary logic gate, which can increase the hardware area. Therefore, in order to prevent the occurrence of unnecessary logic gates and to reduce the hardware area, the flag information can be generated as shown in FIG. 6 and Table 2, and the category can be determined using the generated flag information. 6 is a code written in Verilog HDL. In Table 1, the flag (LessA, EqulA, LessB, and EqulB) information is generated by using only four comparison operators in comparison with 12 comparison operators. Based on the generated flag information, categories can be determined as shown in Table 2. This method can reduce hardware area because it prevents unnecessary logic gates from being generated and uses fewer comparison operators.
Table 2 shows category determination according to the flag information.
7 is a block diagram showing a common operator for rate-distortion cost calculation.
The processing module (SAO process) receives a cumulative value of a difference between a source pixel and a reconstruction pixel and generates a rate-distortion cost at a time by implementing a product included in a rate-distortion cost calculation formula for offset by a shifter and an adder .
The adaptive sample offset determines optimum offset values for edge offsets and band offsets based on the classified information when the classification of the pixels in the area is completed, and determines an optimal adaptive sample offset parameter for the current area.
When determining the optimal offset and the adaptive sample offset parameter, the adaptive sample offset computes each rate-distortion cost to determine the offset and parameter with the lowest rate-distortion cost.
HM-11, the reference software of HEVC, sets the threshold value so that the offset value can not be less than 0 or greater than 7 when determining the optimal offset value in an image expressed by 8 bits. In addition, R (Rate), a variable required to calculate the rate-distortion cost, is defined as (Offset + 1) and (Offset + 2) at the edge offset and the band offset, respectively. Table 3 shows the equations for calculating the rate-distortion cost from offset 0 to 7.
Table 3 shows the rate-distortion cost calculation according to the offset.
BO: 3
BO: 4
BO: 5
BO: 6
BO: 7
BO: 8
BO: 9
In Table 3, RDcost denotes the rate-distortion cost, N denotes the cumulative cumulative number, E denotes the cumulative value of the difference between the original pixel and the restored pixel, h denotes the offset value, Lagrange multiplier to calculate the rate- R represents a bit rate for expressing the offset.
If a module for calculating the rate-distortion cost according to each offset is implemented in hardware, a large number of multipliers, adders, and subtractors are required as shown in Table 3. However, since the offset (h) and the bit rate (R) according to the offset can be expressed as constants, a common operator can be implemented using only the shifter and the adder as shown in Fig.
FIG. 7 shows a part (2Eh) of a rate-distortion cost calculation using a common operator. The common operator of FIG. 7 receives the accumulated value (Error) of the difference between the original pixel and the restored pixel, and generates (2Eh) values for the offset 0 to 7 at one time. The remainder (Nh2) and (R) of the rate-distortion cost calculation equation are also implemented by a common operator structure as shown in FIG. 7, and this structure can reduce the hardware area by minimizing the use of the arithmetic operation unit.
8 is an exemplary diagram showing a two-stage pipeline structure of an adaptive sample offset.
The processing module (SAO process) classifies the pixel information in the current largest coding unit and then determines an optimal adaptive sample offset parameter, compensates the current largest coding unit based on the determined adaptive sample offset parameter, Thereby performing pixel classification of the coding unit and optimal adaptive sample offset parameter determination.
The adaptive sample offset can be roughly divided into three stages: pixel classification, optimal adaptive sample offset parameter determination, and reconstructed image compensation. The adaptive sample offset determines an optimal adaptive sample offset parameter after pixel classification and compensates the reconstructed image based on the determined adaptive sample offset parameter information.
In the case of the reconstructed image compensation step, if only the determined adaptive sample offset parameter information is inputted, it can be performed independently of the pixel classification and the optimal adaptive sample offset parameter determination step. Accordingly, the two-stage pipeline structure as shown in FIG. 8 can be applied.
The two-stage pipeline structure of FIG. 8 classifies the pixels in the current largest coding unit (LCU) and determines the optimal adaptive sample offset parameter. And compensates the current largest coding unit (LCU) based on the determined adaptive sample offset parameter information, and simultaneously performs pixel classification of the next largest coding unit (LCU) and optimal adaptive sample offset parameter determination.
The two-stage pipeline structure requires all the required cycles only when processing the first largest coding unit (LCU), but since the second largest coding unit (LCU) reduces the required cycles by half, .
Single Adaptive Sample Offset Structure
The adaptive sample offset is performed independently for the luminance component and the chrominance component and has a similar performance structure. Thus, the adaptive sample offset structure for the luminance component can be reused for the chrominance component, and this single structure can greatly reduce the hardware area because an adaptive sample offset structure for the separate chrominance component is not needed.
It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the present invention as defined by the following claims It can be understood that
SAOCtrl: Control module SAO process: Processing module
MEMCtrl: Memory module
Claims (5)
A memory module for reading and transmitting a plurality of pieces of pixel information from an external memory storing the largest coding unit information to the processing module in accordance with the control signal,
Wherein the adaptive sample offset parameter is used to classify each of four pixel information of the plurality of pixel information into edge offsets and band offsets according to the control signal, to determine and output an optimal adaptive sample offset parameter, And a processing module for parallelly compensating each of the pixel information,
Wherein the processing module processes the four pixels in parallel based on the memory module having a two-dimensional array buffer structure to apply the optimal adaptive sample offset parameter for the four pixels,
Wherein the processing module comprises four classification modules for classification of the edge offset and the band offset in parallel for the four pixels. ≪ Desc / Clms Page number 13 >
The plurality of pixel information is 64 pieces of pixel information,
The two-dimensional array buffer structure shifts the 64 pixel information in order of a bottom buffer, a middle buffer, and a top buffer in response to the input line of the 64 pieces of pixel information (SAO) of an HEVC for outputting and transmitting pixel information stored in each of the bottom buffer, the middle buffer, and the top buffer according to an adaptive sample offset performing sequence.
The category of the edge offset for each of the four pieces of pixel information is determined based on the flag information,
Wherein the flag information includes four comparison operators,
The four comparison operators include Less A, Equl A, Less B, and Equl B,
Wherein A and B are values of neighboring pixels of each of the four pixel information, wherein the adaptive sample offset (SAO) of the HEVC.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020150038905A KR101620389B1 (en) | 2015-03-20 | 2015-03-20 | Sample adaptive offset for high efficiency video coding |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020150038905A KR101620389B1 (en) | 2015-03-20 | 2015-03-20 | Sample adaptive offset for high efficiency video coding |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| KR101620389B1 true KR101620389B1 (en) | 2016-05-13 |
Family
ID=56023699
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020150038905A KR101620389B1 (en) | 2015-03-20 | 2015-03-20 | Sample adaptive offset for high efficiency video coding |
Country Status (1)
| Country | Link |
|---|---|
| KR (1) | KR101620389B1 (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106131554A (en) * | 2016-07-07 | 2016-11-16 | 杭州电子科技大学 | The HEVC point self-adapted compensation method of quick sample product based on major side direction |
| CN108206952A (en) * | 2016-12-19 | 2018-06-26 | 北京君正集成电路股份有限公司 | A kind of BO processing method and processing devices based in HEVC |
| CN113489984A (en) * | 2021-05-25 | 2021-10-08 | 杭州博雅鸿图视频技术有限公司 | Sample adaptive compensation method and device of AVS3, electronic equipment and storage medium |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR101413154B1 (en) * | 2013-01-11 | 2014-07-02 | 한밭대학교 산학협력단 | Device for correcting sample adaptive offset applied for high efficiency video coding decoder |
| KR20140116991A (en) * | 2013-03-25 | 2014-10-07 | 삼성전자주식회사 | Apparatus of processing sample adaptive offset of reusing input buffer and method of the same |
| KR20140139531A (en) * | 2012-04-16 | 2014-12-05 | 미디어텍 인크. | Method and apparatus for sample adaptive offset coding with separate sign and magnitude |
-
2015
- 2015-03-20 KR KR1020150038905A patent/KR101620389B1/en active IP Right Grant
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20140139531A (en) * | 2012-04-16 | 2014-12-05 | 미디어텍 인크. | Method and apparatus for sample adaptive offset coding with separate sign and magnitude |
| KR101413154B1 (en) * | 2013-01-11 | 2014-07-02 | 한밭대학교 산학협력단 | Device for correcting sample adaptive offset applied for high efficiency video coding decoder |
| KR20140116991A (en) * | 2013-03-25 | 2014-10-07 | 삼성전자주식회사 | Apparatus of processing sample adaptive offset of reusing input buffer and method of the same |
Non-Patent Citations (2)
| Title |
|---|
| 논문1:한국정보처리학회 논문집 * |
| 논문2:한국정보통신학회 논문지 * |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106131554A (en) * | 2016-07-07 | 2016-11-16 | 杭州电子科技大学 | The HEVC point self-adapted compensation method of quick sample product based on major side direction |
| CN106131554B (en) * | 2016-07-07 | 2019-07-26 | 杭州电子科技大学 | The point self-adapted compensation method of HEVC quick sample product based on major side direction |
| CN108206952A (en) * | 2016-12-19 | 2018-06-26 | 北京君正集成电路股份有限公司 | A kind of BO processing method and processing devices based in HEVC |
| CN108206952B (en) * | 2016-12-19 | 2021-12-28 | 北京君正集成电路股份有限公司 | BO processing method and device based on HEVC |
| CN113489984A (en) * | 2021-05-25 | 2021-10-08 | 杭州博雅鸿图视频技术有限公司 | Sample adaptive compensation method and device of AVS3, electronic equipment and storage medium |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US10931946B2 (en) | Image encoding device, image decoding device, image encoding method, and image decoding method for generating a prediction image | |
| WO2020262396A1 (en) | Systems and methods for reducing a reconstruction error in video coding based on a cross-component correlation | |
| US10244264B2 (en) | Moving image encoding device, moving image decoding device, moving image coding method, and moving image decoding method | |
| JP5944045B2 (en) | Intra prediction residual binarization scheme and improvement of intra prediction in lossless coding of HEVC | |
| US11909965B2 (en) | Method and apparatus for non-linear adaptive loop filtering in video coding | |
| US9277211B2 (en) | Binarization scheme for intra prediction residuals and improved intra prediction in lossless coding in HEVC | |
| KR102359415B1 (en) | Interpolation filter for inter prediction apparatus and method for video coding | |
| WO2021049126A1 (en) | Systems and methods for reducing a reconstruction error in video coding based on a cross-component correlation | |
| JP2022539656A (en) | Cross-component adaptive loop filter for chroma | |
| KR102598576B1 (en) | Apparatus and method for filtering in video coding | |
| KR101677242B1 (en) | Apparatus and method for high sample adaptive offset filtering based on convolution method | |
| US20220417509A1 (en) | Adaptive Bilateral Filtering Using Look-Up Tables | |
| KR101620389B1 (en) | Sample adaptive offset for high efficiency video coding | |
| US20220060702A1 (en) | Systems and methods for intra prediction smoothing filter | |
| WO2021070427A1 (en) | Systems and methods for reducing a reconstruction error in video coding based on a cross-component correlation | |
| CN103491372B (en) | A kind of filtering method of deblocking filter suitable for HEVC standard | |
| WO2022037583A1 (en) | Systems and methods for intra prediction smoothing filter | |
| KR20190057910A (en) | Video coding method and apparatus using adaptive loop filter | |
| JP2014236348A (en) | Device, method and program for moving image coding | |
| CN113556566B (en) | Method and apparatus for intra-prediction or inter-prediction processing of video frames | |
| WO2024012576A1 (en) | Adaptive loop filter with virtual boundaries and multiple sample sources | |
| KR20190023294A (en) | Method and apparatus for encoding/decoding a video signal |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| E701 | Decision to grant or registration of patent right | ||
| GRNT | Written decision to grant | ||
| FPAY | Annual fee payment |
Payment date: 20190502 Year of fee payment: 4 |