KR101574257B1 - Data storage device and data storage system having the same - Google Patents

Abstract

There is provided a data storage device capable of protecting a security code stored in a data storage device and a data storage system including the same. The data storage device according to the embodiment of the present invention can effectively prevent the unauthorized access to the security code of the third party by allowing the CDB information to be read only by the ROM code.

Description

[0001] The present invention relates to a data storage device and a data storage system including the same,

An embodiment of the present invention relates to a data security technology, and more particularly, to a data storage device capable of effectively preventing unauthorized access to a security code of a third party by allowing CDB information to be read only by a ROM code Lt; / RTI >

Recently, a hard disk drive (HDD) has been widely used for storing multimedia data because it has a random access capability, an excellent data transfer speed, and an advantage of being low cost and high capacity compared to other auxiliary storage devices .

As the use of such a hard disk drive increases, a problem of security for data stored in the hard disk drive becomes an important issue. Therefore, the case of encrypting data stored in a hard disk drive or performing a procedure such as user authentication is considerably increased .

In the hard disk drive having the security function, a cryptographic key is required for authentication and data encryption. The cryptographic key must be safe from attack by a third party and must be easily changeable at a desired time.

The security code may be stored in a predetermined area of the data storage device such as the hard disk drive. The third party may disable the security function of the data by changing the security code stored in the hard disk drive.

The data storage device does not basically change the firmware including the security function. However, it is general that the data storage device has a firmware download function for upgrading the firmware to a code bug. Although a security download function that permits such a firmware download function only to a specific person (e.g., a manufacturer) is implemented, such a function also has a limitation in that it can not allow a specific group that can disable the security function.

The embodiments of the present invention are directed to a data storage device capable of effectively protecting an attack against a security code without damaging a firmware download function and a data storage device And to provide a data storage system including the data storage system.

According to an aspect of the present invention, there is provided a data storage device including: a command descriptor block (CDB) for storing a command output from a host; A controller for controlling an access operation of data based on an instruction stored in the instruction descriptor block (CDB); And a switching circuit that allows the command output from the host to be selectively provided to the controller.

Wherein the switching circuit comprises: a command determination unit for determining whether the command stored in the command descriptor block (CDB) is a read / write command or a security command; A flip-flop circuit for outputting a switching control signal based on a result of the judgment by the instruction judging section; And a buffer for controlling a command transmission path between the host and the controller in response to the switching control signal output from the flip-flop circuit.

The flip-flop circuit may have the set determination result of the instruction determination unit as a set input, and the set input may be activated when the instruction stored in the instruction descriptor block (CDB) is the read / write instruction.

The instruction determiner may be implemented in a ROM, and the set input may be a ROM enable signal.

The flip-flop circuit outputs a first switching control signal in response to the activated set input, and the buffer may be enabled in response to the first switching control signal.

The flip-flop circuit may have the reset result of the command determiner as a reset input, and the reset input may be activated when the command output from the command descriptor block (CDB) is the security command.

The flip-flop circuit outputs a second switching control signal in response to the activated reset input, and the buffer may be disabled in response to the second switching control signal.

According to an aspect of the present invention, there is provided a data storage system comprising: a host; And a data storage device for performing an access operation in response to an instruction output from the host, the data storage device comprising: a command descriptor block (CDB) for storing a command output from the host; A controller for controlling an access operation of data based on an instruction stored in the instruction descriptor block (CDB); And a switching circuit that allows the command output from the host to be selectively provided to the controller.

A command determiner for determining whether the command stored in the command descriptor block (CDB) is a read / write command or a security command; A flip-flop circuit for outputting a switching control signal based on a result of the judgment by the instruction judging section; And a buffer for controlling a command transmission path between the host and the controller in response to the switching control signal output from the flip-flop circuit.

The data storage device may be a hard disk drive.

The data storage device according to the embodiment of the present invention can effectively prevent the attack on the security code while maintaining the firmware download function.

It is to be understood that the specific structure or functional description is illustrative only for the purpose of describing an embodiment in accordance with the concept of the present invention and that the embodiments according to the concept of the present invention may be embodied in various forms, Should not be construed as limited to these.

The embodiments according to the concept of the present invention can make various changes and have various forms, so that specific embodiments are illustrated in the drawings and described in detail in this specification or application. However, it should be understood that the embodiments according to the concept of the present invention are not intended to limit the present invention to specific modes of operation, but include all changes, equivalents, and alternatives included in the spirit and scope of the present invention.

The terms first and / or second etc. may be used to describe various components, but the components are not limited to these terms. The terms may be named as a second component only for the purpose of distinguishing one component from another, for example, without departing from the scope of the right according to the concept of the present invention, The second component may also be referred to as a first component.

It is to be understood that when an element is referred to as being "connected" or "connected" to another element, it may be directly connected or connected to the other element, . On the other hand, when it is mentioned that an element is "directly connected" or "directly connected" to another element, it should be understood that there are no other elements in between. Other expressions to describe the relationship between components, such as 'between' and 'between' or 'neighboring to' and 'directly adjacent to' should be interpreted as well.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The singular expressions include plural expressions unless the context clearly dictates otherwise. It will be understood by those skilled in the art that the term " comprises " or " having " in the present specification is intended to specify the presence of stated features, integers, But do not preclude the presence or addition of steps, operations, elements, parts, or combinations thereof.

Unless defined otherwise, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. Terms such as those defined in commonly used dictionaries are to be interpreted as having a meaning consistent with the meaning of the context in the relevant art and, unless expressly defined herein, are to be construed as an ideal or overly formal sense Do not.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a schematic block diagram of a data storage device 100 according to an embodiment of the present invention. A data storage device 100 according to an embodiment of the present invention may include a command descriptor block (CDB) 110, a controller 130, and a switching circuit 190.

The command descriptor block (CDB) 110 may store a command output from the host 200. According to an embodiment, the instruction descriptor block 110 may include an operation code, a logical block address, a transfer length, a control byte, and the like.

The controller 130 may control the access operation of the data based on the command word output from the command descriptor block 110. The access operation may include a program operation of data, a write operation, an erase operation, a read operation, and the like. That is, the command descriptor block 110 may temporarily store the command when the command output from the host 200 is transmitted to the controller 130.

The switching circuit 190 may include a buffer 130 disposed between the host 200 and the controller 130 so that a command output from the host 200 may be selectively provided to the controller 130. [ 120 in response to the request signal.

More specifically, the switching circuit 190 may include an instruction determiner 140, a flip-flop circuit 160, and a buffer 120.

The command classifier 140 may determine whether the command stored in the command descriptor block 110 is a read / write command or a security command. In the embodiment according to the present invention, read / write is exemplified as an example of an access operation, but it may further include a program command and an erase command in addition to the read / write command.

In addition, the command determination unit 140 can be operated by a ROM (read only memory), so that the command determination unit 140 can not arbitrarily access a third party, It is not possible to change it later.

If the type of the instruction is determined by the instruction determination unit 140, the instruction may be dispatched according to the type of the determined instruction. 1 and 2, the instruction determiner 140 reads a command stored in the command descriptor block 110 (S210) and determines whether the stored command is a security command or a read command / Write command (S220).

If the stored command is a security command, the command determination unit 140 may activate a first dispatcher 171, and the first dispatcher 171 may be a security command dispatcher dispatcher).

As a result of the determination, if the stored instruction is a read / write command, the instruction determination unit 140 may activate a second dispatcher 172, and the second dispatcher 172 may activate the second dispatcher 172, And may be a R / W command dispatcher.

The dispatchers 171 and 172 may perform a dispatch operation such as a new command interrupt or the like. For example, the dispatch operation may be a function for performing a command output from the host 200, Lt; / RTI >

Also, as shown in FIG. 1, the determination result of the command determination unit 140 may be transmitted to an activation control unit 150. [ The activation control unit 150 selects either the first enable signal (for example, the activation signal) or the second enable signal (for example, the deactivation signal) on the basis of the determination result of the command determination unit 140 As shown in FIG.

For example, when the instruction determiner 140 and the first dispatcher 171 are implemented as ROM code and the second dispatcher 172 is implemented as a RAM code or a Flash code, The second dispatcher 172 is executed by the instruction determiner 140 so that the activation controller 150 determines whether the instruction stored in the instruction descriptor block 110 is a read / And the RAM enable signal or the flash enable signal (Flash Enable) may be activated at the same time.

Accordingly, the buffer 120 can be enabled by the exclusive OR operation of the arithmetic element 177 so that the data stored in the buffer 120 is transferred to the controller 130 or the host 200).

Similarly, when it is determined that the command stored in the command descriptor block 110 is a security command by the command determiner 140, the first dispatcher 171 is executed and at the same time, the ROM enable signal Can be activated.

Therefore, the buffer 120 can be enabled by the exclusive-OR operation, and as a result, the data stored in the buffer 120 can be transmitted or received to the controller 130 or the host 200.

If the first dispatcher 171 operates in a non-ROM RAM / flash, the activation control unit 140 is activated, but the RAM-enable signal causes the flip-flop circuit 160 The buffer 120 is disabled so that the data stored in the buffer 120 can be blocked from being transmitted to the host 200. [

As shown in FIG. 1, a ROM enable signal may be used as a set input signal of the flip-flop circuit 160. The reset input signal of the flip-flop circuit 160 may be a flash enable signal, An enable signal may be used.

That is, since the information stored in the command descriptor block 110 can be read only by the ROM code, the information stored in the command descriptor block 110 can not be accessed by any other method, Access to code can, in principle, be blocked.

In addition, when the data storage device 100 is implemented as shown in FIG. 1, it is impossible to bypass the security code. For example, when an area other than the security code (e.g., flash or RAM) is selected as a branch address (branch address) of a new command interrupt to bypass the security code, It is impossible to read the information of the indicator block 110 and it may be impossible to perform a normal read / write operation.

As described above, the security code may be stored in the ROM storage area to prevent the security code from being changed by a third party. However, according to the embodiment, the security code may be stored in an area other than the ROM storage area, which will be described.

A typical data storage device (e.g., disk or flash) may include a buffer memory, which may include an encryption / decryption block between the buffer memory and the storage space. The cryptographic block may use a cryptographic key for the cryptographic operation, and the cryptographic key may be set correctly only when a normal authentication process for the data storage device is performed, or an incorrect key may be set. Thus, the encrypted message (or data) is unable to restore the original message (or data) even though it is performing the decryption.

In the data storage device having such a security function, the security code performed by the security command may be encrypted and stored in the storage device, and the read / write code may be stored in the form of plain text.

In order to execute the security code, the data storage device 100 according to the embodiment of the present invention may further include a code overlay function. The overlay code may also be stored in the ROM storage area, Can not be done.

At this time, in the case of the read / write code, the code can be downloaded as in a general drive, but in the case of the security code, the data can be updated only when the data storage device is unlocked through a normal authentication process. Therefore, even if the third party knows the storage location of the security code, the updated code can not be obtained without a normal authentication process.

3 is a schematic block diagram of a data storage system 1 according to an embodiment of the present invention. Referring to FIG. 3, a data storage system 1 according to an embodiment of the present invention may include a data storage device 100 and a processor 120 connected to a system bus 110.

The processor 120 may generate control signals for controlling a program operation (or a write operation), a read operation, or a verify operation of the data storage device 100. [ Accordingly, the control block (not shown) of the data storage device 100 may perform a program operation (or a write operation), a read operation, a verify operation, or the like in response to the control signal output from the processor 120 .

The data storage method or the data encryption method according to an embodiment of the present invention may be implemented in the form of a program command that can be executed through various computer means and recorded in a computer readable medium. The computer-readable medium may include program instructions, data files, data structures, and the like, alone or in combination. The program instructions recorded on the medium may be those specially designed and configured for the present invention or may be available to those skilled in the art of computer software.

Examples of computer-readable media include magnetic media such as hard disks, floppy disks and magnetic tape; optical media such as CD-ROMs and DVDs; magnetic media such as floppy disks; Includes hardware devices that are specially configured to store and execute program instructions such as magneto-optical media and ROM, RAM, PRAM, RRAM, FRAM, Flash memory, and the like.

Examples of program instructions include machine language code such as those produced by a compiler, as well as high-level language code that can be executed by a computer using an interpreter or the like. The hardware devices described above may be configured to operate as one or more software modules for performing the operations of the embodiments of the present invention, and vice versa.

According to an embodiment, when the data storage system 1 according to the embodiment of the present invention is implemented as a portal application, the data storage system 1 according to the embodiment of the present invention may be implemented as a data storage system 100 and a battery 150 for supplying operating power to the processor 120. [

The portable application may be a portable computer, a digital camera, a personal digital assistance (PDA), a cellular telephone, an MP3 player, a portable multimedia player (PMP), an automotive navigation system system, a memory card, a system card, a game machine, an electronic dictionary, or a solid state disk.

The data storage system 1 according to an embodiment of the present invention may further include an interface (e.g., an input / output device 130) for exchanging data with an external data processing apparatus.

When the data storage system 1 according to the embodiment of the present invention is a wireless system, the data storage system 1 according to an embodiment of the present invention may further include a wireless interface 140. [ In this case, the wireless interface 140 may be connected to the processor 120 and wirelessly transmit and receive data to and from the external wireless device via the system bus 110. [

The wireless system may be a PDA, a portable computer, a wireless telephone, a wireless device such as a pager, a digital camera, an RFID reader, or an RFID system. In addition, the wireless system may be a wireless local area network (WLAN) system or a wireless personal area network (WPAN) system. The wireless system may also be a cellular network.

When the data storage system 1 according to the embodiment of the present invention is an image pick-up device, the data storage system 1 according to the embodiment of the present invention can convert an optical signal into an electric signal And may further include an image sensor 160. The image sensor 160 may be an image sensor using a charge-coupled device (CCD) or a complementary metal-oxide semiconductor (CMOS) image sensor. In this case, the data storage system 1 according to the embodiment of the present invention may be a digital camera or a mobile phone with a digital camera attached thereto. In addition, the data storage system 1 according to an embodiment of the present invention may be a satellite system with a camera attached thereto.

In addition, the embodiment according to the present invention can be embodied as computer-readable code on a computer-readable recording medium. The computer-readable recording medium may include any type of recording device in which data that can be read by a computer system is stored. Examples of the computer-readable recording medium include a ROM, a RAM, a CD-ROM, a magnetic tape, a floppy disk, an optical data storage device, and the like, and may be implemented in the form of a carrier wave . In addition, the computer-readable recording medium may be stored in a computer-readable code distributed in a distributed manner in a computer system connected to the network and executed.

The data storage device according to an embodiment of the present invention may be implemented in various packages. In the form of a package, a Package On Package (PoP), Ball Grid Arrays (BGAs), Chip Scale Packages ), PLCC (Plastic Leaded Chip Carrier), PDIP (Plastic Dual In-Line Package), Die in Waffle Pack, Din in Wafer Form, COB (Chip Ob Board), CERDIP plastic metric quad flat pack, thin quad flat pack (TQFP), small outline (SOIC), shrink small outline package (SSOP), thin small outline (TSOP), system in package (SIP) (wafer-level fabricated package), or a wafer-level processed stack package (WSP).

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims. Accordingly, the true scope of the present invention should be determined by the technical idea of the appended claims.

BRIEF DESCRIPTION OF THE DRAWINGS A brief description of each drawing is provided to more fully understand the drawings recited in the description of the invention.

1 is a schematic block diagram of a data storage device according to an embodiment of the present invention;

2 is a flowchart illustrating a dispatch operation according to an embodiment of the present invention;

3 is a schematic block diagram of a data storage system in accordance with an embodiment of the present invention.

Claims (10)

A command descriptor block (CDB) for storing a command output from the host; A controller for controlling an access operation of data based on an instruction stored in the instruction descriptor block (CDB); And And a switching circuit for allowing a command output from the host to be selectively provided to the controller, Wherein the switching circuit comprises: A command determiner for determining whether the command stored in the command descriptor block (CDB) is a read / write command or a security command; A flip-flop circuit for outputting a switching control signal based on a result of the judgment by the instruction judging section; And And a buffer for controlling a command transmission path between the host and the controller in response to the switching control signal output from the flip-flop circuit. Data storage device. delete 2. The flip-flop circuit according to claim 1, And the result of the determination by the instruction determination unit is set as the input, Wherein the set input is activated when the instruction stored in the instruction descriptor block (CDB) is a read / write instruction word. The method of claim 3, Wherein the command decision unit is implemented in a ROM and the set input is a ROM enable signal. 4. The flip-flop circuit according to claim 3, Outputting a first switching control signal in response to the activated set input, Wherein the buffer is enabled in response to the first switching control signal. 2. The flip-flop circuit according to claim 1, And the result of the determination by the instruction determination unit is a reset input, Wherein the reset input is activated when the command output from the command descriptor block (CDB) is the security command. 7. The circuit of claim 6, wherein the flip- Outputting a second switching control signal in response to the activated reset input, Wherein the buffer is disabled in response to the second switching control signal. Host; And And a data storage device for performing an access operation in response to an instruction output from the host, The data storage device includes: A command descriptor block (CDB) for storing a command output from the host; A controller for controlling an access operation of data based on an instruction stored in the instruction descriptor block (CDB); And And a switching circuit for allowing a command output from the host to be selectively provided to the controller, Wherein the switching circuit comprises: A command determiner for determining whether the command stored in the command descriptor block (CDB) is a read / write command or a security command; A flip-flop circuit for outputting a switching control signal based on a result of the judgment by the instruction judging section; And And a buffer for controlling a command transmission path between the host and the controller in response to the switching control signal output from the flip-flop circuit. Data storage system. delete 9. The method of claim 8, Wherein the data storage device is a hard disk drive (HDD).

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