KR101567097B1 - Method of manufacturing laminated wafer by high temperature laminating method - Google Patents

Abstract

The present invention provides a method for manufacturing a bonded wafer which realizes strong bonding between two different types of wafers having a large difference in thermal expansion ratio without lowering the maximum heat treatment temperature and does not cause cracks or loosening of wafers.
A method for manufacturing a bonded wafer (7) by forming a silicon thin film layer on a surface (4) of an insulating substrate (1), characterized in that the surface (2) of a silicon wafer (1) or a silicon wafer A step of performing surface activation treatment on both or one side of the surface 4 of the insulating substrate 3 and then performing a bonding under a temperature atmosphere of more than 50 ° C and less than 300 ° C; And a step of forming a silicon thin film layer by thinning the silicon wafer side by a combination of grinding, etching and polishing in this order.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a method of manufacturing a bonded wafer by a high temperature laminating method,

The present invention relates to a method of producing a bonded wafer by a high temperature bonding method.

Conventionally, a silicon on quartz (SOQ), a silicon on glass (SOG), a silicon on sapphire (SiON) sapphire, and the like, which are formed by combining donor wafers such as silicon and handle wafers of quartz, glass, (SOI) wafer called a silicon on insulator (SOI) wafer has been proposed. Application to a projector, a high-frequency device and the like is expected due to the insulating property and transparency of a handle wafer. Among them, SOS has a thermal conductivity of about 30 times that of quartz, so it is expected to be applied to devices that generate heat.

There are mainly two types of SOI fabrication techniques related to conventional bonding.

One is a silicon wafer (donor wafer) previously subjected to hydrogen ion implantation with a SOITEC method and a wafer (handle wafer) which becomes a support wafer at room temperature and heat treatment at a high temperature (around 500 ° C) A large number of minute bubbles called cavities are generated to be peeled off, and the silicon thin film is transferred to the handle wafer.

The other is a method called SiGen method in which a surface is activated by plasma treatment in both the wafer and the handle wafer which have previously been subjected to the hydrogen ion implantation in the same manner and then the surface is activated and then peeled mechanically from the hydrogen ion implantation interface .

However, in the SOITEC method, a high-temperature heat treatment is performed after the bonding, and therefore there is a drawback that when the handle wafer represented by silicon and quartz or sapphire is bonded to the wafer, the wafer is broken by a difference in thermal expansion coefficient. In the SiGen method, a heat treatment at a temperature of 200 DEG C or more is required even when the SiGeN compound has a higher bonding strength as compared with the SOITEC method at the time of bonding by the surface activation treatment.

As a result, the wafer may be damaged due to the difference in the coefficient of thermal expansion of the bonded wafer, or the non-transferred portion may be introduced into the transferred silicon thin film.

 Reference 1: Q. Y. Tong and U. Gosele "Semiconductor Wafer Bonding"

The problem of breakage of the wafer or introduction of an untransfer portion is due to the fact that the bond strength of the bonding interface increases along with the temperature rise during the heat treatment but the warp occurs due to the simultaneous bonding of the different wafers, It is thought that this is caused by the fact that it does not proceed uniformly in the inside.

The coefficient of thermal expansion of silicon is 2.6 × 10 ^-6 / K, while the coefficients of thermal expansion of quartz and sapphire are 0.56 × 10 ^-6 / K and 5.8 × 10 ^-6 / K, respectively. The difference in thermal expansion rate (DELTA alpha = alpha (donor) - alpha (steering wheel)) in the case of SOQ is DELTA alpha = 2.04 x ^10-6 / K (compressive stress is applied to the silicon side) × 10 ^-6 / K (tensile stress is applied to the silicon side). Since the bonding is usually carried out at room temperature, it is considered that the stress applied to the bonding interface is proportional to the following equation (1).

&Quot; (1) "

(= - 3.2 x 10 ^-6 / K) x DELTA T (= maximum temperature for heat treatment - fusion temperature)

Since the bonding strength of the joining face depends on the highest temperature for the heat treatment (refer to Non-Patent Document 1), it is preferable that this temperature is high in order to realize a strong bonding. If this temperature is changed, there is a possibility of causing new problems such as insufficient bonding force.

SUMMARY OF THE INVENTION In view of the above-described reality, the present invention provides a method of manufacturing a bonded wafer which realizes strong bonding even between two different types of wafers having a large difference in thermal expansion ratio without lowering the maximum heat treatment temperature and does not cause cracks, .

In order to solve the above problem, the present inventors attempted to change the wafer bonding temperature.

That is, the first aspect of the present invention relates to a method for producing a bonded wafer by forming a silicon thin film layer on the surface of a transparent insulating substrate, comprising the steps of: forming a surface of a silicon wafer coated with a silicon wafer or an oxide film, A step of applying a surface activation treatment to one surface or both surfaces of the bonded wafer under a temperature atmosphere of more than 50 ° C and less than 300 ° C to obtain a bonded wafer; a step of applying heat treatment to the bonded wafer at 200 ° C or higher and 350 ° C or lower; And a step of forming a silicon thin film layer by thinning the silicon wafer side of the bonded wafer by a combination of grinding, etching and polishing in this order.

A second aspect of the present invention is a method of manufacturing a bonded wafer by forming a silicon thin film layer on a surface of a transparent insulating substrate, comprising the steps of: forming ions at an ion implantation interface by implanting ions from a surface of a silicon wafer or an oxide- Applying a surface activation treatment to both the surface of the insulating substrate and the surface to which the ion is implanted, and a step of applying the ion-implanted surface and the surface of the insulating substrate to a temperature of more than 50 캜 and less than 300 캜 And a step of transferring the silicon thin film by applying a mechanical impact to the ion implantation interface to form a silicon thin film layer is carried out by a process comprising the steps of: In the order named.

The manufacturing method according to the present invention is a particularly preferable manufacturing method when the insulating substrate is a sapphire or alumina wafer.

The surface activation can be performed by any one of ozonated water treatment, UV ozone treatment, ion beam treatment, or plasma treatment, or a combination thereof.

It is preferable that the bonding step is performed by heating both surfaces of the insulating substrate and the silicon thin film layer or only the insulating substrate side with a hot plate.

The etching solution used for the etching preferably includes at least one alkali solution selected from the group consisting of KOH, NH ₃ , NaOH, CsOH and NH ₄ OH.

The etching solution used for the etching preferably includes at least one organic solvent selected from the group consisting of ethylenediamine pyrocatechol (water), tetramethylammonium hydroxide, and hydrazine.

In the manufacturing method according to the present invention, the dose of the hydrogen ions (H ⁺ ) to be implanted into the silicon wafer is 3.0 × 10 ¹⁶ / cm ² to 1.0 × 10 ¹⁷ / cm ² , or the hydrogen molecule ions H ₂ ⁺ ) is preferably in the range of 1.5 x 10 ¹⁶ / cm ² to 5.0 x 10 ¹⁶ / cm ² .

In the manufacturing method according to the present invention, it is preferable that the surface of the silicon wafer or the insulating substrate has a root mean square roughness of 0.5 nm or less.

According to the manufacturing method of the present invention, it is possible to obtain a bonded wafer that realizes strong bonding without causing cracks, loosening, or the like of wafers even between different types of wafers having a large difference in thermal expansion coefficient while maintaining the highest temperature of heat treatment.

FIG. 1 is a schematic view showing a process of a high-temperature deposition method according to the present invention.
Fig. 2 is a schematic diagram for explaining the flow of each step in the embodiment. Fig.
3 is a schematic view showing a process of a conventional room-temperature bonding method.

An outline of the method will be described with reference to Fig.

First, the surface of the silicon thin film and / or the surface of the insulating substrate of a silicon wafer or an oxide film-coated silicon wafer (hereinafter simply referred to as a silicon wafer unless otherwise specified) is activated by plasma.

In the case of plasma treatment, a silicon wafer and / or an insulating substrate, which has been cleaned by RCA cleaning or the like, is placed in the chamber, the plasma gas is introduced under reduced pressure, and exposed to a high-frequency plasma of about 100 W for about 5 to 10 seconds The surface is plasma treated. Examples of the plasma gas include a plasma of an oxygen gas when oxidizing the surface, a hydrogen gas, an argon gas, a nitrogen gas, a mixed gas thereof, or a mixed gas of hydrogen gas and helium gas Can be used. In the case of treating the insulating substrate, any gas may be used.

By treating with plasma, organic substances on the surface of the silicon wafer and / or the insulating substrate are oxidized and removed, and OH groups on the surface are increased and activated. It is more preferable that the treatment is performed with respect to both the surface of the silicon wafer and the surface of the insulating substrate, but either of them may be performed.

As a method of surface activation treatment, ozone water treatment, UV ozone treatment or ion beam treatment may be performed instead of the plasma treatment.

In the case of treating with ozone water, it can be realized by immersing the wafer in pure water in which about 10 mg / L of ozone is dissolved.

In the case of treatment with UV ozone, it is possible to conduct ozone gas or ozone gas produced from the atmosphere by irradiating UV light (for example, with a wavelength of 185 nm).

In the case of treating with an ion beam, it is possible to increase the bonding force by exposing untouched hands of the surface by treating the surface of the wafer with a beam of an inert gas such as argon, under a high vacuum as in the sputtering method.

It is more preferable that the above-mentioned four treatments are performed for both of the ion-implanted surface of the silicon wafer and the bonded surface of the insulating substrate, but either of them may be performed.

The mechanism of increasing the bonding force by these surface activation has not been completely clarified, but can be explained as follows.

In the case of ozone water treatment or UV ozone treatment, organic substances on the surface of a silicon wafer or an insulating substrate are decomposed by ozone, and activation is performed by increasing OH groups on the surface. On the other hand, the ion beam treatment, the plasma treatment, and the like are activated by exposing unreacted hands (dangling bonds) having high reactivity on the wafer surface or by imparting OH groups to unbonded hands thereof.

The confirmation of the surface activation can be confirmed by observing the degree of hydrophilicity (wettability). Specifically, water can be easily dropped by dropping water on the wafer surface and measuring the contact angle (contact angle) thereof.

The diameter of the silicon wafer to be used is preferably 100 mm to 200 mm, and the thickness is preferably 500 μm to 1500 μm, but is not particularly limited.

The surface roughness Rq of the surface of the silicon wafer or the insulating substrate according to JIS R 1683: 2007 is preferably 0.5 nm or less. If it exceeds 0.5 nm, the bonding itself may not proceed.

In the present specification, the root mean square roughness [Rq] is a value obtained on the basis of an AFM image.

The surface of the silicon wafer and the surface of the insulating substrate, or both surfaces of the silicon wafer, are brought into close contact with each other at a temperature of more than 50 ° C and less than 300 ° C with a plasma treated surface as a bonding surface. The bonding temperature in the bonding step is usually room temperature (about 25 占 폚), but the stress represented by the formula (1) can be reduced by setting this temperature to a temperature higher than 50 占 폚, which is higher than usual. The preferable lower limit of the fusion temperature is 60 ° C, 70 ° C, 80 ° C and 90 ° C, and preferable upper limits are 290 ° C, 280 ° C, 270 ° C and 260 ° C.

It is preferable that the bonding step is performed by heating both sides of the insulating substrate and the silicon wafer or only the insulating substrate side with a hot plate, and the time for performing the bonding is about 1 to 10 minutes.

The wafer bonded in this way can be cooled to room temperature for transfer mounting to a subsequent heat treatment apparatus. If the bonding temperature exceeds 300 ° C, the substrate may be broken when returned to room temperature.

However, it is also possible to proceed to the next heat treatment step without cooling to the room temperature after the compounding step. In the case of proceeding to the heat treatment step as it is, the heating rate is preferably 0 ° C / min to 5 ° C / min, and the temperature difference between the bonding temperature and the heat treatment temperature is preferably 50 ° C to 150 ° C. If the temperature difference is less than 50 占 폚, the bonding force between the adhesion surfaces may become insufficient due to the lack of temperature. If the temperature difference is 150 占 폚 or more, there is a possibility that the substrate may be cracked due to warping.

In the present invention, the heat treatment is performed at a temperature of 200 ° C or higher and 350 ° C or lower. The heat treatment is carried out for a time ranging from 1 hour to 100 hours, for example, depending on the treatment temperature, to such an extent that the bonding interface becomes solid.

Thinning is performed after the heat treatment. As a thinning method, there are a method (1) in which a hydrogen ion is implanted into a donor wafer in advance to form a hydrogen ion-implanted interface before the bonding, and a shock is applied to the hydrogen ion implantation interface after the bonding to mechanically peel the bonded wafer, And a method (2) in which the silicon wafer side of the wafer is thinned by a combination of grinding, etching, and polishing.

In the hydrogen ion implantation stripping method, there is a method in which the bonded wafer is subjected to heat treatment at about 500 캜 under an inert gas atmosphere, and heat separation is carried out by the effect of rearrangement of crystals and bubble flocculation effect of injected hydrogen. 1), mechanical detachment is effected by impacting the hydrogen ion implantation interface, so that there is no possibility that thermal deformation, cracking, peeling of the bonding surface or the like occurs due to heating.

The ion implantation interface is formed in the silicon wafer. At this time, for example, the temperature of the silicon wafer is set to 250 to 450 DEG C, and hydrogen ions of a predetermined dose are implanted into the surface of the silicon wafer at an implantation energy capable of forming the ion implantation layer at a desired depth from the surface thereof. As a condition at this time, for example, the implantation energy may be 50 to 100 keV.

The dose amount of the hydrogen ions (H ⁺ ) to be implanted into the silicon wafer is preferably 3.0 × 10 ¹⁶ / cm ² to 1.0 × 10 ¹⁷ / cm ² . If it is less than 3.0 x 10 ¹⁶ / cm ² , the transfer separation at the ion implantation interface may become impossible. If it exceeds 1.0 × 10 ¹⁷ / cm ² , the injection interface may become weak during the heat treatment and the substrate may be cracked. A more preferable dose amount is 5.0 x 10 < ¹⁶ > / cm < ^{2 &} gt ;. When the hydrogen molecule ion (H ₂ ⁺ ) is used as the implantation ion, the dose is preferably 1.5 × 10 ¹⁶ / cm ² to 5.0 × 10 ¹⁶ / cm ² . If it is less than 1.5 x 10 ¹⁶ / cm ² , the transfer separation at the ion implantation interface may become impossible. If it exceeds 5.0 × 10 ¹⁶ / cm ² , the injection interface may become weak during the heat treatment and the substrate may be broken. A more preferable dose amount is 2.5 x 10 < ¹⁶ > / cm < ^{2 &} gt ;.

Further, when an insulating film such as a silicon oxide film of 50 nm to 500 nm is formed in advance on the surface of a silicon wafer and hydrogen ion implantation is carried out through this, an effect of suppressing channeling of implanted ions can be obtained.

In order to impact the ion implantation interface, it may be sprayed continuously or intermittently from the side of a wafer to which a jet of a fluid such as gas or liquid is bonded, but it is not particularly limited as long as it is a method in which mechanical separation takes place by impact .

Since the method (2) does not include the ion implantation step, it can be said that it is a simpler method as compared with the method (1). However, since the thin film is formed by grinding, etching, polishing or the like, the film thickness variation of the silicon thin film layer may be larger than the method (1). When the bonding temperature is high, there is a problem that grinding becomes difficult due to bending of the substrate when returned to room temperature, but implementation is possible.

As the etching solution used for etching, at least one alkali solution selected from the group consisting of KOH, NH ₃ , NaOH, CsOH and NH ₄ OH can be used. The etching solution may include at least one organic solvent selected from the group consisting of ethylene diamine pyrocatecholate, tetramethylammonium hydroxide, and hydrazine. In general, the organic solvent is suitable when it is necessary to control the etching amount accurately because the etching rate is slow compared with the alkali solution.

The final film thickness of the silicon thin film layer is not particularly limited, but may be 50 nm to 500 nm.

In the method of manufacturing a bonded wafer according to the present invention, any of a quartz substrate, a sapphire substrate, an alumina or a glass substrate can be used as an insulating substrate. Among them, a difference in thermal expansion coefficient from the silicon thin film layer is remarkable, Or the like is easily generated during the process, or an alumina wafer (amorphous) whose composition is the same as that of sapphire is used.

The bonded wafer obtained by the method for producing a bonded wafer according to the present invention is particularly suitable for the production of a substrate for an electro-optical device such as a liquid crystal device because a silicon thin film layer is formed on an insulating substrate.

A silicon wafer having a diameter of 150 mm and a thickness of 625 占 and sapphire wafers (manufactured by Kyocera Corporation) grown in advance of an oxide film of 200 nm in advance were placed, and plasma activation treatment was applied to both surfaces of the wafer. The kneading temperatures at this time were changed to 50 ° C, 100 ° C, 150 ° C, 200 ° C, 250 ° C and 300 ° C. After the bonding, the wafer was once returned to the room temperature, and the wafer was loaded into the quartz boat to perform the heat treatment, and the wafer was subjected to heat treatment at 250 DEG C for 24 hours. The situation of wafer cracking by a series of experiments was as shown in Fig. The results of the bonded wafer after the heat treatment are shown in Table 1. As a result of observing the silicon layer of the remaining four substrates with KOH (10 wt% at 70 DEG C) and mirror-polishing (CMP polishing) with an optical microscope, Was not observed.

It can be seen from Table 1 and Fig. 2 that the wafer S1 cracked due to the stress at the time of the heat treatment (S3) due to the insufficient heating (S1) at 50 deg. When the temperature was raised to 300 캜, it was considered that the wafer was broken due to the stress of (S2) when it was returned to room temperature.

Pre-oxide film of 200 nm growth in which the diameter 150 mm, separation by preparing a silicon wafer having a thickness of 625 μm and, implanting hydrogen ions (H ⁺⁾ from the oxide film surface side to the implantation energy 60 keV, a dose of 5.0 × 10 ¹⁶ / cm ² I made an interface.

A silicon wafer and a sapphire wafer having the peeling interface were placed in a vacuum chamber, and plasma activation treatment was applied to both surfaces of the vacuum chamber and the surface of the vacuum chamber.

Both wafers were bonded on a hot plate at 200 DEG C and then subjected to heat treatment at 250 DEG C for 24 hours. A mechanical impact was applied to the hydrogen ion implantation interface from the side surface of the wafer, and peeling was performed along the interface. The thickness of the transferred silicon layer was 400 nm, and defects such as cracks were not observed.

Pre-oxide film of 200 nm growth in which the diameter 150 mm, separation by preparing a silicon wafer having a thickness of 625 μm and, implanting hydrogen ions (H ⁺⁾ from the oxide film surface side to the implantation energy 60 keV, a dose of 5.0 × 10 ¹⁶ / cm ² I made an interface.

A silicon wafer and a sapphire wafer having the peeling interface were placed in a vacuum chamber, and both surfaces were subjected to ozonated water treatment, UV ozone treatment, ion beam treatment, and plasma activation treatment to be bonded. Four kinds of samples different in kind of activation were produced.

As the bonding method, bonding was carried out at 200 캜 in a heating atmosphere, followed by heat treatment at 250 캜 for 24 hours. A mechanical impact was applied to the hydrogen ion implantation interface from the side surface of the wafer, and peeling was performed along the interface. The thickness of the transferred silicon layer was 400 nm, and defects such as cracks were not observed. There was no significant difference between the four kinds of samples, and it was found that the quality of the transfer membrane was not dependent on the type of activation.

S1 warm fusion process
S2 cooling process
S3 heat treatment process
S4 Silicon thinning process
1 Silicon wafer
2 Surface of silicon wafer
3 insulating substrate
4 Surface of insulating substrate
5 bonded wafer
7 bonded wafer

Claims (10)

A method for producing a bonded wafer by forming a silicon thin film layer on a surface of an insulating substrate,
A step of performing a surface activation treatment on the surface of a silicon wafer coated with a silicon wafer or an oxide film and both surfaces or one surface of the surface of the insulating substrate,
A step of bonding the surfaces to each other under a temperature atmosphere of more than 50 ° C but less than 300 ° C,
A step of raising the temperature and applying a heat treatment at 200 캜 or higher and 350 캜 or lower after the above-
And a step of forming a silicon thin film layer by thinning the silicon wafer side by a combination of grinding, etching, and polishing, in this order,
Wherein a difference between a temperature of the bonding step and a temperature of the step of applying the heat treatment is 50 to 150 ° C. The method of manufacturing a bonded wafer according to claim 1, wherein the surface activation is performed by any one of ozone water treatment, UV ozone treatment, ion beam treatment, and plasma treatment, or a combination thereof. The method according to claim 1 or 2, wherein the insulating substrate is a sapphire or alumina wafer. The method of manufacturing a bonded wafer according to claim 1 or 2, wherein the bonding step is performed by heating both sides of the insulating substrate and the silicon wafer or only the insulating substrate side on a hot plate. The etching solution according to claim 1 or 2, wherein the etching solution used for the etching comprises at least one alkaline solution selected from the group consisting of KOH, NH ₃ , NaOH, CsOH and NH ₄ OH. ≪ / RTI > The etching solution according to claim 1 or 2, characterized in that the etching solution used for the etching includes at least one organic solvent selected from the group consisting of ethylenediamine pyrocatechol (water), tetramethylammonium hydroxide and hydrazine Wherein the method comprises the steps of: 3. The method according to claim 1 or 2, wherein the surface roughness of the silicon wafer or the insulating substrate before the bonding is 0.5 nm or less. delete delete delete

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