KR101539715B1 - Apparatus and method for measuring coupling delay of through substrate via - Google Patents

Abstract

The present invention relates to an apparatus and a method for measuring interference delay of a through an electrode. According to the present invention, the apparatus thereof is capable of measuring interference delay of through electrodes for transmitting a signal between stacked dies of a three dimensional semiconductor. Provided is the apparatus for measuring interference delay of a through electrode comprising: a chain generation part to divide through electrodes into a plurality of groups based on a first through electrode determined among the through electrodes, and to connect the through electrodes in each of a plurality of groups by a chain structure; and an interference delay measurement part to measure the sub-interference delay time between the through electrodes connected by the chain structure by each of a plurality of groups, and to measure the interference delay time of the through electrodes by using the sub-interference delay time measured by each of a plurality of groups.

Description

[0001] APPARATUS AND METHOD FOR MEASURING COUPLING DELAY OF THROUGH SUBSTRATE VIA [0002]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an apparatus and a method for measuring an interference delay time of a through substrate via, The present invention relates to an apparatus and a method for measuring an interference delay time of an antenna.

With the development of electronic devices requiring faster speed and larger data capacity, the limitations of two-dimensional circuits have become increasingly apparent. In order to solve this problem, a three-dimensional semiconductor that stacks chips in layers has developed. Through silicon vias (TSVs) that connect between chip and chip layers stacked in three-dimensional semiconductors have been increasingly used, and the number of through silicon vias increases as the amount of data transfer between chip and chip increases. . This results in an increase in the interference delay time between the penetrating silicon vias.

Several methods for testing through silicon vias have been studied with the use of three-dimensional semiconductors. Among them, predicting and testing the interference delay time is essential in environments where the through silicon vias are used heavily. Conventional modeling techniques for predicting interference delay time usually only model the interference delay between two or three through silicon vias, and it is difficult to predict the interference delay time of the entire chip.

In Shield-US and 3d-lat methods, we proposed a coding scheme to measure and minimize the interference delay time in the through silicon vias based on the 3X3 and 3XN grid array. However, this method assumes that the lattice type arrangement, that is, all the through silicon vias are arranged at the same interval, and therefore, when the through silicon vias are arranged irregularly, there is a large error.

The present invention accurately predicts the total interference delay of the through electrodes of the three-dimensional semiconductor and adjusts the signal transmission rate between the stacked dies of the three-dimensional semiconductor by controlling the signals of the through electrodes to minimize the interference delay based on the delay. And an operation error of the three-dimensional semiconductor can be reduced, and an object of the present invention is to provide an apparatus and method for measuring an interference delay of a through electrode.

The problems to be solved by the present invention are not limited to the above-mentioned problems. Other technical subjects not mentioned will be apparent to those skilled in the art from the description below.

An apparatus for measuring an interference delay of a through electrode according to an aspect of the present invention is an apparatus for measuring an interference delay of through electrodes for transmitting a signal between stacked dies of a three-dimensional semiconductor, A chain generating unit that divides the penetrating electrodes into a plurality of groups and associates the penetrating electrodes of each of the plurality of groups in a chain structure; And measuring an interference delay time of the through electrodes by measuring a sub interference delay time between the through electrodes associated with the chain structure in each of the plurality of groups and measuring the interference delay time of the through electrodes using the sub- .

In one embodiment of the present invention, the interference delay measurement unit may include: a sub-interference delay measurement unit for measuring a sub-interference delay time between the through electrodes associated with the chain structure for each of the plurality of groups; An individual interference delay measuring unit for measuring individual interference delay times for the first penetrating electrodes from the measured sub-interference delay times for the plurality of groups; And a total interference delay measuring unit for measuring an interference delay time of the penetrating electrodes from the individual interference delay time measured for each of the penetrating electrodes.

In one embodiment of the present invention, the individual interference delay measuring unit may measure the individual interference delay time according to Equation (1) below.

[Formula 1]

In the formula 1, Delay _VICTIM is the individual interference delay, N _CHAIN is the number of groups, a _i are predetermined process parameters, d _i is the distance between adjacent through-electrode is associated with the chain structure, delay _i are the sub-interference delay .

In an embodiment of the present invention, the apparatus for measuring an interference delay of the penetrating electrode may further include a coding changing unit for exchanging signal coding of the penetrating electrodes so that the interference delay time is minimized by using a random quenching technique.

In one embodiment of the present invention, the chain generator may divide the penetrating electrodes into the plurality of groups based on an angle set around the first penetrating electrode.

In an embodiment of the present invention, the chain generating unit may associate the through electrodes belonging to each group in the chain structure based on the distance from the first penetrating electrode.

According to another aspect of the present invention, there is provided a method of measuring an interference delay time of through electrodes for transmitting signals between stacked dies of a three-dimensional semiconductor, the method comprising: And associating the through electrodes of each of the plurality of groups in a chain structure; And measuring a sub-interference delay time between the through electrodes associated with the chain structure for each of the plurality of groups and measuring an interference delay time of the through electrodes using the sub-interference delay time measured for each of the plurality of groups A method of measuring an interference delay of a penetrating electrode is provided.

In one embodiment of the present invention, the step of measuring the interference delay time includes: measuring a sub-interference delay time between the through electrodes associated with the chain structure for each of the plurality of groups; Measuring an individual interference delay time for the first penetrating electrode from the measured sub-interference delay times for the plurality of groups; And measuring an interference delay time of the penetrating electrodes from the individual interference delay time measured for each of the penetrating electrodes.

In one embodiment of the present invention, the method for measuring the interference delay of the penetrating electrode may further include exchanging signal coding of the penetrating electrodes so that the interference delay time is minimized using a random quenching technique.

In one embodiment of the present invention, the step of associating the penetrating electrodes with a chain structure may divide the penetrating electrodes into the plurality of groups based on an angle set around the first penetrating electrode.

In one embodiment of the present invention, the step of associating the penetrating electrodes with a chain structure may relate the penetrating electrodes belonging to each group to the chain structure based on the distance from the first penetrating electrode.

According to another aspect of the present invention, there is provided a computer-readable recording medium having recorded thereon a program for executing a method of measuring an interference delay of the penetrating electrode.

According to the embodiment of the present invention, the total interference delay of the through electrodes of the three-dimensional semiconductor is precisely predicted, and the signals of the through electrodes are adjusted through the coding technique so that the interference delay is minimized, The signal transmission speed can be improved, and the operation error of the three-dimensional semiconductor can be reduced.

The effects of the present invention are not limited to the effects described above. Unless stated, the effects will be apparent to those skilled in the art from the description and the accompanying drawings.

FIG. 1 is a configuration diagram illustrating an apparatus for measuring an interference delay of a through electrode according to an embodiment of the present invention. Referring to FIG.
2 is a configuration diagram of an interference delay measuring unit constituting an apparatus for measuring an interference of a through electrode according to an embodiment of the present invention.
3 is a flowchart of a method of measuring an interference delay of a penetrating electrode according to an embodiment of the present invention.
FIG. 4 is a flow chart showing step S20 of FIG. 3 in more detail.
5 is a flowchart illustrating a method of measuring an interference delay of a penetrating electrode according to an exemplary embodiment of the present invention.
6 is a view showing an example of forming a chain of through electrodes according to an embodiment of the present invention.
7 is a schematic view showing an example of forming a chain of through electrodes according to an embodiment of the present invention.
FIGS. 8A and 8B are diagrams for explaining a coding technique of the penetrating electrode, FIG. 8A shows a state before a coding is changed, and FIG. 8B shows a state after a coding is changed.

Other advantages and features of the present invention and methods of achieving them will be apparent by referring to the embodiments described hereinafter in detail with reference to the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, and the present invention is only defined by the scope of the claims. Although not defined, all terms (including technical or scientific terms) used herein have the same meaning as commonly accepted by the generic art in the prior art to which this invention belongs. A general description of known configurations may be omitted so as not to obscure the gist of the present invention. In the drawings of the present invention, the same reference numerals are used as many as possible for the same or corresponding configurations. To facilitate understanding of the present invention, some configurations in the figures may be shown somewhat exaggerated or reduced.

The terminology used in this application is used only to describe a specific embodiment and is not intended to limit the invention. The singular expressions include plural expressions unless the context clearly dictates otherwise. In the present application, the terms "comprises", "having", or "having" are intended to specify the presence of stated features, integers, steps, operations, components, Steps, operations, elements, parts, or combinations thereof, whether or not explicitly described or implied by the accompanying claims.

Used throughout this specification may refer to a hardware component such as, for example, software, FPGA or ASIC, as a unit for processing at least one function or operation. However, "to" is not meant to be limited to software or hardware. &Quot; to " may be configured to reside on an addressable storage medium and may be configured to play one or more processors.

As an example, the term '~' includes components such as software components, object-oriented software components, class components and task components, and processes, functions, attributes, procedures, Routines, segments of program code, drivers, firmware, microcode, circuitry, data, databases, data structures, tables, arrays, and variables. The functions provided by the components and components may be performed separately by a plurality of components and components, or may be integrated with other additional components.

An apparatus for measuring the interference delay of a through substrate via according to an embodiment of the present invention measures coupling delay of through electrodes for transmitting signals between stacked dies of a three- A plurality of groups of through electrodes are grouped into a plurality of groups and a plurality of groups of through electrodes are associated with each other in a chain structure and then a sub-interference delay time between sub- and the interference delay time of all the through electrodes is measured by using the sub-interference delay time measured for a plurality of groups.

FIG. 1 is a configuration diagram showing an apparatus 100 for measuring an interference of a through electrode according to an embodiment of the present invention. 1, an apparatus 100 for measuring an interference delay of a through electrode according to an embodiment of the present invention measures an interference delay time of through electrodes for transmitting a signal between stacked dies of a three-dimensional semiconductor, An interference delay measuring unit 140, a coding changing unit 160, and a memory 180. [ In one embodiment, the penetrating electrode may be provided as a through silicon-via (TSV).

The chain generating unit 120 divides the through electrodes into a plurality of groups based on the first through electrode determined among the through electrodes, and associates the through electrodes of each of the plurality of groups in a chain-like structure. In one embodiment, the chain generating unit 120 may group all the penetrating electrodes into a plurality of groups based on an angle set around the first penetrating electrode. The chain generating unit 120 may associate the penetrating electrodes belonging to each group in a chain structure based on the distance from the first penetrating electrode.

The interference delay measurement unit 140 measures a sub-interference delay time between the through electrodes associated with a plurality of groups in a chain structure, and measures an interference delay time of the through electrodes using the sub-interference delay time measured for each of a plurality of groups . 2 is a configuration diagram of an interference delay measuring unit 140 constituting an apparatus for measuring an interference of a through electrode according to an embodiment of the present invention. 1 and 2, the interference delay measurement unit 140 may include a sub-interference delay time measurement unit 142, a separate interference delay time measurement unit 144, and a total interference delay time measurement unit 146 have.

The sub-interference delay time measuring unit 142 measures a sub-interference delay time between the through electrodes associated with a plurality of groups in a chain structure. The individual interference delay time measuring unit 144 measures the individual interference delay time for the first penetrating electrode from the measured sub-interference delay times for the plurality of groups. The total interference delay time measuring unit 146 measures the interference delay time of the through electrodes from the individual interference delay time measured for each of the penetrating electrodes by the individual interference delay time measuring unit 144.

In one embodiment, the individual interference delay time measuring unit 144 can measure the individual interference delay time according to Equation (1) below.

[Equation 1]

In Equation 1 above, Delay _VICTIM the chain in the first through-individual interference delay time of the electrodes, N _CHAIN is the number of groups classified based on the first through-electrode, a _i are predetermined process parameters, d _i is the group And delay _i represents the sub-interference delay time calculated for one group.

The sub-interference delay time can be calculated, for example, according to the following equation (2).

[Equation 2]

In Equation 2, '1' is the number of penetrating electrodes having opposite signals found while searching for the chain, and 'd _i ' is the distance between the penetrating electrodes having opposite signals. For example, a through electrode where the signal to be transmitted is changed from a logic '0' value to a logic '1' value and a through electrode whose transmitting signal is changed from a logic '1' value to a logic '0' Which corresponds to a penetrating electrode having a signal. According to Equation (2), the sub-interference delay time appears in inverse proportion to the distance between the penetrating electrodes having opposite signals.

Referring again to FIG. 1, the coding change unit 160 may exchange signal coding of the through electrodes so that the interference delay time is minimized by using a random simulated annealing technique. The functions of the chain generating unit 120, the interference delay measuring unit 140, and the coding changing unit 160 may be executed by at least one processor. The memory 180 stores programs and various information necessary for the interference delay measurement.

According to the embodiment of the present invention, it is possible to calculate the interference delay time for all the penetrating electrodes existing in the entire three-dimensional semiconductor chip, and to predict the interference delay time which is almost equal to the actual value. In addition, the interference delay time can be reduced by exchanging the signals of the penetrating electrodes through the coding technique so as to minimize the interference delay time, thereby improving the signal transmission speed between the stacked dies of the three-dimensional semiconductor, Can be reduced.

3 is a flowchart of a method of measuring an interference delay of a penetrating electrode according to an embodiment of the present invention. 1 and 3, the chain generating unit 120 divides the penetrating electrodes into a plurality of groups with reference to the first penetrating electrode determined among the penetrating electrodes, and connects the penetrating electrodes of the plurality of groups in a chain structure The associating step is performed (S10). That is, when the number, the position, and the signal of the penetrating electrodes are determined, they constitute a chain for binding the penetrating electrodes.

In one embodiment of the present invention, in the step of associating the penetrating electrodes in a chain structure (S10), the chain generating unit 120 generates a plurality of penetrating electrodes based on the first through penetrating electrode, The through electrodes can be divided into a plurality of groups. In one embodiment of the present invention, the step of associating the penetrating electrodes in a chain structure (S10) may associate the penetrating electrodes belonging to each group in a chain structure based on the distance from the first penetrating electrode in the group. For example, the penetrating electrodes in the group are connected in a chain structure according to the distance from the first penetrating electrode.

In step S10, if the through electrodes are associated with a plurality of groups in a chain structure, the interference delay measuring unit 140 calculates the interference delay time according to the chain structure for each group. That is, a step of measuring a sub-interference delay time between through electrodes associated with a chain structure for a plurality of groups and measuring an interference delay time of the through electrodes using the sub-interference delay time measured for each of a plurality of groups (S20 ).

FIG. 4 is a flow chart showing step S20 of FIG. 3 in more detail. Referring to FIG. 3 and FIG. 4, step S20 includes measuring a sub-interference delay time between through electrodes associated with a plurality of groups in a chain structure (S22); Measuring (S24) the individual interference delay time for the first penetrating electrode from the measured subinterference delay times for the plurality of groups; And measuring an interference delay time of the penetrating electrodes from the measured individual interference delay times for each of the penetrating electrodes (S26).

Referring again to FIGS. 1 and 3, when the interference delay time is measured in step S20, exchange of signal coding of the penetrating electrodes is performed by the coding changing unit 160 using the random quenching technique so that the interference delay time is minimized (S30). That is, in order to minimize the interference delay time calculated using the chain structure of the penetrating electrode, the coding change unit 160 uses a random quenching technique and applies a coding technique to satisfy the case where the interference delay time is minimized The through electrodes are switched to change the path of the transmission signal.

According to the embodiment of the present invention, it is possible to accurately predict the interference delay time occurring between the through electrodes in consideration of all the through electrodes in the entire chip, and to change the coding of the through electrodes so that the interference delay time is minimized, It is possible to reduce an error caused by interference delay in operation. Embodiments of the present invention can be used to measure the interference delay of penetrating electrodes such as through silicon vias used in various three-dimensional semiconductors such as three-dimensional memory.

The interference delay measurement method of the through electrode according to the embodiment of the present invention can be realized by a general-purpose digital computer which can be formed into a program that can be executed by a computer, for example, and which operates the program using a computer- . The computer readable recording medium may be a volatile memory such as SRAM (Static RAM), DRAM (Dynamic RAM), SDRAM (Synchronous DRAM), ROM (Read Only Memory), PROM (Programmable ROM), EPROM (Electrically Programmable ROM) Non-volatile memory such as EEPROM (Electrically Erasable and Programmable ROM), flash memory device, Phase-change RAM (PRAM), Magnetic RAM (MRAM), Resistive RAM (RRAM), Ferroelectric RAM But are not limited to, optical storage media such as CD ROMs, DVDs, and the like.

5 is a flowchart illustrating a method of measuring an interference delay of a penetrating electrode according to an exemplary embodiment of the present invention. 1 and 5, in consideration of the number of the through electrodes used in the three-dimensional semiconductor, the through electrodes are initialized, the positions of the through electrodes are set, and the input signals are analyzed (S51, S52, S53). Next, the chain generating unit 120 forms a chain for weaving through electrodes in units of groups (S54). When all the through electrodes in the group are connected in a chain structure (S55), the interference delay measuring unit 140 calculates the interference delay time according to the chain structure (S54 to S56).

Step S54 will be described in more detail. In order to measure the interference delay time of the penetrating electrode in consideration of all the penetrating electrodes included in the entire chip, it is necessary to chain the penetrating electrodes. FIG. 6 is a view illustrating an example of a chain of through electrodes according to an embodiment of the present invention, and FIG. 7 is a schematic view showing an example of forming a chain of through electrodes according to an embodiment of the present invention. In FIG. 6, the penetrating electrode is shown as a small square node, and the penetrating electrode in FIG. 7 is shown as a circular node.

Referring to Fig. 7, for example, the first penetrating electrode T1 is a starting node to start the chain configuration. At this time, the next penetrating electrode nodes (T2, T3, T4) (T5, T6, T7) to be extended from the node of the first penetrating electrode T1 are selected according to a certain angle. The number is determined. A total of eight chains are formed when the range of angles extending from the first penetrating electrode T1 is determined to be 45, and a total of four chains are formed when the angle range is determined to be 90 deg. After the chain is formed from the first through-hole electrode T1 to the next through-electrode node, the corresponding node also selects the next through-electrode node according to the same method at a predetermined angle to form a chain. When constructing a chain, the influence of the interference delay can be accurately calculated by preventing the existence of other through electrode nodes between the two adjacent through electrode nodes to be connected.

Referring again to FIGS. 1 and 5, the coding change unit 140 changes the signal of the penetrating electrode by applying a coding technique so that the interference delay time calculated through the chain of the penetrating electrodes is minimized by using the random quenching technique If the optimal solution is determined for all the penetrating electrodes, the result is stored (S57 to S60). FIGS. 8A and 8B are diagrams for explaining a coding technique of the penetrating electrode, FIG. 8A shows a state before a coding is changed, and FIG. 8B shows a state after a coding is changed.

8A and 8B, the penetrating electrode is shown as a circular node. The value in the node means the initial signal value of the penetrating electrode. When the signal value in the node is 'R', the signal value of the through electrode transits from a low level (logic '0') to a high level (logic '1'), and 'F' '0' and '1' indicate that the signal is maintained as '0' or '1', respectively.

The interference delay time of the penetrating electrode has the largest value when the signals of the peripheral through electrodes are opposite to each other. Therefore, when the through electrode corresponding to the 'R' signal and the through electrode corresponding to the 'F' signal are close to each other, the interference delay time of the through electrode is increased. In FIG. 8A, the penetrating electrode shown in the shaded area has an F value, and the penetrating electrode having two 'R' values is located in the periphery, so that the interference delay time of the penetrating electrode has a very high value.

However, when the signal coding of the penetrating electrodes is changed using the coding technique and the signal values of the penetrating electrodes are exchanged as shown in FIG. 8B, the penetrating electrode Ta having the 'R' signal and the penetrating electrode Tb are far away from each other. Therefore, compared with the case of FIG. 8A, the interference delay time can be reduced while transmitting the same signal as a whole. By applying the coding technique to minimize the interference delay time using this principle, the operation delay and error of the three-dimensional semiconductor can be reduced. For example, an example of an algorithm for applying a coding technique using a simulated annealing is as follows.

begin
Get moment initial coupling delay  S;
while reach  " predicting optimum " do
for  1 < = i < = P do
Pick two random TSVs which have different signal
Calculate modified TSV coupling delay  S
      △ ← cost ( S ' ) - cost (S);
if   <= 0 then save the result
if   > 0 then save the result
result update
return    S
end

If the interference delay time of the penetrating electrodes is close to a predetermined predicting optimum, the algorithm is terminated. The corresponding value is selected by randomly selecting two penetrating electrodes, exchanging the corresponding values, , And stores the resultant value. According to the embodiment of the present invention, the interference delay time considering all the through electrodes in the entire chip can be predicted even when the through silicon vias are irregularly arranged. Also, by exchanging signals through changing the coding of the penetrating electrodes, the interference delay time can be minimized, the signal transmission speed between the stacked dies of the three-dimensional semiconductor can be improved, and the operation error of the three-dimensional semiconductor can be reduced.

It is to be understood that the above-described embodiments are provided to facilitate understanding of the present invention, and do not limit the scope of the present invention, and it is to be understood that various modifications are possible within the scope of the present invention. It is to be understood that the technical scope of the present invention should be determined by the technical idea of the claims and the technical scope of protection of the present invention is not limited to the literary description of the claims, The invention of the present invention.

100: Interference delay measuring device of penetrating electrode
120: chain generation unit
140: interference delay measuring unit
142: sub-interference delay time measuring unit
144: Individual interference delay time measuring unit
146: total interference delay time measuring unit
160: Coding change section
180: Memory

Claims (12)

An apparatus for measuring an interference delay of through electrodes for transmitting signals between stacked dies of a three-dimensional semiconductor,
A chain generating unit that divides the through electrodes into a plurality of groups with respect to a first through electrode determined among the through electrodes and associates the through electrodes of each of the plurality of groups in a chain structure; And
An interference delay measurement unit for measuring a sub-interference delay time between the through electrodes associated with the chain structure for each of the plurality of groups and measuring an interference delay time of the through electrodes using the sub-interference delay time measured for each of the plurality of groups, Including,
Wherein the interference delay measurement unit comprises:
A sub-interference delay measuring unit for measuring a sub-interference delay time between the through electrodes associated with the chain structure for each of the plurality of groups;
An individual interference delay measuring unit for measuring individual interference delay times for the first penetrating electrodes from the measured sub-interference delay times for the plurality of groups; And
And a total interference delay measuring unit measuring an interference delay time of the penetrating electrodes from the individual interference delay time measured for each of the penetrating electrodes. delete The method according to claim 1,
Wherein the individual interference delay measurement unit measures the individual interference delay time according to Equation (1) below,
[Formula 1]

In the formula 1, Delay _VICTIM is the individual interference delay, N _CHAIN is the number of groups, a _i are predetermined process parameters, d _i is the distance between adjacent through-electrode is associated with the chain structure of the group, delay _i are the sub- An apparatus for measuring an interference delay of a penetrating electrode which indicates an interference delay time. An apparatus for measuring an interference delay of through electrodes for transmitting signals between stacked dies of a three-dimensional semiconductor,
A chain generating unit that divides the through electrodes into a plurality of groups with respect to a first through electrode determined among the through electrodes and associates the through electrodes of each of the plurality of groups in a chain structure;
An interference delay measurement unit for measuring a sub-interference delay time between the through electrodes associated with the chain structure for each of the plurality of groups and measuring an interference delay time of the through electrodes using the sub- ; And
And a coding change unit for exchanging signal coding of the penetrating electrodes so that the interference delay time is minimized using a random quenching technique. An apparatus for measuring an interference delay of through electrodes for transmitting signals between stacked dies of a three-dimensional semiconductor,
A chain generating unit that divides the through electrodes into a plurality of groups with respect to a first through electrode determined among the through electrodes and associates the through electrodes of each of the plurality of groups in a chain structure; And
An interference delay measurement unit for measuring a sub-interference delay time between the through electrodes associated with the chain structure for each of the plurality of groups and measuring an interference delay time of the through electrodes using the sub-interference delay time measured for each of the plurality of groups, Including,
Wherein the chain generating unit divides the penetrating electrodes into the plurality of groups based on an angle set around the first penetrating electrode. An apparatus for measuring an interference delay of through electrodes for transmitting signals between stacked dies of a three-dimensional semiconductor,
A chain generating unit that divides the through electrodes into a plurality of groups with respect to a first through electrode determined among the through electrodes and associates the through electrodes of each of the plurality of groups in a chain structure; And
An interference delay measurement unit for measuring a sub-interference delay time between the through electrodes associated with the chain structure for each of the plurality of groups and measuring an interference delay time of the through electrodes using the sub-interference delay time measured for each of the plurality of groups, Including,
Wherein the chain generating unit associates the penetrating electrodes belonging to each group in the chain structure based on the distance from the first penetrating electrode. A method for measuring an interference delay of a through electrode that transmits a signal between stacked dies of a three-dimensional semiconductor,
Dividing the penetrating electrodes into a plurality of groups based on a first penetrating electrode determined among the penetrating electrodes, and associating the penetrating electrodes of each of the plurality of groups in a chain structure; And
Measuring a sub-interference delay time between the through electrodes associated with the chain structure for each of the plurality of groups, and measuring an interference delay time of the through electrodes using the sub-interference delay time measured for each of the plurality of groups ,
Wherein the measuring the interference delay time comprises:
Measuring a sub-interference delay time between the through electrodes associated with the chain structure for each of the plurality of groups;
Measuring an individual interference delay time for the first penetrating electrode from the measured sub-interference delay times for the plurality of groups; And
And measuring an interference delay time of the penetrating electrodes from the measured individual interference delay times for each of the penetrating electrodes. delete A method for measuring an interference delay of a through electrode that transmits a signal between stacked dies of a three-dimensional semiconductor,
Dividing the penetrating electrodes into a plurality of groups based on a first penetrating electrode determined among the penetrating electrodes, and associating the penetrating electrodes of each of the plurality of groups in a chain structure;
Measuring a sub-interference delay time between the through electrodes associated with the chain structure for each of the plurality of groups, and measuring an interference delay time of the through electrodes using the sub-interference delay time measured for each of the plurality of groups; And
And replacing the signal coding of the penetrating electrodes so that the interference delay time is minimized using a random quenching technique. A method for measuring an interference delay of a through electrode that transmits a signal between stacked dies of a three-dimensional semiconductor,
Dividing the penetrating electrodes into a plurality of groups based on a first penetrating electrode determined among the penetrating electrodes, and associating the penetrating electrodes of each of the plurality of groups in a chain structure; And
Measuring a sub-interference delay time between the through electrodes associated with the chain structure for each of the plurality of groups, and measuring an interference delay time of the through electrodes using the sub-interference delay time measured for each of the plurality of groups ,
Wherein the step of associating the penetrating electrodes with the chain structure divides the penetrating electrodes into the plurality of groups based on an angle set around the first penetrating electrode. A method for measuring an interference delay of a through electrode that transmits a signal between stacked dies of a three-dimensional semiconductor,
Dividing the penetrating electrodes into a plurality of groups based on a first penetrating electrode determined among the penetrating electrodes, and associating the penetrating electrodes of each of the plurality of groups in a chain structure; And
Measuring a sub-interference delay time between the through electrodes associated with the chain structure for each of the plurality of groups, and measuring an interference delay time of the through electrodes using the sub-interference delay time measured for each of the plurality of groups ,
Wherein the step of associating the penetrating electrodes in a chain structure comprises connecting the penetrating electrodes belonging to each group to the chain structure based on a distance from the first penetrating electrode. A computer-readable recording medium having recorded thereon a program for executing the method of measuring the interference delay of the penetrating electrode according to any one of claims 7 and 9 to 11.

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