KR101468188B1 - Lead frame dispersing the stress and semiconductor package using the lead frame - Google Patents

Lead frame dispersing the stress and semiconductor package using the lead frame Download PDF

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Publication number
KR101468188B1
KR101468188B1 KR1020120079394A KR20120079394A KR101468188B1 KR 101468188 B1 KR101468188 B1 KR 101468188B1 KR 1020120079394 A KR1020120079394 A KR 1020120079394A KR 20120079394 A KR20120079394 A KR 20120079394A KR 101468188 B1 KR101468188 B1 KR 101468188B1
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KR
South Korea
Prior art keywords
lead
leads
package
present
lead frame
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Application number
KR1020120079394A
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Korean (ko)
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KR20140012454A (en
Inventor
조정수
진상호
심성운
Original Assignee
엘에스파워세미텍 주식회사
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Priority to KR1020120079394A priority Critical patent/KR101468188B1/en
Publication of KR20140012454A publication Critical patent/KR20140012454A/en
Application granted granted Critical
Publication of KR101468188B1 publication Critical patent/KR101468188B1/en

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Manufacturing & Machinery (AREA)

Abstract

The present invention introduces a leadframe and a semiconductor package using the leadframe to distribute the stress applied to an area where there is no lead or paddle in the semiconductor package but only an epoxy mold compound exists. The stress relieving lead frame has a plurality of leads aligned in a row, wherein an inner portion of at least one of the leads further protrudes into the interior of the package than other leads, The lead is not present and only the epoxy mold compound exists.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a lead frame and a semiconductor package,

BACKGROUND OF THE INVENTION 1. Field of the Invention [0002] The present invention relates to a lead frame used in a semiconductor package, and more particularly, to a lead frame that disperses stress generated in a package during trim and forming, and a semiconductor package using the lead frame.

The assembly process, which is one of the processes for manufacturing semiconductors, uses a resin such as an epoxy mold compound to minimize external influences such as physical, chemical, and thermal properties of manufactured silicon chips. Thereby protecting the device and making it easy to mount the product.

 In order to prevent the epoxy mold compound (hereinafter referred to as "EMC") used at this time from flowing out of the mold, a dam bar (Dambar) is used in the lead frame type package do. In the final product of the package, a trim process for removing an unnecessary portion of the lead frame and a form process for realizing an out lead shape are respectively performed. In the foam process, the shape of the outward protruding part of the lead out of the package is changed, and the stress applied at this time affects the package. The portion of the lead portion close to the paddle of the inner lead that is recessed into the package is formed into a shape having a larger area than the shape of the lead so as not to be disconnected due to electrical connection with the mounted semiconductor chip and external physical force.

1 shows the structure of a conventional package.

Referring to FIG. 1, a package 100 includes a lead 110, 120, a portion 130 covered with a molding compound and a portion 130 covered with a molding compound, and a paddle 134 (Rectangular regions). Generally, the upper lead 110 is used for low voltage and low current signals such as control signals, and the lower lead 120 is used for high voltage and high current. The width of the lead differs depending on the magnitude of voltage and current. Generally, only the epoxy mold compound is present between the lead 110 and the paddle 134, and there is a region 131 in which no lead or paddle exists.

In order to deform the shape of the outer portion (dotted line) of the leads 110 and 120, a crack may be generated in the region 131 due to a stress externally applied thereto. This is because there is no other factor that dissipates stress in this area, so the stress must be absorbed by the compound.

Among the semiconductor package types, DIP (Dual Inline Package) structure is a form in which the outliers of the package are distributed vertically or horizontally. When the trim and foam processes are performed, stress is applied to the package body vertically or horizontally.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a lead frame that disperses stress applied to a region where there is no lead or paddle in a semiconductor package but only an epoxy mold compound exists.

Another object of the present invention is to provide a semiconductor package using a lead frame that disperses stress applied to an area where there is no lead or paddle of the semiconductor package and only an epoxy mold compound exists.

According to an aspect of the present invention, there is provided a stress relieving lead frame including a plurality of leads aligned in a row, wherein an inner portion of at least one lead among the plurality of leads is connected to the inner And the protruding region is a region in which the lead is not present but only an epoxy mold compound exists.

According to another aspect of the present invention, there is provided a semiconductor package including a plurality of leads, paddles, and an epoxy mold compound. The plurality of leads are aligned in a line. A semiconductor chip is mounted on the paddles. The epoxy mold compound surrounds a portion of the lead and the paddle. Wherein an inner portion of at least one of the plurality of leads further protrudes in a direction of the paddle than other leads, and an area where the lead protrudes is a region where the lead or the paddle does not exist and only the epoxy mold compound exists .

The lead frame and the semiconductor package using the lead frame according to the present invention have an advantage of minimizing the crack generated in the package by dispersing the stress applied to the package during the course of the trim process and the forming process.

1 shows the structure of a conventional package.
2 shows a lead frame and a package using the lead frame according to the present invention.

In order to fully understand the present invention and the operational advantages of the present invention and the objects achieved by the practice of the present invention, reference should be made to the accompanying drawings, which are provided for explaining exemplary embodiments of the present invention, and the contents of the accompanying drawings.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. Like reference symbols in the drawings denote like elements.

2 shows a lead frame and a package using the lead frame according to the present invention.

Referring to FIG. 2, at least one lead among a plurality of leads included in the lead frames 210 and 220 according to the present invention is formed so that a portion covered by the epoxy mold compound has a paddle 234 (rectangular pattern) Direction. In the present invention, for example, the protruding patterns 232 and 233 are included in two leads on both outermost sides of a plurality of leads. However, this is for the sake of example, and any intermediate lead may be used to protrude and may be determined according to the zone or shape of the paddle 234.

The epoxy mold compound receives all the stress applied to the area 231 in which the lead or paddle did not exist in the related art. However, as shown in FIG. 2, in the case of the present invention, the paddle 234, The stresses are dispersed into the leads.

In FIG. 2, the lead protruding only in the upper lead is shown as being selected, but it is also possible to use a protruded lead out of the lower lead.

In particular, in the case of DIP, at least one lead among the leads provided on the top, bottom, left and right sides of the leads of the package is projected in the upper, lower, left, and right sides.

While the present invention has been described in connection with what is presently considered to be the most practical and preferred embodiment, it is to be understood that the invention is not limited to the disclosed embodiments. It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the scope of the present invention.

110, 120, 210, 220: leads
130, 230: an epoxy-molded package area
131, 231: area without leads and paddles and covered only with epoxy
134, 234: paddle
232, 233: part protruding into the package during the inner lead

Claims (6)

Wherein the inner portion of at least one of the plurality of leads protrudes further into the interior of the package than the other leads,
Wherein the protruding region is a region in which the lead is not present and only an epoxy mold compound is present, and the lead further protruding into the package is a lead located at the outermost of the plurality of leads. A lead frame that dissipates stress.
delete The method of claim 1, wherein when the lead frame is for a DIP (Dual In-line Package)
Wherein the leads further projecting into the interior of the package are present in at least one of each of the two lines.
A plurality of leads arranged in a line;
A paddle 234 on which the semiconductor chip is mounted; And
An epoxy mold compound surrounding a portion of the lead and the paddle,
The inner portion of at least one lead of the plurality of leads further protrudes in the direction of the paddle 234 than other leads, and the region where the lead protrudes is not present in the lead or the paddle 234, And a lead further protruding toward the paddle (234) is a lead located at the outermost one of the plurality of leads.
delete 5. The method of claim 4, wherein when the semiconductor package is a DIP,
Wherein leads projecting further toward the paddle (234) are present in at least one of each of the two lines.
KR1020120079394A 2012-07-20 2012-07-20 Lead frame dispersing the stress and semiconductor package using the lead frame KR101468188B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1020120079394A KR101468188B1 (en) 2012-07-20 2012-07-20 Lead frame dispersing the stress and semiconductor package using the lead frame

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020120079394A KR101468188B1 (en) 2012-07-20 2012-07-20 Lead frame dispersing the stress and semiconductor package using the lead frame

Publications (2)

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KR20140012454A KR20140012454A (en) 2014-02-03
KR101468188B1 true KR101468188B1 (en) 2014-12-02

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000150759A (en) * 1998-11-04 2000-05-30 Denso Corp Resin sealed semiconductor device
KR20050056339A (en) * 2003-12-10 2005-06-16 매그나칩 반도체 유한회사 Semiconductor package and method for fabricating the same
KR100817091B1 (en) * 2007-03-02 2008-03-26 삼성전자주식회사 Stacked semiconductor packages and the method of manufacturing the same

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000150759A (en) * 1998-11-04 2000-05-30 Denso Corp Resin sealed semiconductor device
KR20050056339A (en) * 2003-12-10 2005-06-16 매그나칩 반도체 유한회사 Semiconductor package and method for fabricating the same
KR100817091B1 (en) * 2007-03-02 2008-03-26 삼성전자주식회사 Stacked semiconductor packages and the method of manufacturing the same

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