KR101458029B1 - Apparatus and Method for caching the frame - Google Patents

Abstract

The present invention relates to a frame cache apparatus and method, and a frame cache apparatus and method according to the present invention are characterized by receiving information on a frame to be cached from a main storage unit, and using the received information to initialize a predetermined mode And caching the frame from the main storage unit using the predetermined mode.

H.264 codec, Image Convolution, Deblocking Filter, Motion compensation

Description

[0001] Apparatus and Method for Frame Caching [0002]

The present invention relates to a frame cache apparatus and method, and more particularly, to a frame cache apparatus and method. More particularly, the present invention relates to a frame cache apparatus and method for receiving frame information to be cached, And an apparatus and method for caching the frame.

Multi-processor SOC (Single on Chip) having a plurality of heterogeneous cores such as Cells has been popularized, thereby increasing the need for a method for efficiently processing a plurality of cores. The present invention relates to an apparatus and a method for efficiently processing a plurality of cores.

1 is a schematic diagram illustrating a conventional multi-processor SoC. Referring to FIG. 1, a multiprocessor SoC having a plurality of SIMD Accelerators such as SPEs (Cells) 110_1 to 110_8 can exert a strength when processing multimedia data such as Video and Image. This MPSoC includes a plurality of SPEs 110_1 to 110_8. However, the SPEs 110_1 to 110_8 are not included in the hierarchy of the main memory 130 but include only the independent local storages 120_1 to 120_8 and may be stored in the main memory 130, It is necessary to use DMA (Direct Memory Access) (140). The SPEs 110_1 to 110_8 are equipped with small-capacity Local Stores 120_1 to 120_8 having a capacity of 256 KB. By storing and processing all the codes and data using the Local Stores 120_1 to 120_8, There is a problem reading and saving.

2 is a diagram showing an image frame stored in the multiprocessor of FIG. Referring to FIG. 2, an image frame 210 in the main memory 130 includes a plurality of blocks 240_1 to 240_n. The start point of the upper end of the blocks 240_1 to 240_n is defined as the Low Address 220 and the end point of the lower end of the blocks 240_1 to 240_n is defined as the High Address 230. [ In addition, a plurality of blocks 240_1 to 240_n are occupied by the horizontal axis, and an interval between the first block and the last block in one image frame 240_1 to 240_n is defined as a frame stride. Specifically, as with the image frame 210, the blocks 240_1 to 240_n include a block width indicating a block interval at a block start point 250 and an abscissa, and a frame width ). In the main memory 130, two-dimensional data such as an image or a video frame is stored in the Raster Scan direction in units of blocks described above. There is no problem in accessing this when processing it as a single processor, but in order to access it from the SPEs 110_1 to 110_8, one pixel line or several lines must be read or written through DMA. In particular, when the processing is performed in units of horizontal and vertical blocks of constant length, since the respective lines of the block are not consecutive, the starting points of the respective lines in the blocks 240_1 to 240_n, as shown in FIG. 2, There is a problem in that the blocks 240_1 to 240_n are called by a single DMA 140 connection since there is a difference as much as a stride (Frame Stride).

FIG. 3 is a diagram showing a method of performing DMA (Direct Memory Access) processing from the main memory when the image frame of FIG. 2 is image convoluted. Referring to FIG. 3, in the case of Image Convolution or Deblocking Filter, blocks are processed on a block-by-block basis, but overlapping portions exist in the blocks. The first block 310 and the second block 320 overlap in the horizontal direction and the first block 310 and the third block 330 overlap in the vertical direction. Therefore, when processing each block, each block should be read, but the overlapping part must be processed separately. This can be done by preloading some blocks horizontally, but there is a problem of mixing application code with complex DMA code.

FIG. 4 is a diagram showing a method of performing DMA (Direct Memory Access) processing from the main memory when the image frame of FIG. 2 is motion compensation. Referring to FIG. 4, in the case of motion compensation of the H.264 codec, the size of a block to be processed is not constant, and reference blocks are not aligned in a line, The randomness is included in the block position to be read depending on the size of the block. In addition, motion compensation of the H.264 codec can simultaneously reference a plurality of reference frames. 4, the motion compensation frame 440 may refer to the first frame 410 and block 2 in the second frame. Therefore, there is a problem in double buffering if there is a certain degree of spatial proximity around the block to be referred to but it is not possible to accurately predict which block will access in the future.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and it is an object of the present invention to provide a large-capacity 2D image frame stored in a main storage unit on a multiprocessor SoC having a plurality of processors and a heterogeneous configuration. The present invention provides a frame caching apparatus and method for caching and prefetching image frames.

It is another object of the present invention to provide a frame caching apparatus which provides an interface capable of programming without considering complex DMA transfer command combinations, memory alignment, double buffering, And methods.

The present invention also provides a two-dimensional cache technique having multiple associativity and a frame caching apparatus and method for performing spatial prediction prefetching.

The objects of the present invention are not limited to the above-mentioned objects, and other objects not mentioned can be clearly understood by those skilled in the art from the following description.

In order to achieve the above object, a frame cache apparatus and method according to an embodiment of the present invention includes receiving information on a frame to be cached from a main storage unit, setting an initial value of a predetermined mode using the received information And caching the frame from the main storage unit using the predetermined mode.

According to another aspect of the present invention, there is provided a frame cache apparatus and method, comprising: a storage module for receiving information on a frame to be cached from a main storage; and an initial value of a predetermined mode using the received information, And a processing module for caching frames from the main storage unit using a predetermined mode.

The details of other embodiments are included in the detailed description and drawings.

According to the frame cache apparatus and method of the present invention as described above, when a multimedia application is implemented on MPSoC using the present invention, processing logic on a single core can be transferred as it is to a multi-processor SoC, .

In addition, the DMA issue overhead is reduced by reducing the number of DMAs, and it is advantageous to improve the performance of the multimedia application by loading the data before the access through the prefetching by avoiding the duplicated DMA by utilizing the locality.

BRIEF DESCRIPTION OF THE DRAWINGS The advantages and features of the present invention, and the manner of achieving them, will be apparent from and elucidated with reference to the embodiments described hereinafter in conjunction with the accompanying drawings. The present invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. To fully disclose the scope of the invention to those skilled in the art, and the invention is only defined by the scope of the claims. Like reference numerals refer to like elements throughout the specification.

A "module" refers to a hardware component such as software or a Field Programmable Gate Array (FPGA) or an Application Specific Integrated Circuit (ASIC), and the module performs certain roles. However, a module is not limited to software or hardware. A module may be configured to reside on an addressable storage medium and may be configured to execute one or more processors. Thus, by way of example, a module may include components such as software components, object-oriented software components, class components and task components, and processes, functions, attributes, procedures, Microcode, circuitry, data, databases, data structures, tables, arrays, and variables, as will be appreciated by those skilled in the art. The functionality provided by the components and modules may be combined into a smaller number of components and modules or further separated into additional components and modules.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

5 is a schematic diagram of a frame caching apparatus according to an embodiment of the present invention.

Referring to FIG. 5, the frame caching device 500 includes a processing module 515, a control module 520, and a storage module 525. In addition, the frame caching apparatus 500 may further include a synergistic processing element (SPE) 530 for processing data and a main storage unit 540 for storing image data and the like. The frame caching device 500 may receive or transmit data and the like from the main storage unit 540 and may use DMA (Direct Memory Access) as described above. Hereinafter, the components of the present invention will be described in detail.

First, the processing module 515 processes data transferred from the storage module 530 or the main storage unit 540. Here, the data and the like may include image data, video data, and the like, and may include frame caching, for example, as a data processing method.

Specifically, the processing module 515 calls the specific function stored in the storage module 525 by using the control module 515 or the control module 520, and reads the specific function from the main storage unit 540 An address value including frame position information, or frame geometry information may be provided. The information about the frame geometry may include information about the blocks.

The processing module 515 sets an interface for processing data of the main storage unit 540 after receiving the address value including frame position information or the frame geometry information from the main storage unit 540. [ The interface is represented by a predetermined mode, and the predetermined mode may include at least one of a first mode and a second mode. The first mode and the second mode will be described later with reference to Fig. 6 and Fig. The image data stored in the main storage unit 540 can be cached using the set first mode and second mode, and a description thereof will be made with reference to specific embodiments. In addition, the first mode and the second mode may use a predetermined region, and the region corresponds to a block constituting a frame of the main storage unit 540. [ Blocks and regions will be described later.

In one embodiment for the first mode, the processing module 515 may cache a frame containing a plurality of blocks from the main storage 540 using the first mode. The processing module 510 calls an InitRegion function stored in the storage module 525. The called InitRegion function is a function of a frame geometry including a plurality of blocks stored in the main storage unit 540 and a stride ). After the frame geometry and the frame stride are designated, the processing module 510 calls the InitWindow function stored in the storage module 510 to specify the geometry of the frame to be processed at present and initializes the first mode.

After the first mode is initialized, in one embodiment, the processing module 515 calls the MoveWindow function, the called function sets a region corresponding to the current block in the frame, and reflects the set Region in the first mode It plays a role. Accordingly, the processing module 515 forms a Region having a reference value (a reference value of the Region corresponding to the reference value of the block) corresponding to the blocks in the frame, and the Region is reflected in the first mode to cache the block . A more detailed description will be given later with reference to Fig.

In one embodiment, the processing module 515 calls the IterateWindow function, the called function sets a region corresponding to the current block in the frame, and reflects the set Region in the first mode. Accordingly, the processing module 515 repeatedly associates the blocks in the frame with the Region, and the Region is reflected in the first mode, thereby repeatedly reading the blocks in the frame. Expressed again, a plurality of blocks in a frame are cached in the frame caching device 500. For example, in order to cache blocks in a frame repeatedly, information on the positional relationship between the blocks is obtained from the information on the block geometry, and the difference in distance between the blocks, that is, , The X-axis increment (XInc), and the Y-axis increment (YInc) can be known, and the Region corresponding to the block can be repeatedly set. By using the first mode reflecting the Region, There is also water. A more detailed description will be given later with reference to Fig.

As another embodiment of the first mode, the processing module 515 may perform prefetching or the like, and a detailed description thereof will be given later with reference to FIG.

In one embodiment for the second mode, the processing module 515 may cache the frame containing the plurality of blocks from the main storage 540 using the second mode. When describing the first mode, the Region is set using the InitRegion function as described above. After the region is set, the processing module 510 calls the SetRegionBase function stored in the storage module 510, and the called SetRegionBase function corresponds to a block in a frame including a plurality of blocks stored in the main storage unit 540 The current region is reflected in the second mode, the reference pointer of the region corresponding to the reference point of the block is set, and the set region is reflected in the second mode.

As described in the first mode, the processing module 515 can set a region corresponding to a block in a frame by using the MoveWindow function and the IterateWindow function, and cache the block by reflecting the set region in the second mode .

In one embodiment, the processing module 515 sets a region corresponding to a block in a frame including a plurality of blocks. When the set region is reflected in the second mode, the processing module 515 or the SPE 530 2 mode can be processed. At this time, after the region is processed, the processing module 515 can update the main storage unit 540. To this end, the processing module 515 calls the UpdateRegion function, and the called UpdateRegion function can update the main storage 540. [ In particular, if the processing module 515 sets the region corresponding to the block to a region larger than the block, only the block region of the set region can be processed. In this case, the processing module 515 may set a Write Mask for the unprocessed region of the cached region, and may write back or invalidate the unprocessed region of the region cached by the main storage unit 540. To do this, the processing module 515 calls the FlushRegion function, and the called FlushRegion function writes back or invalidates the unprocessed area of the cached Region. A detailed description thereof will be given later with reference to Fig.

In another embodiment, the processing module 515 may perform prefetching or the like, and a detailed description thereof will be described later with reference to FIG.

The control module 520 serves to manage and control all components in the frame caching device 500. In addition, the control module 520 functions to call the functions required for the processing module 510 to perform a certain task from the storage module 525 and to provide the functions to the processing module 510.

The storage module 525 includes a plurality of functions for fetching a part of the 2-D Image Frame to the frame caching device 500 via DMA or writing back the main frame to the main storage 540 using the first mode and the second mode A library, and an image frame. Here, the library and the data may be separately stored, and may include a first storage module for storing the library and a second storage module for storing the data.

First, the functions supported by the library are described as follows: InitRegion, InitWindow, MoveWindow, IterateWindow, SetRegionBase, UpdateRegion, FlushRegion, etc., and the function of each function is as described above.

The data stored in the storage module 525 may include an image frame or a video frame. In addition, the storage module may include a plurality of slots, and may store data using a plurality of slots.

The SPE 530 is a kind of processor and can be connected to the main storage unit 540 via DMA to read and process data stored in the main storage unit 540 and can be operated independently from the main processor. In addition, the data read from the main storage unit 540 may be temporarily stored in the storage module 535, and the data cached through the processing module 515 may be processed.

The main storage unit 540 is a large capacity memory for storing data or the like and transmits or receives the stored data at the request of the SPE 530 or the processing module 510. [

6 is a diagram showing a region for processing an image frame by a frame caching apparatus.

Referring to FIG. 6, when describing FIG. 5, the Region will be described in detail. The processing module 515 specifies a set of application programming interfaces (APIs) of a region structure based on a block serving as a reference for processing in order to access a frame stored in the main storage unit 540.

Here, the block is a unit constituting a frame, and has a predetermined size in the X-axis direction and the Y-axis direction with respect to a predetermined reference point, the X-axis direction is the transverse axis direction with respect to the reference point, and the Y- Axis, and the X-axis and the Y-axis can form one plane. The shape of the block is not limited thereto and can be extended to a range that can be changed by an average knowledge belonging to the technical field. In addition, blocks in a frame can be mutually superposed between blocks, so that an overlapped area between blocks can be generated.

When the frame caching apparatus 500 caches a frame from the main storage unit 540, the storage module 525 in the frame caching apparatus 500 reads the frame in the main storage unit 540 immediately They are cached on a block-by-block basis. However, the frame caching device 500 provides an interface, such as the first mode and the second mode, as described above, and defines the basic unit thereof, in order to easily process the cached block.

Specifically, the region can form a two-dimensional plane separated from the reference point (610) by the X-axis and the Y-axis. Further, as shown in FIG. 6, the above-mentioned two-dimensional plane can be extended in the negative direction of the X-axis and the negative direction of the Y-axis with reference to the reference point. Further, the above-described two-dimensional plane can be defined as coordinates along the X-axis and the Y-axis with reference to the reference point. 6, a region including negative coordinates 620 of the X-axis, negative coordinates 640 of the Y-axis, a maximum length 630 of the X-axis, and a maximum length 650 of the Y-axis is defined .

The main storage unit 540 stores data in a frame format, and the stored frames are stored in block units as described above. If overlapping regions are generated between neighboring blocks in a frame, it is necessary to perform negative indexing. For this purpose, a region forms a negative region in the X-axis and Y-axis directions, It is possible to retrieve data from the main storage unit 540 more efficiently by performing negative indexing.

In one embodiment of the region, the first mode will be described with reference to FIG.

7 is a diagram showing a setting of a first mode for frame caching apparatus 500 to process a frame.

7, when the reference point 710 is defined as described above with reference to FIG. 6, the first mode 700 determines the maximum distance of the X axis, that is, maxX (730), Y axis MaxY 750 and the stride 740 between consecutive array elements in the main storage 540. The maximum distance of the elements in the main storage 540, In addition, the first mode 700 may include all the features of Region shown in FIG.

In addition, as described above with reference to FIG. 4, in order to start the first mode 700, the window geometry must be set by calling the InitWindow function. The Remote Stride 730 value of the data stored in the main storage unit 540 uses a known value when designating the window geometry and the values of maxX 740 and maxY 750 are set in consideration of the frame type do. Particularly, if there is a border 760, the reference point 710 and the maximum distance maxX 740 and maxY 750 of the geometry are adjusted to change the shape of the border 760 to a processing module 510).

Once the first mode 700 is initialized, the block may be cached by moving or iterating regions.

In one embodiment, when the region is moved, the position of the reference point 710 is regarded as (0, 0), relative coordinates of the reference point 710 are calculated, and a new coordinate is generated as the reference point 720 To move the region. The corresponding block can be cached using the moved region.

In one embodiment, Iteration of a region means that a region is successively moved to process a designated block within a frame geometry in the main storage unit 540. A specific description thereof will be described with reference to FIG. 8 .

FIG. 8 is a diagram showing a manner in which the first mode of FIG. 7 is repeated in the Region.

Referring to FIG. 8, FIG. 7 may include all of the above-described contents, and only the features of the present invention will be described. The region of the frame in the main storage unit 540 is continuously moved so that the block specified in the frame geometry can be sequentially processed from the beginning to the end.

Also, if you specify xInc (810), yInc (820), which is smaller than the width or height of Region, you can get the effect of nested region.

When the blocks are defined to overlap with each other, the updated area should always be displayed to the processing module 515 on the frame caching device 500 when the cache area moves, and the main storage 540 stores the final value, Values that are no longer changed should be updated. Therefore, when the cache area moves, the overlapped part is overwritten at the beginning of the area read from the next cache, thereby ensuring correctness. In addition, iterative (Iterative) processing is easy to predict the location movement of the region and can be effective even with a small double buffer size.

In one embodiment, as shown in FIG. 8, when blocks 1, 2 ... n exist in the current cached area, the area including the blocks to be next accessed (prefetching area 830) Prefetching is performed in the next access (access) without any additional DMA delay.

In one embodiment of the region, the second mode will be described with reference to FIG.

9 is a diagram showing a setting of a second mode for processing an image frame by the image frame processing apparatus.

Referring to FIG. 9, unlike the first mode, since a boundary of a frame is not specified, a main storage 540 can be used to read any position. Also, unlike the first mode, since it does not assume regular region movement, only the reference pointer of the region is specified.

In the second mode, the rectangular blocks 920_1 to 920_3 to which the frame geometry is not specified are read from the main storage unit 540 using the SetRegionBase interface.

9, several slots (Slots) 910_1 to 910_3 in the storage module 525 are provided, and when any block is designated, the main storage unit 540 ), Reads the adjacent area at once, reflects the read area to the region, and stores it in the slot.

In the case of Motion Compensation, since there is a probabilistic spatial adjacency (Spatial Locality) for the adjacent region, it is possible to maximize the spatial factor by using the width, height, and cache Factor Allows a lot of Hit in a single cached area. However, since the storage module 525 is limited and the DMA delay occurs, an area that is too large can not be read at once, and thus the cache size is variably determined within a range that does not change the Local-Stride. That is, a more accurate cache factor can be determined by observing the accessed positions within the cached area before one slot 910_1 through 910_3 of the cache is replaced.

In the second mode, it provides associativity. That is, a plurality of slots 910_1 to 910_3 may be disposed to cache different regions of the main storage unit 540. In the case of Motion Compensation, most video codecs provide bidirectional prediction, and in particular, H.264 requires reference to multiple frames. Therefore, it is possible to cache the areas of a plurality of frames without replacing one slot by associating them. Each slot is replaced by a replacement method such as a Least Recently Used (LRU) method.

FIG. 10 is a diagram illustrating a method of prefetching the second mode of FIG.

Referring to FIG. 10, when the second mode prefetches, there is no precise hint as in the first mode, so the second mode performs pre-prediction based on the prediction. As shown in FIG. 10, the difference between the adjacent cache areas is tracked (the difference in position between the first region 1050_1 and the second region 1050_2 in FIG. 10), and the difference V between the adjacent cache areas is stored. Specifically, the next region to be predicted is predicted from the third region 1059_3, which is an area to be prefetched, by using the address + V value of the current cached region, and prefetched to the slot of the object to be replaced by the LRU method I will.

11 is a diagram illustrating a write mask method according to an embodiment of the present invention.

11, when the size 1130 of the block 1130 is not constant in the frame 1110 stored in the main storage unit 540, The maximum value 630 of the X axis and the maximum value of the Y axis 650 of the region 600 are set to the maximum value and the region 600 of the rectangle defined to be larger than the non- ). The read Region 600 is stored in the slot 1140 in the storage module 525. In this case, the frame caching device 500 can use Write Mask to write a block read into the slot, so as not to damage the coherence at the boundary of the block. In particular, the Write Mask method is more efficient when the size of the block is not constant, such as H.264 MC.

More specifically, the region 600 reads a region larger than the block 1130 in which the actual data is stored, and reads a part of the read region 600 (that is, the block 1150 corresponding to the block of the frame) The data in the adjacent area (that is, the area 1160 not designated as a block among the contents read into the area of the region) is destroyed. Accordingly, in order to solve such a problem, if the processing module 515 of the frame caching device 500 notifies the actual written size within the size of the region 600 having the maximum size already declared, Bit 1160 is set. Therefore, only the information about the actually written area is transmitted to the main storage unit 540, and the main storage unit 540 receiving the information updates the main storage unit 540 using this information. Therefore, it is possible to solve the problem that the data in the adjacent area of the main storage unit 540 is destroyed. However, the Write Mask method can be determined according to the setting of the user.

12 is a diagram illustrating a method of processing an image frame using a first mode, according to an embodiment of the present invention.

Referring to FIG. 12, information on a frame to be cached is received from the main storage unit 540 (S1210). As described above, the frame caching device 500 specifies a Region in order to set the geometry of the frame stored in the main storage unit 540. [ A frame is composed of a plurality of blocks, and a frame can be read by associating a predetermined region with a block. Sets the geometry of the frame using the Region defined in the above manner, and receives information on the geometry of the frame to be cached from the main storage unit 540. Here, the information includes information necessary to set the initial value of the first mode, and may include, for example, an address value including frame position information, and information on frame geometry.

If the information on the frame is received, the initial value of the first mode is set using the received information (S1220). In the first mode, a value corresponding to the geometry reference value of the frame is set as the reference value of the first mode. In the first mode, a region corresponding to a plurality of regions used for setting the geometry of the frame is set, that is, a two-dimensional region in which the maximum value of the X axis and the maximum value of the Y axis are set. Can be set and used as relative coordinates.

After the initial value of the first mode is set, the main storage unit 540 caches the frame using the first mode (S1230). As described above, the first mode is set to correspond to the geometry of the frame, and furthermore, the geometry of the frame is configured in units of blocks corresponding to the region, and the image processing apparatus 500 uses the first mode And reads the block in the frame in one Region unit. In this case, it is possible to read one region of a plurality of blocks according to the setting. Again, the unit of caching at a time can be one or more blocks.

In one embodiment, as described above, the frame caching device 500 may use a first mode to move a position for the geometry of a frame, thereby caching a portion of the frame.

In one embodiment, as described above, the frame caching device 500 may repeatedly read blocks within a frame using the first mode.

In one embodiment, as described above, the frame caching device 500 may prefetch the next read block while reading the block in the frame using the first mode.

After reading the frame from the main storage unit 540, the cached frame is processed (S1240). The processing may include writing a portion of the cached frame, and the like. The processing module 515 may process some of the cached frames either by itself or by passing them to the SPE 530 for processing.

After processing the cached frame, it is confirmed whether there is a frame to be processed in the main storage unit 540 (S1250).

If there is a frame to be processed, the process moves to step S1230 and caches the frame, and repeats the above steps until there is no frame to process. Thereafter, if there is no frame to be processed, the process is terminated.

If there is no frame to be processed, the process is terminated.

13 is a diagram illustrating a method of processing an image frame using a second mode, according to an embodiment of the invention.

The position information of the frame to be cached is received from the main storage unit 540 (S1310). The above-described position information reads a pointer indicating an address of a reference coordinate of a block in a frame to be cached.

After receiving the position information, the initial value of the second mode is set using the received position information (S1320). As described above, an initial value of a second mode for defining a pointer indicating the addresses of blocks in a frame read into the prescribed region and main storage to the reference pointer of the second mode is set.

After the initial value of the second mode is set, the main storage unit 540 caches the frame using the second mode (S1330).

In one embodiment, the associativity as described above may be provided to include a plurality of slots in the storage module 525, and areas of a plurality of frames may be cached without replacing one slot.

In one embodiment, a prefetch as described above is provided, and blocks to be cached in the future can be predicted and prefetched in advance while caching blocks corresponding to the prescribed region.

In one embodiment, a Write Mask as described above is provided to provide a method of not destroying data in a contiguous area of the main storage 540, even when caching blocks of unequal sizes in a frame. In addition, the user can set whether or not the Write Mask is applied.

After caching from the main storage unit 540, the cached frame is processed (S1340). As described above, the processing may include writing a portion of the cached frame, and the like. The processing module 515 may process some of the cached frames either by itself or by passing them to the SPE 530 for processing.

It is confirmed whether there is a frame to be processed (S1350).

If there is a frame to be processed, the process moves to step S1330 and caches the frame, and repeats the above steps until there is no frame to process. Thereafter, if there is no frame to be processed, the process is terminated.

If there is no frame to be processed, the process is terminated.

It will be understood by those skilled in the art that the present invention may be embodied in other specific forms without departing from the spirit or essential characteristics thereof. It is therefore to be understood that the above-described embodiments are illustrative in all aspects and not restrictive.

1 is a schematic diagram illustrating a multi-processor according to the prior art.

2 is a diagram showing an image frame stored in the multiprocessor of FIG.

FIG. 3 is a diagram illustrating a method of performing DMA (Direct Memory Access) processing from the main storage unit 540 when the image frame of FIG. 2 is image convoluted.

FIG. 4 is a diagram illustrating a method of performing DMA (Direct Memory Access) processing from the main storage unit 540 when the image frame of FIG. 2 is motion compensation.

5 is a schematic diagram of a frame caching apparatus according to an embodiment of the present invention.

6 is a diagram showing a general mode for processing a frame by the frame caching apparatus.

7 is a diagram showing a setting of a first mode for a frame caching apparatus to process a frame.

8 is a diagram illustrating a method of prefetching the first mode of FIG.

9 is a diagram showing a setting of a pre-mode for processing an image frame by a frame caching apparatus.

FIG. 10 is a diagram illustrating a method of prefetching the second mode of FIG.

11 is a diagram illustrating a write mask method according to an embodiment of the present invention.

12 is a diagram illustrating a method of processing an image frame using a first mode, according to an embodiment of the present invention.

13 is a diagram illustrating a method of processing an image frame using a second mode, according to an embodiment of the present invention.

DESCRIPTION OF THE EMBODIMENTS

500: Frame caching device

515: Processing module

520: control module

525: Storage module

530: SPE

540: main storage unit

Claims (25)

Receiving information on a frame to be cached from a main storage unit; Setting an initial value of a predetermined mode using the received information; And And caching the frame from the main storage unit using the predetermined mode, Wherein the information includes at least one of an address value including position information of the frame and information on the frame geometry, Wherein the information on the frame geometry includes information on the blocks included in the frame geometry, Wherein the block has a predetermined size in the X-axis direction and the Y-axis direction based on a predetermined reference point, and the X-axis and the Y-axis form one plane. delete delete The method according to claim 1, The predetermined mode includes a Region, Wherein the region corresponding to the block includes at least one of a negative coordinate in the X-axis direction and a negative coordinate in the Y-axis direction on the basis of a predetermined reference point, the X- Wherein the Y-axis direction is a direction perpendicular to the X-axis, and the X-axis and the Y-axis form one plane, and the Region forms an area between the X-axis and the Y-axis. 5. The method of claim 4, Wherein the predetermined mode includes a first mode, The first mode includes a reference point corresponding to a reference point of the block included in the information about the frame geometry and a maximum value of the coordinates in the X axis direction and a maximum value of the coordinates in the Y axis direction on the basis of the reference point Includes a frame caching method. 6. The method of claim 5, Wherein the caching comprises: Setting the reference point of the first mode to move at a predetermined interval in at least one of the X-axis and the Y-axis in the frame geometry, and using the first mode corresponding to the moved reference point And caching the frame from the main storage. 6. The method of claim 5, Wherein the caching comprises: Setting the reference point of the first mode so as to repeatedly move in a direction of at least one of the X-axis and the Y-axis within the frame geometry at a predetermined interval; Mode is used to cache a frame from the main storage. The method according to claim 6, Predicting a block to be cached in the frame geometry with the predetermined interval as a parameter; And And caching the predicted block from the main storage. 8. The method of claim 7, Predicting a block to be cached in the frame geometry with the predetermined interval as a parameter; And And caching the predicted block from the main storage. 5. The method of claim 4, Wherein the predetermined mode includes a second mode, The second mode sets a reference pointer corresponding to a reference point of the block included in the information about the frame geometry, and sets a maximum value of the coordinates in the X axis direction and a maximum value of the coordinates in the Y axis direction on the basis of the reference pointer Includes a frame caching method. 11. The method of claim 10, Wherein the caching comprises: Wherein when the block in the frame is cached from the main storage unit, the Region corresponding to the block is set larger than the size of the block. 12. The method of claim 11, After the caching step, Dividing the region into a first area corresponding to the block and a second area not corresponding to the block; And And transferring information on the separated first area to the main storage unit, Wherein the main storage unit updates the main storage unit using information on the first area. 11. The method of claim 10, Wherein the caching comprises: And associating the plurality of frames with the position information of the frame when the plurality of blocks are cached from the main storage unit. 11. The method of claim 10, Predicting an area of a third block to be cached from the main storage unit using positional information between the first block and the second block when the first block is cached and the second block is cached; And And caching the predicted block from the main storage. A storage module for receiving information on a frame to be cached from the main storage; And And a processing module for setting an initial value of a predetermined mode using the received information and for caching a frame from the main storage unit using the predetermined mode, Wherein the information includes at least one of an address value including position information of the frame and information on the frame geometry, Wherein the information on the frame geometry includes information on the blocks included in the frame geometry, Wherein the block has a constant size in the X-axis direction and the Y-axis direction with respect to a predetermined reference point, and the X-axis and the Y-axis form one plane. delete delete 16. The method of claim 15, The predetermined mode includes a Region, Wherein the region corresponding to the block includes at least one of a negative coordinate in the X-axis direction and a negative coordinate in the Y-axis direction on the basis of a predetermined reference point, the X- Wherein the Y-axis direction is a direction perpendicular to the X-axis, and the X-axis and the Y-axis form one plane to form an area between the X-axis and the Y-axis. 19. The method of claim 18, Wherein the predetermined mode includes a first mode, The first mode includes a reference point corresponding to a reference point of the block included in the information about the frame geometry and a maximum value of the coordinates in the X axis direction and a maximum value of the coordinates in the Y axis direction on the basis of the reference point The frame caching device. 20. The method of claim 19, The processing module comprises: Setting the reference point of the first mode to move at a predetermined interval in at least one of the X-axis and the Y-axis in the frame geometry, and using the first mode corresponding to the moved reference point And caches the frame from the main storage. 20. The method of claim 19, The processing module comprises: Setting the reference point of the first mode so as to repeatedly move in a direction of at least one of the X-axis and the Y-axis within the frame geometry at a predetermined interval; Mode to cache the frame from the main storage. 22. The method according to claim 20 or 21, The processing module comprises: Predicts an area of a frame to be cached from the main storage unit, and caches an area of the predicted frame from the main storage unit, using the predetermined interval as a parameter. 19. The method of claim 18, The predetermined mode includes: Wherein the predetermined mode includes a second mode, The second mode sets a reference pointer corresponding to a reference point of the block included in the information about the frame geometry, and sets a maximum value of the coordinates in the X axis direction and a maximum value of the coordinates in the Y axis direction on the basis of the reference pointer The frame caching device. 24. The method of claim 23, The processing module comprises: Predicts a region of a third block to be cached from the main storage unit using positional information between the first block and the second block when caching the first block and caching the second block, From the main storage unit. 24. The method of claim 23, The processing module comprises: And associating the plurality of frames with the position information of the frame when caching a plurality of blocks from the main storage unit.

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