KR101447819B1 - Testing Method of Magnetic Memory - Google Patents

Abstract

A method to test a magnetic memory having a magnetic tunnel junction structure is disclosed. A resistance value of a graph having normal characteristics at a switching voltage level is selected as a reference resistance value, and the resistance value of a memory to be tested is measured. Furthermore, a slope representing the resistance change of the memory cell to be tested can be measured. The resistance change due to repeated testing is also measured to screen changes in the characteristics of the magnetic tunnel junction structure.

Description

{Testing Method of Magnetic Memory}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a testing method of a magnetic memory, and more particularly, to a test method suitable for defective physical properties of each cell of a magnetic memory.

The nonvolatile memory has a characteristic of being able to maintain the storage state even when the power supply is removed. Typical elements of non-volatile memory include flash memory, resistance memory, phase change memory, and magnetic memory.

The resistance change memory has a characteristic in which the resistance state changes depending on the formation of the conductive filament in the resistance variable layer. In addition, the phase change memory has a characteristic in which the resistance state changes through a phase change of crystalline and amorphous. On the other hand, the magnetic memory has a characteristic in which the resistance state changes depending on the setting of the magnetization direction.

The magnetic memory utilizes the quantum mechanical effect of magnetoresistance. In recent years, a configuration using a magnetic tunnel junction has been discussed. The magnetic tunnel junction is provided with a fixed layer and a free layer which are ferromagnetic, and a tunnel barrier layer is interposed between the fixed layer and the free layer. The conduction state of the spin electrons in the magnetic tunnel junction has a characteristic that the aspect changes depending on the magnetization arrangement of the ferromagnetic materials disposed around the tunnel barrier layer. For example, the resistance changes depending on the parallel and anti-parallel states of the ferromagnetic material. Thus, the difference in resistance in magnetic tunnel junctions is highly dependent on the spin polarization of the two ferromagnets and the tunneling of electrons through the material that constitutes the tunnel barrier layer.

In recent years, spin transfer torque method is used as a method of writing data to a magnetic memory. This is a method of inducing the inversion of magnetization by injecting a direct current into the magnetic tunnel junction without inducing the inversion of magnetization through application of an external magnetic field. The spin transfer toggle method is suitable for high integration. This is due to the fact that the magnetization direction is controlled by applying a direct current to the magnetic tunnel junction, which is a data storage unit. Also, the magnetization behavior of the spin transfer torque is highly dependent on the characteristics of the tunnel barrier layer in the magnetic tunnel junction. In the magnetic tunnel junction, MgO or a similar metal oxide is used as the tunnel barrier layer, which causes a limitation of the current applied for recording data. That is, it is a problem to maintain the tunneling phenomenon of electrons and to have a threshold current that does not cause physical destruction or physical property deformation. In addition, the change in the interfacial characteristics between the ferromagnetic material and the tunnel barrier layer induces a change in the reflectivity according to the spin direction of the electrons at the interface, thereby causing a problem of changing the characteristics of the magnetic memory.

The test for the magnetic memory in which the characteristic is expected to change is a method of setting a reference voltage according to the state and comparing the recognized output value with the reference voltage.

In addition, a method of measuring a resistance state of a magnetic tunnel junction by applying a voltage to a replica cell where a magnetic tunnel junction is not formed, and comparing the voltage to a memory cell may be used.

However, the above-described method of measuring the performance of the magnetic memory has a problem in that the design burden is increased such as forming a separate replica cell in the device design. In addition, there is a limit to how to determine the cause of defects in the configuration of the magnetic tunnel junction by setting a normal reference voltage and judging whether the defect is caused by the signal to be measured.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a method of testing a magnetic memory capable of analyzing the type of defects in a magnetic tunnel junction structure.

According to an aspect of the present invention, there is provided a method for testing a magnetic tunnel junction structure, comprising: forming a high resistance state by performing a reset operation on a magnetic tunnel junction structure to be tested; Measuring a resistance value by applying a bias voltage to the magnetic tunnel junction structure in the high resistance state; And comparing the measured resistance value with a reference resistance value corresponding to a switching voltage in a graph showing normal operating characteristics.

The above object of the present invention is also achieved by a method for testing a magnetic tunnel junction structure, comprising: performing a reset operation on a magnetic tunnel junction structure to be tested to form a high resistance state; Applying a bias voltage to the magnetic tunnel junction structure in a high resistance state to measure a resistance slope, which is a slope of a resistance value; And comparing the resistance slope to a slope of the reference resistance in a graph showing normal operating characteristics.

According to another aspect of the present invention, there is provided a method of testing a magnetic tunnel junction structure, comprising: forming a high resistance state by performing a reset operation on a magnetic tunnel junction structure to be tested; A first test step of measuring a resistance value by applying a bias voltage to the magnetic tunnel junction structure having the high resistance state and comparing the resistance value with a reference resistance value corresponding to a switching voltage in a graph showing normal operation characteristics; Measuring a resistance slope of the magnetic tunnel junction structure and comparing the resistance slope with a reference resistance slope in a graph showing normal operating characteristics; And a third test step of repeating the measurement of the bias voltage and the resistance value in the magnetic tunnel junction structure compared with the reference resistance slope to calculate a minimum resistance value and comparing the minimum resistance value with the reference resistance value. to provide.

According to the present invention described above, characteristics of a magnetic memory having a magnetic tunnel junction structure can be measured through various test methods. Particularly, it is possible to analyze various phenomena arising from defects of the ferromagnetic material or the tunnel barrier layer and deterioration of the interface characteristics. That is, the type of defects in the magnetic tunnel junction structure can be provided as a means of distinguishing and confirming the states of constituent materials thereof.

1 is a flowchart illustrating a method of testing a magnetic memory according to a preferred embodiment of the present invention.
2 is a resistance-voltage graph for explaining the test method of FIG. 1 according to a preferred embodiment of the present invention.
3 is a flowchart illustrating another test method of a magnetic memory according to a preferred embodiment of the present invention.
4 is a resistance-voltage graph for explaining the test method of FIG. 3 according to a preferred embodiment of the present invention.
5 is a flowchart illustrating another method of testing a magnetic memory according to a preferred embodiment of the present invention.
FIG. 6 is a resistance-voltage graph for explaining the test method of FIG. 5 according to a preferred embodiment of the present invention.

The present invention is capable of various modifications and various forms, and specific embodiments are illustrated in the drawings and described in detail in the text. It should be understood, however, that the invention is not intended to be limited to the particular forms disclosed, but includes all modifications, equivalents, and alternatives falling within the spirit and scope of the invention. Like reference numerals are used for like elements in describing each drawing.

Unless defined otherwise, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. Terms such as those defined in commonly used dictionaries are to be interpreted as having a meaning consistent with the contextual meaning of the related art and are to be interpreted as either ideal or overly formal in the sense of the present application Do not.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

Example

1 is a flowchart illustrating a method of testing a magnetic memory according to a preferred embodiment of the present invention.

Referring to FIG. 1, a corresponding memory cell is reset by applying a pulse current (S100). The reset operation means that the memory cell of the magnetic tunnel junction structure enters the high resistance state. That is, when a current pulse in a specific direction is applied to a magnetic tunnel junction composed of a free end, a tunnel barrier layer, and a fixed end, the memory cell is reset and becomes a high resistance state.

Subsequently, a bias voltage Vb is applied to the reset memory cell, and the resistance value of the memory cell to be tested is measured (S110).

Then, the resistance value Rm of the memory cell is compared with the reference resistance value Rref (S120). The reference resistance value Rref is a predetermined resistance value that can be determined as a normal operation at the time of designing. If the measured resistance value Rm is less than the reference resistance value Rref, an error code is generated (S130), and the memory cell having the error code is determined to be defective.

2 is a resistance-voltage graph for explaining the test method of FIG. 1 according to a preferred embodiment of the present invention.

Referring to FIG. 2, in the reset state, the reference resistance value Rref has a predetermined value. In the graph, the free end is made of CoFeB, the tunnel barrier layer is made of MgO, and the fixed end is made of CoFeB. The thickness of the tunnel barrier layer is set to about 9 nm. In the reset state, it has the highest resistance value when a voltage of 0 V is applied. Further, the switching voltage Vs of the magnetic tunnel junction structure is 0.5V. At the switching voltage Vs, the magnetic tunnel junction structure enters a low resistance state.

In the graph, the dotted line represents the resistance-voltage characteristic of the magnetic tunnel junction structure performing normal operation. Characteristic graphs in the normal operation indicated by a dotted line are provided as a kind of test standard. This can be understood as a characteristic of a normal sample. In normal operation, it is assumed that the resistance characteristic decreases linearly with increasing voltage. The high resistance value at the set switching voltage Vs is determined by the reference resistance value Rref.

A bias voltage Vb is applied to the magnetic tunnel junction structure to be tested. The resistance-voltage characteristic of the memory cell to be tested is indicated by a solid line. It is preferable that the bias voltage Vb is set to 0.2V to 0.3V. The bias voltage Vb is applied within the range of the set bias voltage and the resistance value Rm for the magnetic tunnel junction structure to be tested is measured. The resistance value Rm is measured by measuring the current in accordance with the applied bias voltage Vb, and the resistance value Rm is calculated from the voltage value with respect to the measured current. When the measured resistance value Rm is less than the predetermined reference resistance value Rref, an error code is generated and the magnetic tunnel junction structure to be tested is determined to be defective.

If the applied bias voltage Vb is less than 0.2 V, an underscreen phenomenon which can be judged as a good product may occur although the measured resistance value Rm is in the defective range. That is, although a low resistance state is maintained, a resistance value Rm to be measured relatively increases with application of a low bias voltage, and an error may be determined that the defective is determined as a good product. In addition, when the applied bias voltage Vb exceeds 0.3 V, an over-screen phenomenon may be caused to be judged to be defective even though the change in resistance is small.

The test method of FIGS. 1 and 2 screens the deterioration phenomenon according to defects of the fixed end, the free end, or the tunnel barrier layer itself in the magnetic tunnel junction structure. In particular, an abnormal temperature rise of the magnetic tunnel junction structure is screened. That is, when the temperature rises, the spin of the electrons in the ferromagnetic body can not maintain the original state and becomes an excited state. When the current is applied in the excited state, a spin flip is generated in which the electron spin is changed, and the electron spin can not maintain the reset state and the resistance is reduced. That is, the test method of FIGS. 1 and 2 screen abnormal temperature rise due to defects in the crystal structure inside the ferromagnetic body, the inclusion of impurities, or the problem of orientation characteristics in the polycrystalline structure.

3 is a flowchart illustrating another test method of a magnetic memory according to a preferred embodiment of the present invention.

Referring to FIG. 3, a reset operation is performed on a magnetic tunnel junction structure in which a test is performed (S200). In addition, a predetermined reference resistance slope Sref is provided as the slope of the resistance for the magnetic tunnel junction structure. The reference resistance slope Sref is a value provided as a kind of test reference at the completion of the design and development of the magnetic memory.

The reference resistance slope Sref has a specific value and serves as a basis for judging good products and defects.

Then, the resistance slope Sm of the magnetic tunnel junction structure to be tested is measured (S210). The measurement of the resistance slope Sm is derived through the calculation of the resistance values measured according to the application of the two bias voltages. For example, when the first bias voltage V1 is applied, the resistance thereof is R1, and the resistance value in accordance with the second bias voltage V2 is measured by R2, the resistance slope Sm follows the following equation (1).

Subsequently, a comparison operation is performed on the measured resistance gradient Sm and the reference resistance gradient Sref (S220). If the absolute value of the measured resistance gradient Sm exceeds the absolute value of the reference resistance slope Sref, the corresponding magnetic tunnel junction structure is determined to be defective and an error code is generated (S230).

4 is a resistance-voltage graph for explaining the test method of FIG. 3 according to a preferred embodiment of the present invention.

Referring to FIG. 4, a magnetic tunnel junction structure is disclosed with the structure described in FIG. In addition, the dotted line represents the resistance-voltage characteristic in the normal range which is the basis of the test, and the solid line represents the characteristic graph of the memory cell in which the actual test is performed.

The predetermined reference resistance slope Sref has a constant value regardless of the applied bias voltage. The first bias voltage V1 is applied sequentially and the second bias voltage V2 is applied to the magnetic tunnel junction structure in which the actual test is performed. Each resistance value of the magnetic tunnel junction to be tested is measured according to each applied bias voltage. For example, the resistance value at the first bias voltage V1 is measured as R1, and the resistance value at the second bias voltage V2 is measured as R2. The resistance slope Sm on the basis of the measured resistance value is given by the above equation (1). This is compared with the reference resistance slope Sref.

That is, when the absolute value of the resistance slope Sm measured relative to the absolute value of the reference resistance slope Sref exceeds this value, an error code is generated and the corresponding cell is judged as defective.

The test method disclosed in FIGS. 3 and 4 can confirm the interface characteristics between the ferromagnetic material and the tunnel barrier layer. The ferromagnetic material is provided in a polycrystalline state, and the tunnel barrier layer is provided in the form of a polycrystalline or single crystal of metal oxide. Interfacial mismatch occurs between the ferromagnetic material and the tunnel barrier layer due to the lattice constant and polycrystalline orientation, and interface defects due to various causes such as dangling bond appear. If the interfacial characteristics between the ferromagnetic material and the tunnel barrier layer are poor, an abnormal spin-flop phenomenon occurs in response to the increase of the applied bias voltage, and a progressive spin-flop phenomenon occurs. Therefore, it appears as a change of resistance with steep slope compared with the normal value.

5 is a flowchart illustrating another method of testing a magnetic memory according to a preferred embodiment of the present invention.

Referring to FIG. 5, a reset operation for a cell to be tested is performed (S300). Through the reset operation, the magnetic tunnel junction structure of the corresponding cell enters the high resistance state. Also, a reference resistance value Rref serving as a reference for good products and defects is provided.

Subsequently, a counting operation for the number of test repetitions is performed (S310). The counting operation sets the counting variable C to the initial value 0, and increments by 1 for each test execution.

Then, the bias voltage Vb is applied (S320). The resistance value of the magnetic tunnel junction structure to be tested according to the application of the bias voltage Vb is measured.

Subsequently, it is determined whether the counting variable C is equal to the reference test number X (S320). If the counting variable C has a value less than the reference test number X, the counting variable C is increased by 1, and the application of the bias voltage Vb and the measurement of the magnetic tunnel junction structure are repeated. The number of tests is counted by the counting variable C, and the application of the bias voltage Vb and measurement of the resistance value are repeated until the preset reference test number X is reached. Also, as the test is repeated, variation in the measured resistance value occurs even when the same bias voltage Vb is applied, and the minimum resistance value Rmin having the lowest resistance value is selected (S340).

Subsequently, the measured minimum resistance value Rmin is compared with the predetermined reference resistance value Rref (S350). When the minimum resistance value Rmin is less than the reference resistance value Rref, an error code is generated for the magnetic tunnel junction structure of the measured cell (S360), and the corresponding cell is determined as defective.

In FIG. 5, the reference test number X of the test is preferably set to 10 to 90 times. When the number of reference test times X is less than 10, it is difficult to confirm deterioration of the characteristics of the magnetic tunnel junction structure due to the repeated test. When the reference test number X exceeds 90, an excessive time is required for the test, ≪ / RTI >

FIG. 6 is a resistance-voltage graph for explaining the test method of FIG. 5 according to a preferred embodiment of the present invention.

Referring to FIG. 6, the magnetic tunnel junction structure described in FIG. 2 is disclosed. Further, the switching voltage Vs is 0.5 V, and a predetermined resistance value at the switching voltage Vs is presented as a reference resistance value Rref. The bias voltage Vb for the magnetic tunnel junction structure to be measured is set to 0.2 V to 0.3 V as described in Fig. Also, the dotted line graph assumes the normal operation as a standard of the test, and the solid line shows the characteristic value of the memory cell in which the actual test is performed.

As the test for applying the bias voltage Vb and measuring the resistance value is repeated, the resistance value of the magnetic tunnel junction structure tends to decrease gradually. This is due to the fact that when the tunnel barrier layer made of MgO itself has a locally thin thickness, a current is concentrated in a region having a thin thickness, and defects are enlarged through the region. For example, when a void or dislocation point defect or a line defect exists in a tunnel barrier layer of a polycrystalline structure and a current or a voltage is concentrated on the defect portion, the defect is enlarged according to repetitive application of the bias voltage Vb. The resistance value of the magnetic tunnel junction structure tends to decrease as the number of times of application of the bias voltage increases due to the enlargement of the defect.

Also, the minimum resistance value Rmin among the measured resistance values is selected, and the selected minimum resistance value Rmin is compared with the reference resistance value Rref. Thus, defects in the magnetic tunnel junction structure due to defects in the tunnel barrier layer can be screened.

In the present invention, a test for measuring the resistance according to the application of the bias voltage shown in FIGS. 1 and 2 and comparing the measured resistance value with the reference resistance value is performed first, and the resistance tilt test Is preferably performed. Further, it is preferable that the repetitive test shown in Figs. 5 and 6 is performed after the test for the resistance slope is performed.

The error codes derived from each test method in the test process represent one bad state. If an error code is generated in the step-by-step test, it is preferable that the test for the corresponding magnetic tunnel junction structure is stopped and the cell is determined to be defective. Therefore, it is preferable that the test is performed first from the test method having the shortest test time. The test method disclosed in FIG. 1 can perform a test by applying a bias voltage to the magnetic tunnel junction structure, and the test method disclosed in FIG. 3 requires applying bias voltage twice for the magnetic tunnel junction structure. Therefore, it is preferable that the test method of applying the bias voltage once is preceded. The test method of FIGS. 5 and 6, in which the repeated test is performed on the same principle, is preferably performed after the test method disclosed in FIG.

In the present invention, the test method of FIG. 1 detects a deterioration phenomenon of resistance change due to crystal defects in the ferromagnetic materials or tunnel barrier layers. In particular, it is possible to screen abnormal rise of temperature during normal operation due to crystal defects. In addition, the test method of FIG. 3 can identify defects in the interface characteristics between the ferromagnetic material and the tunnel barrier layer, and the test method of FIG. 5 can identify crystal defects in the tunnel barrier layer of the polycrystalline structure.

Thus, according to the present invention, the types of defects can be selected according to an individual test method. That is, the type of defects in the magnetic tunnel junction structure can be provided as a means of distinguishing and confirming the states of constituent materials thereof.

Claims (10)

A reset operation of applying a current pulse to a magnetic tunnel junction structure of a magnetic memory made up of a fixed end, a free end and a tunnel barrier layer has a resistance value higher than a resistance state appearing when a voltage higher than a switching voltage is applied to the magnetic tunnel junction structure Forming a high resistance state;
Measuring a resistance value by applying a bias voltage having a level lower than the switching voltage and higher than 0 V to the magnetic tunnel junction structure in the high resistance state; And
Comparing the measured resistance value to a reference resistance value corresponding to the switching voltage in a graph showing normal operating characteristics,
The step of comparing with the reference resistance value comprises:
Calculating a minimum resistance value from a plurality of resistance values measured repeatedly, and comparing the minimum resistance value with the reference resistance value. 2. The method of claim 1, wherein comparing the reference resistance value comprises:
And determining whether the minimum resistance value is greater than or equal to the reference resistance value. The testing method of a magnetic memory according to claim 2,
And generating an error code if the minimum resistance value is less than the reference resistance value after the step of comparing the reference resistance value with the reference resistance value. delete delete delete A reset operation of applying a current pulse to a magnetic tunnel junction structure of a magnetic memory made up of a fixed end, a free end and a tunnel barrier layer has a resistance value higher than a resistance state appearing when a voltage higher than a switching voltage is applied to the magnetic tunnel junction structure Forming a high resistance state;
Measuring a resistance slope, which is a slope of a resistance value, by applying a bias voltage having a level lower than the switching voltage and higher than 0 V to the magnetic tunnel junction structure having the high resistance state; And
And comparing the resistance slope to a slope of the reference resistance in a graph showing normal operating characteristics. 8. The method of claim 7, wherein comparing the reference resistance slope comprises:
And comparing the absolute value of the measured resistance slope with the absolute value of the reference resistance slope. 9. The method of claim 8, wherein the testing of the magnetic memory further comprises, after comparing the reference resistance slope,
And generating an error code when the absolute value of the measured resistance slope exceeds the absolute value of the slope of the reference resistance. A reset operation of applying a current pulse to a magnetic tunnel junction structure of a magnetic memory made up of a fixed end, a free end and a tunnel barrier layer has a resistance value higher than a resistance state appearing when a voltage higher than a switching voltage is applied to the magnetic tunnel junction structure Forming a high resistance state;
And a resistance value is measured by applying a bias voltage having a level lower than the switching voltage and higher than 0 V to the magnetic tunnel junction structure in the high resistance state and comparing the measured resistance value with the switching And a reference resistance value corresponding to the voltage;
A second test step of measuring a resistance slope of the magnetic tunnel junction structure and comparing the slope of the resistance with a slope of a reference resistance in a graph showing normal operating characteristics; And
And a third test step of repeating the application of the bias voltage and the measurement of the resistance value to the magnetic tunnel junction structure compared with the reference resistance slope to calculate a minimum resistance value and to compare the minimum resistance value with the reference resistance value Way.

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