KR101444397B1 - Method and apparatus for controlling hard disk access - Google Patents

Abstract

A hard disk access control method of an embedded system includes: allocating a memory in a ring buffer format and mapping the memory address to an application when a hard disk write application is called; Writing data to the first ring buffer and confirming whether there is no empty space in the first ring buffer; And writing data to the second ring buffer and transferring data of the first ring buffer to the hard disk when there is no empty space in the first ring buffer. According to the present invention, the CPU is occupied by the access operation for reading and writing to the hard disk continuously in the Thread environment, thereby greatly shortening the time for blocking the system.

Description

[0001] METHOD AND APPARATUS FOR CONTROLLING HARD DISK ACCESS [0002]

The present invention relates to a method and apparatus for controlling hard disk access.

More specifically, in the case of a dedicated controller for hard disk access control, a write operation is performed on a hard disk by operating a memory as a ring buffer in the case of a write command. In the case of a read command, The present invention relates to a method and an apparatus for performing a read operation on a hard disk by applying an offset.

Recently, a digital video recorder (DVR, Digital Video Recorder) has been commercialized. DVR has been developed to solve this problem because the conventional video cassette recorder (VCR) repeats the recording several times and the image quality deteriorates and the video tape is replaced.

DVR uses hard disk or digital video disk instead of video tape, so it is easy to play or search saved screen. It is also convenient for editing and transferring images because it is stored as a digital signal.

An embedded system, on the other hand, refers to a solution or system that can be added to a specific product to perform a given task in the solution. In other words, it refers to a solution that is added to a product or solution to perform a specific task within the product.

DVRs, as well as home appliances with advanced functions, mobile phones, set-top boxes, and the like, generally have an embedded system, which may include a microprocessor and a hard disk to perform certain embedded applications.

In the case of an embedded system equipped with a hard disk, data is transmitted and received to the hard disk for a low-level function, read and write. This is a task performed while occupying the CPU, and the system is in a blocking state during the work time.

The read / write speed of the hard disk is generally much slower than the speed of the CPU and memory. Due to this, in the case of a DVR in which reading and writing operations occur frequently, frequently accessing a hard disk may cause deterioration of the overall system performance.

Patent Publication No. 2001-0022977 (published on March 23, 2001)

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems. In particular, it is an object of the present invention to provide a method and apparatus for efficiently controlling hard disk access.

More specifically, the present invention uses a dedicated controller for hard disk access control, the dedicated controller operates a memory in a ring buffer form to perform a write operation to the hard disk, applies a time offset to the hard disk, And to provide a method and an apparatus for performing a read operation on a computer.

According to an embodiment of the present invention, there is provided a method of controlling access to a hard disk of an embedded system, the method comprising: allocating a memory in a ring buffer format and mapping the memory address to an application when a hard disk write application is invoked; ; Writing data to the first ring buffer and confirming whether there is no empty space in the first ring buffer; And writing data to the second ring buffer and transferring data of the first ring buffer to the hard disk when there is no empty space in the first ring buffer.

In another aspect of the present invention, there is provided a method of controlling access to a hard disk of an embedded system, comprising: allocating a memory in a ring buffer form and mapping the memory address to an application when a hard disk read application is called for a certain time T; Reading data from the hard disk before and after the time T by applying a preset time offset; And loading data read from the hard disk into a ring buffer.

Furthermore, an embedded system according to an embodiment of the present invention includes a memory for storing data and a hard disk; And when a hard disk writing application is called, allocates the memory in the form of a ring buffer, maps the memory address to an application, writes data in the first ring buffer, and determines whether there is no empty space in the first ring buffer And a control unit for writing data to the second ring buffer and transferring the data of the first ring buffer to the hard disk when there is no empty space in the first ring buffer.

According to another aspect of the present invention, there is provided an embedded system including: a memory for storing data; a hard disk; And a hard disk read application for an arbitrary time T is called, the memory is allocated in the form of a ring buffer, the memory address is mapped to the application, and a pre-set time offset is applied to the data before and after the time T And a controller for reading data from the hard disk and loading data read from the hard disk into the ring buffer.

According to the present invention, in the thread environment, the CPU is occupied by the access operation for reading and writing to the hard disk continuously, and the time for blocking the system can be greatly shortened.

Further, according to the present invention, the efficiency of the entire embedded system can be improved by lowering the CPU occupancy rate.

1 is a block diagram for explaining an internal structure of an embedded system according to an embodiment of the present invention;
2 is a diagram for explaining a structure of a write memory ring buffer according to an embodiment of the present invention;
3 is a diagram for explaining the structure of a read memory ring buffer according to an embodiment of the present invention;
4 is a flowchart showing a process of controlling hard disk write access according to an embodiment of the present invention.
5 is a flowchart showing a process of controlling hard disk read access according to an embodiment of the present invention.

It is to be understood that the present invention is not limited to the description of the embodiments described below, and that various modifications may be made without departing from the technical scope of the present invention. In the following description, well-known functions or constructions are not described in detail since they would obscure the invention in unnecessary detail.

In the accompanying drawings, the same components are denoted by the same reference numerals. And in the accompanying drawings, some of the elements may be exaggerated, omitted or schematically illustrated. It is intended to clearly illustrate the gist of the present invention by omitting unnecessary explanations not related to the gist of the present invention. Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

Meanwhile, the embedded system of the present invention can exemplify a DVR, but the present invention is not limited thereto. That is, the method and apparatus for controlling access to a hard disk of the present invention can be generally applied not only to a DVR, but also to a microprocessor such as a mobile phone, a set-top box, and an electronic apparatus including a hard disk and a RAM.

1 is a block diagram illustrating an internal structure of an embedded system according to an embodiment of the present invention. 1, an embedded system 100 according to an exemplary embodiment of the present invention includes an input unit 110, a communication unit 120, and a display unit 130. A control unit 140, and a storage unit 170.

The input unit 110 receives a user's key manipulation for controlling the embedded system 100, generates an input signal, and transmits the input signal to the controller 140.

The communication unit 120 performs a function of transmitting and receiving data through the wired or wireless communication of the embedded system 100. The communication unit 120 may receive data through a wired or wireless channel, output the data to the control unit 140, and transmit the data output from the control unit 140 through a wired / wireless channel.

The display unit 130 may be formed of a liquid crystal display (LCD), an organic light emitting diode (OLED), an active matrix organic light emitting diode (AMOLED) And visually provides menus, input data, function setting information, and various other information of the system 100 to the user.

Although not shown in FIG. 1, the embedded system 100 according to the embodiment of the present invention may further include an audio or video processing unit.

The audio or video processing unit may be a CODEC, and the CODEC may be a video CODEC for processing image data and an audio CODEC for processing audio signals such as voice.

The video processing unit can convert the analog image into the digital image. The audio processor converts the digital audio signal into an analog audio signal through a codec, reproduces the audio signal through a speaker SPK, and converts the analog audio signal input from the microphone into a digital audio signal through an audio codec.

The storage unit 170 stores programs and data necessary for the operation of the embedded system 100, and can be divided into a program area and a data area.

The program area includes a program for controlling overall operation of the embedded system 100 and an operating system (OS) for booting the embedded system 100, an application program necessary for reproducing an image, moving picture, or multimedia contents, For example, an alarm function, a file conversion function, an application program required for an image or moving picture playback function, and the like. The data area is an area in which data generated according to the use of the embedded system 100 is stored, and can store images and moving images.

The storage unit 170 may include a random access memory (RAM) 180 and a hard disk 190, the operation of which will be described later with reference to the accompanying drawings.

The control unit 140 controls the overall operation of each component of the embedded system 100. In particular, the controller 150 according to an embodiment of the present invention may include a CPU (Central Processing Unit) 140 and a DPU (Data Processing Unit) 160 that is a dedicated controller for hard disk access control. The CPU and the DPU may be a plurality of processors physically separated from each other, but may be a functional unit conceptually dividing one processor.

The CPU 150 drives the CPU-based application when the system is booted. When the hard disk write or read application program interface (API) is called, the DPU is activated to start co-processor or co-work.

The DPU 160 may provide an API function that can specify the physical address space of the RAM 180 to be written for the write purpose and the physical address space of the RAM 180 to be used for the read purpose. The DPU 160 may access the designated write and read memory spaces to provide an API function that can perform a write operation and a read operation.

In the case of Write, the DPU 160 periodically checks for a call of the Write function, and if the memory meets a preset capacity, the DPU 160 performs a write operation to the hard disk 190 to transfer the data from the RAM 180 to the hard disk 190 ).

In case of Read, the DPU 160 accesses the hard disk 190. The DPU 160 may transmit an offset value to an arbitrary time stamp requested from the hard disk 190 to the RAM 180 before and after the request time . A specific process will be described later with the accompanying drawings.

2 is a diagram illustrating a structure of a write memory ring buffer according to an embodiment of the present invention. As shown in FIG. 2, a write memory according to an embodiment of the present invention can operate as a ring buffer structure.

For example, if 0x1000000 to 0x8000000 are memory areas allocated for the purpose of writing, the DPU 160 can divide the memory space into N areas. For example, you can divide memory into seven spaces as shown below.

First memory space: 0x1000000 to 0x1FFFFFFF

Second memory space: 0x2000000 to 0x2FFFFFFF

Third memory space: 0x3000000 to 0x3FFFFFFF

Fourth memory space: 0x4000000 to 0x4FFFFFFF

Fifth memory space: 0x5000000 to 0x5FFFFFFF

Sixth memory space: 0x6000000 to 0x6FFFFFFF

Seventh memory space: 0x7000000 to 0x7FFFFFFF

For example, the CPU 150 or the DPU 160 may set the stop bit of the first memory area to be ON when data is completely written into the first memory space. When the stop bit is ON, the DPU 160 checks the stop bit by using the Checker function, and controls the data of the corresponding memory area to be written to the hard disk.

The DPU 160 may set the write bit of the first memory area to ON and the spot bit and the write bit of the DPU 160 to be initialized after the completion of the write operation while the hard disk writing to the first memory area proceeds.

In addition, the DPU 160 checks the stop bit and the write bit of the first memory area by applying the checker function. If the stop bit is on or write bit on, the DPU 160 controls to write data in the second memory area have. Furthermore, the DPU 160 can control to map the actual memory address in the provided Write API function.

According to the embodiment of the present invention, when the DPU 160 writes data in the first memory space and accesses the hard disk when the first memory space is full, the DPU 160 can transfer data in the first memory space to the hard disk. When the first memory space is full, data can be written to the second memory space at the same time as accessing the hard disk. When the second memory space is full, the data in the second memory space can be transferred to the hard disk and the data can be written in the third memory space by accessing the hard disk. If a plurality of buffers are connected like a ring and sequentially rotated as described above, there is no loss of data

3 is a diagram for explaining a structure of a read memory ring buffer according to an embodiment of the present invention. As shown in FIG. 2, a read memory according to an embodiment of the present invention can operate as a ring buffer structure.

For example, if 0x1000000 to 0x8000000 are memory areas allocated for reading purposes, the DPU 160 may divide space into N areas. For example, you can divide into seven spaces as shown below.

First memory space: 0x1000000 to 0x1FFFFFFF

Second memory space: 0x2000000 to 0x2FFFFFFF

Third memory space: 0x3000000 to 0x3FFFFFFF

Fourth memory space: 0x4000000 to 0x4FFFFFFF

Fifth memory space: 0x5000000 to 0x5FFFFFFF

Sixth memory space: 0x6000000 to 0x6FFFFFFF

Seventh memory space: 0x7000000 to 0x7FFFFFFF

For example, when a moving picture reading user command for a specific time T is received from the input unit 110, the CPU 150 or the DPU 160 can read data corresponding to the specific time T from the hard disk. On the other hand, a predetermined time offset can be set in advance. In this case, data corresponding to time before and after T can be read together on the hard disk by applying a preset time offset.

Then, the DPU 160 divides T into memory address values and loads data read from the hard disk into the first memory space. For example, T corresponding to the address value of 0x1111000 in the first memory space, and data corresponding to the time before and after T read from the hard disk can be loaded before and after 0x1111000 of the first memory space. In particular, the data memory address value corresponding to T can be used as the offset of the first memory intermediate point. Also, the DPU 160 can control to map the memory address corresponding to the specific time T and T in the provided Read API function.

According to the embodiment of the present invention, the DPU 160 can read the data corresponding to the time before and after T by using the preset time offset together with the hard disk. The data corresponding to T is loaded in the first half of the first memory space. If the first half of the first memory space is insufficient, the seventh memory space is loaded Can be loaded using. Further, the data corresponding to the time after T is loaded in the latter half of the first memory space, and can be loaded using the second memory space when the latter half of the first memory space is insufficient.

If a plurality of buffers are connected in a ring like the above manner, the sequential rotation of the buffers allows a sufficient amount of back and forth data whenever the data requested by the user changes, thereby minimizing the hard disk access frequency automatically.

4 is a flowchart illustrating a process of controlling hard disk write access according to an embodiment of the present invention.

In step 410, the CPU 150 and the DPU 160 confirm the co-work operation, and in step 420, the CPU 150 may call the hard disk write request API. Although steps 410 and 420 are shown in FIG. 4, this is for convenience of description and does not represent the temporal order of each step. Indeed, according to an embodiment of the present invention, step 410 may occur concurrently with step 420. That is, when the CPU 150 calls the hard disk write request API, it sends a signal to the DPU 160 to confirm that it is a write co-work operation between the CPU 150 and the DPU 160.

In step 430, the DPU 160 allocates a memory for writing data and maps a memory address to a hard disk write request application. Or the DPU 160 to the CPU 150, the CPU may map the memory address to the application. Also, while the DPU 160 allocates the memory, the DPU 160 may directly map the memory address to the application without going through the CPU.

In step 480, the CPU 150 continues writing to the thread. The DPU 160 then writes the data to the memory ring buffer allocated in step 450. In step 460, the DPU 160 may check whether the ring buffer is full using a stop bit.

Thereafter, in step 470, when the stop bit is ON, the DPU 160 can control to write data in the memory area to the hard disk.

More specifically, in step 450, the DPU 160 writes data to the Nth ring buffer. If the Nth ring buffer is full in step 460, the DPU 160 accesses the hard disk in step 470 to access the Nth ring buffer The data in the buffer can be moved to the hard disk. Then, the process returns to step 450 to continue writing the remaining data in the (N + 1) th ring buffer.

5 is a flowchart illustrating a process of controlling hard disk read access according to an embodiment of the present invention.

In step 510, the CPU 150 and the DPU 160 confirm the co-work operation. In step 520, the CPU 150 may call the hard disk read request API. Although steps 510 and 520 are shown in FIG. 5, step 510 may occur concurrently with step 520, according to an embodiment of the present invention. That is, when the CPU 150 calls the hard disk read request API, it sends a signal to the DPU 160 to confirm that it is a write co-work operation between the CPU 150 and the DPU 160.

At step 530, the DPU 160 may allocate memory to load data from the hard disk and map the memory address to the application. Specifically, when the CPU 150 transmits an address value to a memory allocated by the DPU 160, the CPU can map the memory address to the application. Also, while the DPU 160 allocates the memory, the DPU 160 may directly map the memory address to the application without going through the CPU.

In step 540, the DPU 160 may read the data from the hard disk and transfer the data to the memory. More specifically, the DPU 160 can read the data for a certain time T from the hard disk, and can apply the preset time offset to read data about the time before and after T together on the hard disk. Also, the DPU 160 can use the data memory address value by T as the offset of the ring buffer memory intermediate point.

Thereafter, in step 550, the DPU 160 may read the ring buffer, and in step 560, the CPU 150 may repeat the read operation to the Thread

The embodiments of the present invention disclosed in the present specification and drawings are merely illustrative of specific embodiments of the present invention and are not intended to limit the scope of the present invention in order to facilitate understanding of the present invention. It is to be understood by those skilled in the art that other modifications based on the technical idea of the present invention are possible in addition to the embodiments disclosed herein.

100: Embedded Systems
110: input unit
120:
140:
150: CPU
160: DPU
170:
180: RAM
190: Hard disk

Claims (8)

A method of controlling access to a hard disk of an embedded system,
Allocating memory in the form of a ring buffer and mapping the memory address of the allocated memory to the hard disk read application when a hard disk read application for an arbitrary time T is called;
Reading data corresponding to the time before and after the time T from the hard disk by applying a preset time offset; And
And loading data read from the hard disk into a ring buffer,
The step of loading the data into the ring buffer comprises:
Loading the data corresponding to the time before the time T among the data read from the hard disk into the first n-ring buffer and loading the data into the n-1 ring buffer when the space in the first n-ring buffer is insufficient;
Loading data corresponding to the time T among data read from the hard disk into the n-th ring buffer; And
The step of loading data corresponding to the time after the time T among the data read from the hard disk into the rear part of the n-th ring buffer and loading into the n + 1 ring buffer when the space in the rear part of the n-th ring buffer is insufficient ≪ / RTI > The method according to claim 1,
Allocating memory in the form of a ring buffer and mapping the memory address of the allocated memory to the hard disk writing application when the hard disk writing application is invoked;
Writing data to the first ring buffer while turning on a write bit of the first ring buffer;
Activating a stop bit of the first ring buffer if there is no empty space in the first ring buffer;
Loading data of the first ring buffer into the hard disk when the stop bit of the first ring buffer is activated and deactivating the stop bit of the first ring buffer when the data load is terminated;
Writing data to the second ring buffer while activating a write bit of the second ring buffer when a write bit or a stop bit of the first ring buffer is activated; And
Further comprising the step of inactivating the write bit of the first ring buffer and the write bit of the second ring buffer when data writing is terminated. delete delete delete delete delete delete

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