KR101414194B1 - Level detecting circuit of Electrostatic capacitance type - Google Patents

Level detecting circuit of Electrostatic capacitance type Download PDF

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Publication number
KR101414194B1
KR101414194B1 KR1020140033390A KR20140033390A KR101414194B1 KR 101414194 B1 KR101414194 B1 KR 101414194B1 KR 1020140033390 A KR1020140033390 A KR 1020140033390A KR 20140033390 A KR20140033390 A KR 20140033390A KR 101414194 B1 KR101414194 B1 KR 101414194B1
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South Korea
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circuit
flip
output
signal
flop
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KR1020140033390A
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Korean (ko)
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정경진
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금양산업(주)
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Publication of KR101414194B1 publication Critical patent/KR101414194B1/en
Priority to PCT/KR2015/002831 priority patent/WO2015142143A1/en

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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01FMEASURING VOLUME, VOLUME FLOW, MASS FLOW OR LIQUID LEVEL; METERING BY VOLUME
    • G01F23/00Indicating or measuring liquid level or level of fluent solid material, e.g. indicating in terms of volume or indicating by means of an alarm
    • G01F23/22Indicating or measuring liquid level or level of fluent solid material, e.g. indicating in terms of volume or indicating by means of an alarm by measuring physical variables, other than linear dimensions, pressure or weight, dependent on the level to be measured, e.g. by difference of heat transfer of steam or water
    • G01F23/26Indicating or measuring liquid level or level of fluent solid material, e.g. indicating in terms of volume or indicating by means of an alarm by measuring physical variables, other than linear dimensions, pressure or weight, dependent on the level to be measured, e.g. by difference of heat transfer of steam or water by measuring variations of capacity or inductance of capacitors or inductors arising from the presence of liquid or fluent solid material in the electric or electromagnetic fields
    • G01F23/263Indicating or measuring liquid level or level of fluent solid material, e.g. indicating in terms of volume or indicating by means of an alarm by measuring physical variables, other than linear dimensions, pressure or weight, dependent on the level to be measured, e.g. by difference of heat transfer of steam or water by measuring variations of capacity or inductance of capacitors or inductors arising from the presence of liquid or fluent solid material in the electric or electromagnetic fields by measuring variations in capacitance of capacitors
    • G01F23/266Indicating or measuring liquid level or level of fluent solid material, e.g. indicating in terms of volume or indicating by means of an alarm by measuring physical variables, other than linear dimensions, pressure or weight, dependent on the level to be measured, e.g. by difference of heat transfer of steam or water by measuring variations of capacity or inductance of capacitors or inductors arising from the presence of liquid or fluent solid material in the electric or electromagnetic fields by measuring variations in capacitance of capacitors measuring circuits therefor
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01FMEASURING VOLUME, VOLUME FLOW, MASS FLOW OR LIQUID LEVEL; METERING BY VOLUME
    • G01F23/00Indicating or measuring liquid level or level of fluent solid material, e.g. indicating in terms of volume or indicating by means of an alarm
    • G01F23/22Indicating or measuring liquid level or level of fluent solid material, e.g. indicating in terms of volume or indicating by means of an alarm by measuring physical variables, other than linear dimensions, pressure or weight, dependent on the level to be measured, e.g. by difference of heat transfer of steam or water
    • G01F23/26Indicating or measuring liquid level or level of fluent solid material, e.g. indicating in terms of volume or indicating by means of an alarm by measuring physical variables, other than linear dimensions, pressure or weight, dependent on the level to be measured, e.g. by difference of heat transfer of steam or water by measuring variations of capacity or inductance of capacitors or inductors arising from the presence of liquid or fluent solid material in the electric or electromagnetic fields
    • G01F23/263Indicating or measuring liquid level or level of fluent solid material, e.g. indicating in terms of volume or indicating by means of an alarm by measuring physical variables, other than linear dimensions, pressure or weight, dependent on the level to be measured, e.g. by difference of heat transfer of steam or water by measuring variations of capacity or inductance of capacitors or inductors arising from the presence of liquid or fluent solid material in the electric or electromagnetic fields by measuring variations in capacitance of capacitors
    • G01F23/268Indicating or measuring liquid level or level of fluent solid material, e.g. indicating in terms of volume or indicating by means of an alarm by measuring physical variables, other than linear dimensions, pressure or weight, dependent on the level to be measured, e.g. by difference of heat transfer of steam or water by measuring variations of capacity or inductance of capacitors or inductors arising from the presence of liquid or fluent solid material in the electric or electromagnetic fields by measuring variations in capacitance of capacitors mounting arrangements of probes

Abstract

According to an embodiment of the present invention, there is provided a capacitive water level sensing circuit comprising: a sensor bar for forming a first electrode; And a guard pipe in the form of a hollow tube for receiving a part of the sensor rod to form a second electrode. The guard pipe is integrated in a circuit board provided inside the guard pipe, A capacitance type water level sensing circuit for measuring a water level by sensing a change amount of capacitance through two electrodes, the capacitance type water level sensing circuit comprising: a variable capacitor for adjusting a capacitance to set a reference value; and a reference value of capacitance set in the variable capacitor, And outputs a high signal or a low signal by comparing capacitance values measured through the electrodes and the second electrode, A sensing circuit part including a sensing circuit; A first flip-flop in which an input / output port is opened or closed according to an output signal of the first control unit; and a voltage fl ow circuit or an integrating circuit as the input / output port of the fi rst flip- And outputting a high signal or a low signal by forming an integrating circuit or a voltage flow circuit as the input / output port of the first flip-flop is opened or closed; And a second control unit for outputting a high signal or a low signal in accordance with output signals of the first comparison unit and the second comparison unit; And an output circuit part for transmitting a high signal or a low signal to an external output terminal according to an output signal of the second control unit and receiving a direct current voltage for driving the circuit. According to the present invention, unnecessary and frequent sensing operations and chattering phenomena are prevented, so that the circuit operation is stable and reliability of water level sensing is improved.

Description

[0001] The present invention relates to a level detecting circuit of an electrostatic capacitance type,

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a capacitive water level sensing circuit, and more particularly, to a capacitive water level sensing circuit that senses a water level using a capacitance difference between a liquid-immersed portion and an unlocked portion.

Fluid level measurement techniques have evolved from float gauge, magnetic gauge to electronic gauge. A typical example of the electronic level measurement method is an electrostatic capacity type, which is an optimal method for simultaneously solving the error rate and the defective rate of the float-type or magnetic-type meter.

As shown in FIG. 1, the capacitance type water level sensor is a type for storing liquid, and includes a container body 1 having an outer wall as an outer electrode, And a controller 5 for measuring a water level according to a change in capacitance measured through the external electrode and the internal electrode, . Such a capacitive water level sensor senses the water level by detecting a capacitance change between the electrodes according to the liquid level between the internal electrode and the external electrode.

However, in general, the liquid stored in the container body is easily swung even by a small external shaking or the like, which causes the conventional capacitive water level sensor to repeatedly detect the water level in a very short time and inevitably cause chattering do.

Therefore, the conventional capacitive water level sensor causes a malfunction of the circuit due to unnecessary and frequent sensing operation and chattering phenomenon, shortening the lifetime of the device, and deteriorating reliability and durability.

KR 10-0859568 B1 KR 10-2013-0099300 A KR 20-0328796 Y1

It is an object of the present invention to solve the problems derived from the prior art, and to provide a capacitive water level sensing circuit for preventing unnecessary and frequent sensing operation and chattering due to liquid sloshing.

According to an embodiment of the present invention, the above-mentioned object is achieved by a capacitance type water level sensor comprising a sensor rod forming a first electrode and a guard pipe in the form of a hollow tube which receives a part of the sensor rod to form a second electrode, A capacitive water level sensing circuit integrated in a circuit board provided inside the guard pipe for sensing a change in capacitance through a first electrode and a second electrode to measure a water level, And a capacitance value measured through the first electrode and the second electrode is compared with a reference value of the capacitance set in the variable capacitor to set a high signal or a low signal A sensing circuit unit including a first control unit for outputting the first control unit; A first flip-flop in which an input / output port is opened or closed according to an output signal of the first control unit; and a voltage fl ow circuit or an integrating circuit as the input / output port of the fi rst flip- And outputting a high signal or a low signal by forming an integrating circuit or a voltage flow circuit as the input / output port of the first flip-flop is opened or closed; And a second control unit for outputting a high signal or a low signal in accordance with output signals of the first comparison unit and the second comparison unit; And an output circuit part for transmitting a high signal or a low signal to an external output terminal according to an output signal of the second control unit and receiving a DC voltage for driving the circuit, Lt; / RTI >

Here, the first comparison unit may include a second flip-flop and a third flip-flop in which an input / output port is opened or closed in accordance with an output signal of the first flip-flop, and the second flip-flop and the third flip- And a first comparator for outputting a high signal or outputting a low signal after a predetermined delay time as it is closed.

The second comparison unit includes a fourth flip-flop whose input / output port is opened or closed in accordance with an output signal of the first flip-flop, and a fourth flip-flop which has a high signal after a predetermined delay time And a second comparator for outputting or outputting a low signal.

The output circuit unit may include an NPN type first transistor connected to an output port of the second control unit and outputting a high signal or a low signal and a second transistor connected to the collector terminal of the first transistor, A third transistor of a PNP type which is connected to the base terminal of the second transistor and the emitter terminal to form a current limiting circuit together with the second transistor, and a resistor can do.

The output circuit unit may include an NPN type first transistor connected to an output port of the second control unit and transmitting a high signal or a low signal to an external output terminal, And a resistor and a second transistor of an NPN type connected to each other to form a current limiting circuit together with the first transistor.

According to the present invention, unnecessary and frequent sensing operations and chattering phenomena are prevented, so that the circuit operation is stable and reliability of water level sensing is improved.

FIG. 1 is a conceptual view for explaining a conventional capacitive water level sensor,
2 is a circuit diagram showing a capacitance type water level sensing circuit according to the first embodiment of the present invention,
3 is a circuit diagram showing a capacitance type water level sensing circuit according to a second embodiment of the present invention,
4 is a circuit diagram showing a capacitance type water level sensing circuit according to a third embodiment of the present invention,
5 is a circuit diagram showing a capacitance type water level sensing circuit according to a fourth embodiment of the present invention.
Fig. 6 is a circuit diagram showing an equivalent circuit of the current limiting circuit of Fig. 4,
7 is a circuit diagram showing an equivalent circuit of the current limiting circuit of Fig.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. Brief Description of Drawings FIG. 1 is a block diagram of a computer system according to an embodiment of the present invention; FIG. 2 is a block diagram of a computer system according to an embodiment of the present invention; FIG.

Particularly, the capacitance type water level sensing circuit according to the embodiment of the present invention includes a sensor bar 20 for forming a first electrode, a hollow tube 20 for accommodating a part of the sensor bar 20 and forming a second electrode, Type level detector including a guard pipe 40 of the type shown in FIG. 1, and this level sensing circuit is integrated on a circuit board provided inside the guard pipe 40 to form a first electrode and a second electrode The amount of change in capacitance is detected through the electrode and the water level is measured.

2 to 5, the capacitance type water level sensing circuit of the present invention applied to the above-described capacitance type water level sensor includes a sensing circuit unit 200, a delay circuit unit 400, and an output circuit unit (not shown) 600).

First, the sensing circuit unit 200 includes a variable capacitor 220 for adjusting a capacitance to set a reference value, a reference capacitance value set by the variable capacitor 220, and a reference capacitance value measured through the first and second electrodes And a first control unit 260 for comparing the capacitance values and outputting a high signal or a low signal. The sensing circuit unit 200 may further include a compensation capacitor 240 for compensating for a change in capacitance according to a temperature of the liquid to be sensed. The compensation capacitor 240 may be a stable and reliable So that the user can perform the operation.

The delay circuit 400 includes a first flip-flop 420 in which an input / output port is opened or closed according to an output signal of the first control unit 260, A first comparison unit 440 for forming a voltage flow circuit or an integrating circuit as the input / output port of the first flip-flop 420 is opened or closed to output a low signal or a high signal; A second comparing unit 460 for forming an integrating circuit or a voltage flow circuit in response to the output of the first comparing unit 440 and the second comparing unit 460, And a second control unit 480 for outputting a high signal or a low signal in accordance with the control signal.

Here, the first comparison unit 440 includes a second flip-flop 442 and a third flip-flop 444 in which an input / output port is opened or closed according to an output signal of the first flip-flop 420, And a first comparator 446 for outputting a high signal or a low signal after a predetermined delay time as the second flip-flop 442 and the third flip-flop 444 are opened or closed.

The second comparison unit 460 includes a fourth flip-flop 462 whose input / output port is opened or closed in accordance with an output signal of the first flip-flop 420, and a fourth flip- And a second comparator 464 for outputting a high signal or outputting a low signal after a predetermined delay time as it is opened or closed.

Next, the output circuit unit 600 transmits a high signal or a low signal to an external output terminal according to an output signal of the second control unit 480, and receives a DC voltage for driving the circuit.

As shown in FIGS. 2 and 3, the output circuit unit 600 may include chip-type third control units 620a and 620b, and may be classified into a PNP type and an NPN type according to output ports .

4, the output circuit unit 600 includes an NPN-type first transistor 621 connected to an output port of the second control unit 480 and outputting a high signal or a low signal, A PNP type second transistor 623 connected to the collector terminal of the first transistor 621 to transmit a high signal or a low signal to an external output terminal, A third transistor 625 and a resistor 627 of a PNP type which are respectively connected to the first and second transistors 621 and 622 and form a current limiting circuit CL1 together with the second transistor 623. [ Here, an equivalent circuit of the current limiting circuit CL1 may be configured as shown in FIG. This current limit circuit protects the circuit when the output signal is overloaded and protects the circuit when a reverse voltage is applied to the input and output signals.

5, the output circuit unit 600 may include an NPN-type first (first-in first-out) output terminal connected to the output port of the second control unit 480 and transmitting a high or low signal to an external output terminal, And an NPN type second transistor 645 connected to the base terminal and the emitter terminal of the first transistor 643 and forming a current limiting circuit CL2 together with the first transistor 643, And a resistor 647, as shown in FIG. Here, the equivalent circuit of the current limiting circuit CL2 may be configured as shown in Fig.

4 and 5, the output circuit unit 600 constitutes a separate power supply circuit 660 to receive a DC voltage for driving the circuit. The output circuit unit 600 receives the DC voltage for driving the circuit, The number of capacitors connected in parallel and the circuit configuration may vary depending on the capacitance.

Hereinafter, a circuit description according to various embodiments will be described based on the technical constitution of the present invention described above.

≪ Embodiment 1 >

2 is a circuit diagram showing a capacitive water level sensing circuit according to a first embodiment of the present invention.

When the sensor rod 20 and the guard pipe 40 are outside the liquid level, the first control unit 260 outputs a low signal. When the sensor rod 20 and the guard pipe 40 are immersed in the liquid, (260) outputs a low signal.

The first control unit 260 compares the capacitance of the sensor rod 20 and the guard pipe 40 with the capacitance of the variable capacitor 220 so that the capacitance of the sensor rod 20 And the capacitance measured by the guard pipe 40 is smaller than the capacitance of the variable capacitor 220, the first control unit 260 maintains the output of the low signal, and when the capacitance is larger than the capacitance of the variable capacitor 220 The first control unit 260 outputs a high signal. Here, the variable capacitor 220 is a trimmer that adjusts the sensitivity of the sensor rod 20.

When the output of the first control unit 260 is a low signal, the I / O pin of the first flip-flop 420 is opened and the second flip-flop 442 and the third flip- The I / O pin of the second flip-flop 442 and the third flip-flop 444 are closed and the capacitor C3 is short-circuited. Here, the first comparator 446 forms a voltage flow circuit so that the output becomes the voltage V1. The voltage V1 is in the low signal state and thus the second control unit 480 can not be set.

At this time, the C pin of the fourth flip-flop 462 is a low signal, and the I / O pin is opened so that the capacitor C4 forms an integration circuit through the resistor R6 together with the second comparator 464, 464 becomes a high signal and causes the second control unit 480 to be reset. Accordingly, the second control unit 480 outputs a low signal, the input terminal of the third control unit 620a becomes a low signal, and outputs a low signal through the PNP output port to the external output terminal OUTPUT .

When the sensor rod 20 and the guard pipe 40 are immersed in the liquid, the capacitance sensed by the sensor rod 20 becomes larger than the capacitance of the variable capacitor 220, so that the first control unit 260 outputs a high signal The I / O pin of the first flip-flop 420 is closed and the C pin of the second flip-flop 442 and the third flip-flop 444 are brought to the low-signal state. Accordingly, the first comparator 446 forms an integrating circuit by the capacitor C3 via the resistor R5, and outputs a high signal after a predetermined delay time, so that the second control unit 480 is set. The second control unit 480 outputs a high signal to cause the PNP output port of the third control unit 620a to output a high signal.

When the sensor rod 20 and the guard pipe 40 are not immersed in liquid, the capacitance detected by the sensor rod 20 becomes smaller than the capacitance of the variable capacitor 220, so that the first control unit 260 The I / O pin of the first flip-flop 420 is opened so that the C pin of the second flip-flop 442 and the third flip-flop 444 are brought into a high signal state, The first comparator 446 forms a voltage flow circuit to output the voltage V1, and the second control unit 480 outputs a low signal. At the same time, the C pin of the fourth flip-flop 462 becomes a low signal state, and the I / O pin is opened. Accordingly, the second comparator 464 short-circuits the capacitor C4 to form a voltage flow circuit, and the voltage V2 of the low signal state is outputted. Then, the integrated circuit of the resistor R6 and the capacitor C4 outputs a high signal after a predetermined delay time. 2 control unit 480 and the second control unit 480 outputs a low signal to cause the PNP output port of the third control unit 620a to output a low signal.

≪ Embodiment 2 >

3 is a circuit diagram showing a capacitance type water level sensing circuit according to a second embodiment of the present invention.

In the second embodiment, since the output port of the third control unit 620b is of the NPN type, only the output signal is opposite to the output signal of the first embodiment described above, and the remaining components are the same or extremely similar to each other, so a detailed description thereof will be omitted.

≪ Third Embodiment >

4 is a circuit diagram showing a capacitance type water level sensing circuit according to a third embodiment of the present invention.

When the sensor rod 20 and the guard pipe 40 are outside the liquid level, the first control unit 260 outputs a low signal. When the sensor rod 20 and the guard pipe 40 are immersed in the liquid, (260) outputs a low signal.

The first control unit 260 compares the capacitance of the sensor rod 20 and the guard pipe 40 with the capacitance of the variable capacitor 220 so that the capacitance of the sensor rod 20 And the capacitance measured by the guard pipe 40 is smaller than the capacitance of the variable capacitor 220, the first control unit 260 maintains the output of the low signal, and when the capacitance is larger than the capacitance of the variable capacitor 220 The first control unit 260 outputs a high signal. Here, the variable capacitor 220 is a trimmer that adjusts the sensitivity of the sensor rod 20.

When the output of the first control unit 260 is a low signal, the I / O pin of the first flip-flop 420 is opened and the second flip-flop 442 and the third flip- The I / O pin of the second flip-flop 442 and the third flip-flop 444 are closed and the capacitor C2 is short-circuited. Here, the first comparator 446 forms a voltage flow circuit so that the output becomes the voltage V1. The voltage V1 is in the low signal state and thus the second control unit 480 can not be set.

At this time, the C pin of the fourth flip-flop 462 also becomes a low signal to open the I / O pin and the second comparator 464 forms the integrating circuit by the capacitor C3 via the resistor R7, And the second control unit 480 is reset. Therefore, the low signal of the second control unit 480 is inputted to the base terminal of the first transistor 621 of the NPN type, and the base terminal of the PNP type output second transistor 623 connected to the collector terminal is set to the high state, And the emitter terminal of the second transistor 623 outputs a low signal.

When the sensor rod 20 and the guard pipe 40 are immersed in the liquid, the capacitance sensed by the sensor rod 20 becomes larger than the capacitance of the variable capacitor 220, so that the first control unit 260 outputs a high signal The I / O pin of the first flip-flop 420 is closed and the C pin of the second flip-flop 442 and the third flip-flop 444 are brought to the low-signal state. Therefore, the integrated circuit is formed by the resistor R5 and the capacitor C2, and a high signal is output after a predetermined delay time, so that the second control unit 480 is set. Therefore, the high signal of the second control unit 480 is input to the base terminal of the first transistor 621 of the NPN type to drive the base terminal of the PNP type output second transistor 623 connected to the collector terminal, The emitter terminal of the second transistor 623 outputs a high signal.

When the sensor rod 20 and the guard pipe 40 are not immersed in liquid, the capacitance detected by the sensor rod 20 becomes smaller than the capacitance of the variable capacitor 220, so that the first control unit 260 The I / O pin of the first flip-flop 420 is opened and the C pin of the second flip-flop 442 and the third flip-flop 444 are brought to the high signal state. At this time, the second flip- The I / O pins of the first flip-flop 442 and the third flip-flop 444 are closed to short-circuit the capacitor C2 so that the first comparator 446 forms a voltage flow circuit and outputs a low voltage of the voltage V1, (480). At the same time, the C pin of the fourth flip-flop 462 becomes a low signal state, and the I / O pin is opened. Accordingly, the second comparator 464 short-circuits the capacitor C3 to form a voltage flow circuit. The second comparator 464 outputs a high signal after a predetermined delay time by the integration circuit of the resistor R6 and the capacitor C4, So that the second control unit 480 is reset.

<Fourth Embodiment>

5 is a circuit diagram showing a capacitance type water level sensing circuit according to a fourth embodiment of the present invention.

Since the first transistor 643 for the output of the output circuit 640 is of the NPN type, the fourth embodiment is opposite to the output signal of the third embodiment described above, and the remaining components are the same or extremely similar to each other, .

According to the capacitance type water level detection circuit of the present invention described above, unnecessary and frequent sensing operation and chattering phenomenon can be prevented by outputting a change in the capacitance detected from the sensor rod and the guard pipe with a delay time. The circuit operation is stable and the reliability of the water level detection is improved.

The foregoing has outlined rather broadly the features and technical advantages of the present invention in order that the claims of the invention to be described below may be better understood. The embodiments described above are susceptible to various modifications and changes within the technical scope of the present invention by those skilled in the art. These various modifications and changes are also within the scope of the technical idea of the present invention and will be included in the claims of the present invention described below.

20: sensor rod (first electrode) 40: guard pipe (second electrode)
200: sensing circuit section 220: variable capacitor
240: compensation capacitor 260: first control unit
400: delay circuit section 420: first flip flop
440: first comparison unit 442: second flip-flop
444: third flip-flop 446: first comparator
460: second comparison unit 462: fourth flip-flop
464: second comparator 480: second control unit
600: output circuit section 620, 640: output circuit
620a, b: third control unit 621: first transistor (NPN)
623: second transistor (PNP) 625: third transistor (PNP)
627: Resistor 643: First transistor (NPN)
645: second transistor (NPN) 647: resistor
660: Power supply circuit CL1, CL2: Current limiting circuit

Claims (5)

The present invention is applicable to a capacitive water level sensor including a sensor bar for forming a first electrode and a hollow pipe-type guard pipe for receiving a part of the sensor rod to form a second electrode. A capacitive water level sensing circuit integrated on a circuit board for sensing a change in capacitance through a first electrode and a second electrode to measure a water level,
A variable capacitor for adjusting a capacitance to set a reference value and a capacitance value measured through the first electrode and the second electrode by comparing a reference value of capacitance set in the variable capacitor with a capacitance value measured by a high signal or a low ) Sensing circuit portion including a first control unit for outputting a signal;
A first flip-flop in which an input / output port is opened or closed according to an output signal of the first control unit; and a voltage fl ow circuit or an integrating circuit as the input / output port of the fi rst flip- And outputting a high signal or a low signal by forming an integrating circuit or a voltage flow circuit as the input / output port of the first flip-flop is opened or closed; And a second control unit for outputting a high signal or a low signal in accordance with output signals of the first comparison unit and the second comparison unit; And
An output circuit for transmitting a high signal or a low signal to an external output terminal according to an output signal of the second control unit and receiving a DC voltage for driving the circuit;
Wherein the capacitance-type water level sensing circuit comprises:
The method according to claim 1,
Wherein the first comparison unit comprises:
A second flip-flop and a third flip-flop whose input and output ports are opened or closed in accordance with an output signal of the first flip-flop,
And a first comparator for outputting a high signal or a low signal after a predetermined delay time as the second flip-flop and the third flip-flop are opened or closed.
The method according to claim 1,
Wherein the second comparison unit comprises:
A fourth flip-flop whose input / output port is opened or closed in accordance with the output signal of the first flip-flop,
And a second comparator for outputting a high signal or outputting a low signal after a predetermined delay time as the first and second flip-flops are opened or closed.
The method according to claim 1,
The output circuit section includes:
A first transistor of an NPN type connected to an output port of the second control unit and outputting a high signal or a low signal,
A second transistor of a PNP type connected to a collector terminal of the first transistor and transmitting a high signal or a low signal to an external output terminal,
A third transistor of a PNP type connected to the base terminal and the emitter terminal of the second transistor and forming a current limiting circuit together with the second transistor; and a resistor.
The method according to claim 1,
The output circuit section includes:
A first transistor of an NPN type connected to an output port of the second control unit for transmitting a high signal or a low signal to an external output terminal,
And an NPN type second transistor connected to the base terminal and the emitter terminal of the first transistor to form a current limiting circuit together with the first transistor, and a resistor.
KR1020140033390A 2014-03-21 2014-03-21 Level detecting circuit of Electrostatic capacitance type KR101414194B1 (en)

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PCT/KR2015/002831 WO2015142143A1 (en) 2014-03-21 2015-03-23 Capacitive water level detection circuit

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102158597B1 (en) 2020-04-23 2020-09-22 주식회사 이노퀘스트 An Apparatus for measuring water level using resistance measuring method of interval of electrodes and method thereof

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110998248B (en) * 2017-08-09 2022-05-03 代傲表计有限公司 Measuring device for determining a fluid parameter relating to a fluid and/or a fluid flow

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR890004951B1 (en) * 1987-04-11 1989-12-02 재단법인 한국전자 통신연구소 Water level detective circuit
JPH08327434A (en) * 1995-05-29 1996-12-13 Kuramo Denko Kk Water-level detection apparatus
KR101118916B1 (en) 2011-07-18 2012-02-27 주식회사 동양이지텍 Water level displaying circuit for boiler of hot-water heating mat

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR890004951B1 (en) * 1987-04-11 1989-12-02 재단법인 한국전자 통신연구소 Water level detective circuit
JPH08327434A (en) * 1995-05-29 1996-12-13 Kuramo Denko Kk Water-level detection apparatus
KR101118916B1 (en) 2011-07-18 2012-02-27 주식회사 동양이지텍 Water level displaying circuit for boiler of hot-water heating mat

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102158597B1 (en) 2020-04-23 2020-09-22 주식회사 이노퀘스트 An Apparatus for measuring water level using resistance measuring method of interval of electrodes and method thereof

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