KR101351150B1 - Cog dielectric composition for use with nickel electrodes - Google Patents

Abstract

FIELD OF THE INVENTION The present invention relates to multilayer ceramic chip capacitors, wherein the capacitors produced according to the present invention meet COG requirements and are suitable for reducing ambient sintering conditions, allowing nonmetals such as nickel or nickel alloys to be used for internal and external electrodes. These capacitors exhibit desirable dielectric properties (high capacitance, low dissipation factor, high insulation resistance), good performance in very accelerated life tests, and very good resistance to dielectric breakdown. The dielectric layer comprises a strontium zirconate matrix doped with various metal oxides such as TiO ₂ , MgO, B ₂ O ₃ , CaO, A1 ₂ O ₃ , SiO ₂ and SrO in various combinations. 1 is a cross-sectional view of a multilayer ceramic chip capacitor 1 according to an embodiment of the invention. The external electrode 4 of the capacitor 1 is arranged in electrical connection with the internal electrode layer 3 on the side of the capacitor chip 1. Capacitor chip 1 has a plurality of alternatingly stacked dielectric layers 2.

Multilayer ceramic chip capacitor, external electrode, internal electrode, metal oxide, dielectric property

Description

COG DIELECTRIC COMPOSITION FOR USE WITH NICKEL ELECTRODES

FIELD OF THE INVENTION The present invention relates to zirconate titanate-based dielectric compositions, and more particularly to strontium-zirconate, which can be used to form multilayer ceramic chip capacitors having internal base metal electrodes made of nickel or nickel alloys. A titanate-based dielectric composition.

Multilayer ceramic chip capacitors are widely used as miniature-sized high capacitance and highly reliable electronic components. As the demand for high performance electronic equipment increases, multilayer ceramic chip capacitors are also facing market demands for smaller size, higher capacitance, lower cost and higher reliability.

Multilayer ceramic chip capacitors are generally fabricated by forming alternating layers of internal electrode forming pastes and dielectric layer-forming pastes. Such layers are generally formed by sheeting, printing or similar techniques, followed by co-firing.

In general, the internal electrode consists of a conductor such as palladium, gold, silver or an alloy thereof. Palladium, gold and silver are expensive but can be partially replaced by using relatively inexpensive base metals such as copper and alloys thereof. "Base metal" is a conductive metal other than gold, silver, palladium and platinum. The nonmetal internal electrode can be oxidized when fired in the atmosphere, so that the dielectric layer and the internal electrode layer must be cofired in a reducing atmosphere. However, firing in a reducing atmosphere causes the dielectric layer to be reduced, which reduces electrical resistivity. Although multilayer ceramic chip capacitors using non-reducing dielectric materials have been proposed, such devices generally have a short lifetime and low reliability of insulation resistance (IR).

The Electronics Industry Association (EIA) defines criteria for the temperature coefficient of capacitance (TCC), known as COG characteristics. The COG characteristic requires that the change in capacitance be less than ± 30 ppm / ° C over the temperature range of -55 ° C to + 125 ° C. COG parts do not exhibit any capacitance aging.

Summary of the Invention

The present invention provides a dielectric composition that can be used to make ceramic multilayer capacitors that conform to internal electrodes containing a nonmetal such as nickel or a nickel alloy. The capacitor can be formed from the dielectric composition of the present invention to exhibit a stable dielectric constant with little dielectric loss and excellent reliability under very accelerated life test conditions.

The dielectric composition of the present invention comprises a constant dense microstructure of grain having an average diameter of about 0.5-3 microns. Constant and dense grain microstructure is important for achieving high reliability multilayer capacitors with dielectric layers thinner than 5 microns.

In one embodiment, the dielectric composition of the present invention comprises a blend of oxides of strontium, titanium and zirconium prior to firing. Oxides may be added to help sinter, such as MgO, B ₂ O ₃ and MgO—CaO—SrO—Al ₂ O ₃ —SiO ₂ . Another embodiment of the invention is an electronic device comprising a multilayer chip comprising a dielectric layer comprising a strontium-zirconate-titanate mix and a magnesium oxide-boron oxide mix. Another embodiment of the invention is an electronic device comprising a multilayer chip comprising a dielectric layer comprising a strontium zirconate titanate mix and a MgO—CaO—SrO—Al ₂ O ₃ —SiO ₂ mix.

In another embodiment, the present invention provides a method of forming an electronic component comprising applying a particle of a dielectric material to a substrate and firing the substrate at a temperature sufficient to sinter the dielectric material, Includes the blend (wt%) of the ingredients in Table 1 before. Each numerical value (percent, temperature, etc.) in the present invention is considered to be "about."

Oxide composition of dielectric composition SrO ZrO ₂ TiO ₂ B ₂ O ₃ MgO wt% 41.5-48.5 47-55 0.5-2.5 0.05-3 0.05-1.5

Another route is to start with strontium carbonate, titanium dioxide and zirconium oxide. The composition can also be prepared by firing a blend of one or more pre-reacted oxides, such as SrTiO ₃ or SrZrO ₃ . In this regard, the composition of Table 2 results in almost the same dielectric material as that produced with the composition of Table 1.

Another composition of genetic material SrCO ₃ TiO ₂ ZrO ₂ MgO B ₂ O ₃ wt% 52.0-56.0 1.0-2.0 41.0-45.0  0.05-1.5  0.05-3.0

In yet another embodiment, the dielectric material comprises a blend (wt%) of the ingredients in Table 3 prior to firing.

Another composition of the dielectric composition SrO ZrO ₂ TiO ₂ MgO CaO Al ₂ O ₃ SiO ₂ wt% 44.2-45.6 50.2-51.8 1.5-1.6 0.1-0.4 0-0.3 0.3-1.2 0.5-2.2

Another embodiment of the invention is a multilayer ceramic chip capacitor comprising alternatingly stacked layers of dielectric material and internal electrode material comprising a transition metal other than Ag, Au, Pd or Pt. Or a sintered blend of any of the three compositions. Another embodiment is a lead and cadmium free dielectric paste comprising a solid portion, the solid portion comprising a glass component, wherein the glass component comprises the components of Table 1, Table 2 or Table 3 prior to firing.

These and other features of the present invention are described in greater detail below, which is set forth in the following description that sets forth claims and particular implementations of the invention, but they are indicative of some of the various ways in which the principles of the invention may be employed .

1 is a cross-sectional view of a multilayer ceramic chip capacitor according to an embodiment of the present invention.

Multilayer chip capacitors are fabricated by alternately stacking dielectric layers and internal electrode layers to form green chips. The internal electrode here consists of a nonmetal comprising nickel or a nickel alloy. The dielectric composition forming the dielectric layer is made by wet milling a part of a dielectric having an organic vehicle system. The dielectric composition is deposited on a carrier film such as polyester or polypropylene or a substrate such as stainless steel, a belt such as paper or a substrate such as alumina or glass to coat the film and form a sheet, which is stacked alternately with the electrode to produce a green chip. Form.

After the green chip is formed, the organic vehicle is removed by heating to 350 ° C. or less in the atmosphere. When the vehicle is removed, the green chip is calcined in a reducing atmosphere of wet nitrogen and hydrogen having an oxygen partial pressure of about 10 ^-12 -10 ^-8 atm at a temperature of about 1200-1350 ° C. Various heating profiles can be used to remove the binder and firing the chips.

The form of multilayer ceramic capacitors is well known in the art. In FIG. 1 an exemplary structure of a multilayer ceramic capacitor 1 is shown. The external electrodes 4 of the capacitors 1 are arranged in electrical connection with the internal electrode layers 3 on the side surfaces of the capacitor chips 1. The capacitor chip (1) has a plurality of alternately stacked dielectric layers (2). The shape of the capacitor chip 10 is mainly rectangular but not important. In addition, size is not critical and chips may generally have suitable dimensions depending on the particular application in the range 1.0-5.6 mm x 0.5-5.0 mm x 0.5-1.9 mm. The internal electrode layers 3 are stacked so that they are alternately exposed at the opposite end of the chip 1 at the opposite end. That is, one group of the internal electrode layers 3 is exposed at one side of the chip 1, and the other group of internal electrode layers 3 is exposed at the opposite side of the chip 1. One outer electrode 4 is applied to one side of the capacitor chip 1 in electrical contact with one group of the inner electrode layers 3 and the other outer electrode 4 is connected to the other group of the inner electrode layers 3, And is applied to the opposite side of the chip 1 in contact.

The dielectric layer consists of a dielectric material made by sintering a blend comprising oxides of strontium, titanium and zirconium as shown in Tables 1, 2 or 3. Sintering aids including B ₂ O ₃ , MgO or MgO—CaO—Al ₂ O ₃ —SiO ₂ —SrO may also be useful.

Another route is to start with strontium titanate and strontium zirconate as in Tables 4 or 5. The hydroxides of these oxides or other forms such as carbonates, acetates, nitrates and organometallic compounds such as metal formates, oxalates, etc., have the same effect as long as the desired metal ions are provided in a predetermined amount. It is apparent to those familiar with the technology.

Another composition of the dielectric composition SrTiO ₃ SrZrO ₃ B ₂ O ₃ MgO wt% 1-7 89-98 0.05-3 0.05-1.5

Another composition of the dielectric composition wt% SrCO ₃ SrZrO ₃ SrTiO ₃ SrO ZrO ₂ TiO ₂ MgO CaO Al ₂ O ₃ SiO ₂ A 50-58 0-0.5 40-46 0.5-3 0.05-1 0-1 0.05-2 0.05-3 B 90-96.5 2-5 0-1 0.05-2 0-1 0.05-2.5 0.05-3.5 C 92.5-95.4 3.5-3.6 0.1-0.4 0-0.3 0.3-1.2 0-0.3 D 41.5-48.5 47-55 0.5-2.5 0.05-1 0-0.5 0.05-2.5 0.05-3.5

Other compounds may also be present in the dielectric material provided they do not adversely affect the dielectric properties. Such materials are commonly found in raw materials as impurities.

The dielectric compositions of the present invention generally have microcrystalline grains having an average size of about 0.5-3 microns with a grain size of about 0.7 microns or less.

Each dielectric layer has a thickness of about 50 microns or less. Preferably, the thickness of each dielectric layer is about 0.5-50 microns. More preferably, the thickness of each dielectric layer is about 2-10 microns. The compositions of the present invention can be used to make multilayer ceramic chip capacitors with thin dielectric layers to ensure minimal sensitivity of the capacitance over the period of use. The number of dielectric layers stacked in the chip capacitor is generally about 2-800, preferably about 3-400.

The multilayer ceramic chip capacitor of the present invention is generally manufactured by using a paste to form green chips and firing the green chips by conventional printing and sheeting methods. After firing, the chips are dry tumbled onto media such as alumina and silica to round the corners. Thereafter, for example, a conductive paste containing copper is applied to both ends to connect the exposed internal electrodes together to make ends. The chip is then fired at about 800 ° C. in a dry nitrogen atmosphere for about 10 minutes-2 hours to sinter the solid conductive pads with the conductors (eg copper) at both ends to form a multilayer capacitor. The end is the external electrode 4 as shown in Fig.

Dielectric paste

Pastes for forming the dielectric layer can be obtained by mixing the organic vehicle with the raw dielectric material as described herein. Also useful are precursor compounds that convert to oxides and complex oxides upon firing as described above. Dielectric materials are obtained by selecting these oxides or compounds containing precursors of these oxides and mixing them in appropriate proportions. The proportion of such compounds in the raw dielectric material is determined so that the desired dielectric layer composition can be obtained after firing. The raw dielectric material is generally used in powder form with an average particle size of about 0.1-3 microns, more preferably about 1 micron or less.

abandonment Vehicle

The organic vehicle is a binder in an organic solvent or a binder in water. The choice of binders used here is not important; Conventional binders such as ethyl cellulose, polyvinyl butanol, ethyl cellulose and hydroxypropyl cellulose and combinations thereof are suitable with solvents, although organic solvents are also not important for certain applications (i.e. printing or sheeting). According to butyl carbitol, acetone, toluene, ethanol, diethylene glycol butyl ether; 2,2,4-trimethyl pentanediol monoisobutyrate (Texanol ^® ); Alpha-terpineol; Beta-terpineol; Gamma terpineol; Tridecyl alcohol; Diethylene glycol ethyl ether (Carbitol ^® ). Diethylene glycol butyl ether (Butyl Carbitol ^®), and propylene glycol; ≪ / RTI > and blends thereof. Products sold under the trademark of Texanol ^® and is available from the companion (Eastman Chemical Company), Eastman Chemical Company, which located in the United States, Tennessee, Kingsport; Those sold under the trademarks Dowanol ^® and Carbitol ^® are available from Dow Chemical Co., Midland, Mich., USA.

Optionally, it can be selected from polyvinyl alcohol (PVA) or polyvinyl acetate (PVAC) in combination with water. It should be noted that PVA and PVAC are generally not compatible with the boron-containing ceramic dielectric powder. Aqueous slurries containing boron-containing glasses with PVA and / or PVAC tend to undergo severe gelling. Thus, ceramic dielectric powders that do not contain boron as described in the present invention are particularly important for aqueous slurry processing.

There is no particular limitation on the organic vehicle content of each paste (dielectric or electrode paste). The paste often contains about 1-5 wt% binder and about 10-50 wt organic solvent, with the balance being a metal component (relative to the electrode) or a dielectric component (relative to the dielectric layer). If desired, each paste may contain up to about 10 wt% of other additives such as dispersants, plasticizers, dielectric compounds, and insulating compounds.

Internal electrode

Pastes for forming the inner electrode layer are obtained by mixing the electrically-conductive material with the organic vehicle. Conductive materials used herein include conductive metals and alloys as described above and various compounds that convert, for example, oxides, organometallic compounds and resinates to such conductive metals upon firing. An example of a suitable nickel paste is the EL51-012 nickel paste from Ferro Corporation.

Referring to FIG. 1, the conductor forming the inner electrode layer 3 is preferably used but not important because the dielectric metal of the dielectric layer 2 has reducing resistance. Common base metals include nickel and its alloys. Preferred nickel alloys contain at least one other metal selected from Mn, Cr, Co, Cu and Al. Alloys containing at least about 95 wt% nickel are preferred. It should be appreciated that nickel and nickel alloys may contain up to about 0.1 wt% phosphorous and other minor components (i.e., impurities). The thickness of the internal electrode layer can be adjusted to suit a particular application, but is generally less than about 5 microns in thickness. Preferably, the inner electrode layer has a thickness of about 0.5-5 microns, more preferably about 1-5 microns.

External electrode

The conductors forming the outer electrode 4 are preferably but not critical, such as inexpensive metals such as copper, nickel and their alloys optionally containing Mn, Cr, Co or Al. The thickness of the outer electrode layer can be adjusted to suit a particular application but is generally about 10-50 microns or less, preferably about 20-40 microns. The paste for forming the external electrode is produced in the same manner as for the internal electrode.

The green chip may be fabricated from a dielectric layer-forming paste and an internal electrode layer-forming paste. In the case of the printing method, the green chip alternately prints a paste in the form of lamina on a substrate of a polyester film (e.g., polyethylene terephthalate (PET)) and cuts the lamina stack into a predetermined shape. It is prepared by separating from the substrate. Useful is also made by green chips forming green sheets from dielectric layer-forming pastes, printing internal electrode layer-forming pastes on each green sheet, and stacking printed green sheets. After the organic vehicle is removed from the green chip, it is fired. The organic vehicle has a holding temperature of about 150-350 ° C., preferably about 200-300 ° C., more preferably about 250 ° C. at a rate of 0.01-20 ° C./hour, more preferably 0.03-0.1 ° C./hour in the atmosphere. And heating under a holding time of about 30-700 minutes, preferably about 200-300 minutes.

Plasticity

The green chip is fired in an atmosphere determined by the type of conductor in the internal electrode layer-forming paste. When the electrode layer is made of a base metal conductor such as nickel and nickel alloy, the firing atmosphere is 10 ^-12 may have an oxygen partial pressure of 10 ^-8 atm. Sintering at a partial pressure of less than 10 ^-12 atm should be avoided at such low pressures, as the conductors can be abnormally sintered and shorted from the dielectric layer. At oxygen partial pressures above about 10 ⁻⁸ atm, the inner electrode layer may be oxidized. Most preferred is an oxygen partial pressure of about 10 ⁻¹¹ −10 ⁻⁹ atm.

For firing the temperature is raised from room temperature to a peak temperature of about 1150-1350 ° C, more preferably about 1250-1350 ° C. This temperature is maintained for about 2 hours to enhance densification. Lower holding temperatures provide insufficient densification while higher holding temperatures can result in very large grains. The firing is preferably carried out in a reducing atmosphere. Exemplary firing environments include humidified N ₂ or humidified mixtures of N ₂ and H ₂ gases. The sinter ramp rate is about 50-500 ° C./hour, preferably about 200-300 ° C./hour; A holding temperature of about 1200-1350 ° C., preferably about 1250-1350 ° C., and more preferably about 1275-1325 ° C. The holding time is about 0.5-8 hours, preferably about 1-3 hours; The cooling rate is 50-500 ° C./hour, preferably 200-300 ° C./hour.

Organic vehicle removal and firing can be performed continuously or individually. Continuous processes include removing the organic vehicle, changing the atmosphere without cooling, heating to the firing temperature, maintaining the temperature for a certain period of time, and then cooling. In the individual case, the organic vehicle is removed and after cooling the temperature of the chip is raised to the sintering temperature and the atmosphere is changed to a reducing atmosphere.

The resulting chip may be polished at the end face, for example, by barrel tumbling and / or blasting before the external electrode-forming paste is printed or conveyed and fired to form an external electrode (end). Firing of the external electrode-forming paste may be performed in a dry nitrogen atmosphere (about 10 ⁻⁶ atm oxygen partial pressure) at about 600-800 ° C. for about 10 minutes −1 hour.

If necessary, the pad is formed on the external electrode by plating or other methods known in the art. The multilayer ceramic chip capacitor of the present invention can be installed on a printed circuit board by, for example, welding.

The following examples are provided to illustrate preferred embodiments of the present invention and are not intended to limit the scope of the invention.

survey( Overview )

Multilayer ceramic capacitors having 10 active layers of pure nickel electrodes each layer having a thickness of 5-10 microns were prepared and sintered at 1275-1350 ° C. in a reducing atmosphere (10 ⁻¹¹ −10 ⁻⁸ atm pO 2). Physical burn and electrical measurements were performed. The fired chip exhibited a dielectric permeability of at least 30, DF <0.1% at 1 MHz, a TCC of less than ± 30 ppm / ° C at -55-+ 125 ° C, IR> 1013 ohms at 25 ° C, and IR> 1012 ohms at 125 ° C. . Dielectric breakdown voltage exceeds 140V / micron. The reliability test was performed by applying a 300V DC voltage to the chip at 140 ° C. No failure was observed after 115 hours.

Example  One

Appropriate amounts of oxides as shown in Table 6 were mixed, blended, and / or milled in water to form the dielectric composition represented as precursor 1. The powder is polymerized with 1% Darvan ^® C, a polymer deflocculant available from RT Vanderbilt Co, Inc, Norwich, Connecticut, USA, and high shear (~ 5000 / min. Mixed). The mixed powder was bead milled to particle D50 of about 0.64 microns using 0.5 mm YTZ (Yttria stabilized zirconia). This powder was calcined at 1200 ° C. for 5 hours. The calcined powder was ground by conventional means to give precursor 1.

Composition of precursor 1 before calcination SrCO ₃ ZrO ₂ TiO ₂ wt% 54.901 43.761 1.337

Optionally, the composition of Precursor 1 after calcination can be represented by the following expression: SrZr _0.955 Ti _0.045 0 ₃ . Precursor 1 was added ₂ MgO * 3 B ₂ O ₃ (as a combination of Mg (OH) ₂ and H ₃ BO ₃ ) as sintering flux according to the composition of Table 7. Again, the blended powder was mixed at high shear (about 5000 / min) and bead milled to about 0.40 micron of particle D50 using 0.5 mm YTZ, then dried and ground by conventional means to provide the dielectric powder of Example 1 did.

Example 1 Composition of Dielectric Powder Before Firing Precursor 1 Mg (OH) ₂ H ₃ BO ₃ wt% 98.377 0.787 0.836

The powder of Example 1 contains a combination of simple oxides as described in Table 8 and optionally has a formula that can be expressed as follows: 98.979 wt% SrZr _0.955 Ti _0.045 0 ₃ + 0.547 wt% MgO + 0.474 wt% B ₂ O ₃ .

Example 1 Oxide Components of Dielectric Powders SrO ZrO ₂ TiO ₂ MgO B ₂ O ₃ wt% 45.606 51.791 1.583 0.547 0.474 Mol% 48.869 46.669 2.199 1.507 0.756

The final powder had an average particle size of 0.3-1 micron. 100 g of this powder was added to 28.8 g of organic vehicle comprising polyvinyl butanol, toluene and ethynol and wet milled for 24 hours to prepare a slurry for tape casting. This wet slurry was coated onto a polyester film to produce a dielectric green tape. The thickness of the dielectric green tape was about 5-15 microns depending on the specific test to be performed on them. Nickel electrodes were printed on dry green dielectric tape by conventional screen-printing methods using conventional nickel pastes. A total of 10 sheets were stacked and bonded under pressure of 5100 psi and a temperature of 130 ° F. (54 ° C.) to make green chips. After sintering and shrinking (which is typically 15-20% in both X and Y directions) the chip has dimensions of about 0.12 "(L) x 0.06" (W) (EIA1206 size) or 0.08 "(L) x 0.05" ( W) After dicing to the appropriate dimensions to be (EIA0805 size), the green chip was heated to remove the organic vehicle according to the combustion cycle of Table 9.

Binder Removal Condition step Temperature (℃ ) Time (minutes) atmosphere Lamp from room temperature 265 1200 Waiting Immersion ( Soak ) 265  240 Waiting Cool to room temperature  25 Up to reach 25 ℃ Waiting

In all embodiments, the chip is first removed from the binder at a temperature of 265 ° C. (Table 9) and 1250-1350 in a gas mixture of N ₂ / H ₂ / H ₂ O at a pO ₂ of 101 ⁻¹¹ −10 ⁻⁸ atm. Sintered at a temperature of ℃. The gas mixture was achieved by humidifying N2 / H2 through a wetting machine with a water temperature of 35 ° C. Thereafter, corner rounding was performed by tumbling to obtain a chip. An external electrode forming paste available from Ferro Corporation, Cleveland, Ohio was applied to the end surface and baked in a dry nitrogen atmosphere at 775 ° C. for about 70 minutes to form an external electrode. The multi-layer capacitors thus processed had dimensions of about 3.2 mm x 1.6 mm (EIA 1206 size) or about 2.1 mm x 1.3 mm (EIA0805 size) with various thicknesses. The dielectric layer was 6-15 microns thick and the inner nickel electrode layer was about 1.5 microns thick.

A multilayer chip capacitor was prepared and tested from the powder of Example 1. The firing conditions as well as the electrical properties are summarized in Table 10. All examples (1a-1g) in Table 10 were calcined at the indicated temperatures for 2 hours.

Firing Conditions and Electrical Properties for the MLCCs of Example 1 Example 1a 1b 1c 1d 1e 1f 1 g Sintering temperature (℃) 1275 1275 1300 1300 1325 1325 1325 pO ₂  ( ATM ) 10 ^-10 10 ^-11 10 ^-10 10 ^-11 10 ^-8 10 ^-9 10 ^-10 Dielectric layer  Thickness (micron) 5.0 4.7 5.1 5.0 5.2 5.0 5.4 Capacitance  ( pF ) 386.5 363.2 412.2 391.8 422.6 418.5 406.5 DF   (%) 0.019 0.003 0.007 0.008 0.023 0.013 0.023 Dielectric constant 30.0 27.9 34.8 32.5 38.4 36.3 29.5 TCC  ( ppm  / ℃) 25 ℃ -12.4 -12.2 -6.7 -12.2 -11.6 -8.8 -3.8 85 ℃ -2.2 -3.8 -0.3 -3.4 -7.8 -1.0 3.3 125 ℃ -1.8 -2.6 1.0 -2.2 -1.8 0.0 7.0 IR  (10 ¹² OHM ) 25 ℃ 900 760 270 440 390 660 420 125 ℃ 47.0 8.6  13.0 5.8 6.3 7.5 9.8 Breakdown voltage (V) 1060 945 977 880 1005 811 714

Example  2

As a sintering aid, precursor 1 was added a mixture of Mg (OH) ₂ , CaCO ₃ , Al ₂ O ₃ and SiO ₂ according to Table 11 (effectively after firing, MgO-CaO-Al ₂ O ₃ -SiO ₂ ). ). The powder was treated according to Example 1.

Example 2 Composition of Dielectric Material Before Firing Precursor Mg (OH) ₂ CaCO ₃ Al ₂ O ₃ SiO ₂     wt%  97.812  0.257  0.257  0.579  1.096

Example 2 of the powder has a formula that may be optionally expressed as a: 98.003 wt% of the _{SrZr O .955 Ti 0 .045 0 3} + 0.178 wt% of MgO + 0.144 wt% CaO + of 0.579 wt% Al ₂ O ₃ + 1.096 wt% SiO ₂ . The powder of Example 2 had the composition in Table 12 when expressed as a simple oxide.

Example 2 Oxide Components of Dielectric Powders SrO ZrO ₂ TiO ₂ MgO CaO Al ₂ O ₃ SiO ₂ Wt% 45.156 51.281 1.567 0.178 0.144 0.579 1.096 Mol% 48.288 46.115 2.173 0.489 0.285 0.629 2.021

The final powder of Example 2 was processed according to the procedure of Example 1 to fabricate MLCC chips for electrical testing. The electrical properties as well as the electrical properties are summarized in Table 13. Examples 2a-2d in Table 13 were calcined at the indicated temperatures for 2 hours.

Firing Conditions and Electrical Properties for the MLCCs of Example 2 Example 2a 2b 2c 2d Sintering Temperature (℃) 1300 1300 1325 1350 pO ₂  ( ATM ) 10 ^-10 10 ^-11 10 ^-10 10 ^-10 Dielectric layer  Thickness (micron) 12.3 11.3 11.0 10.9 Capacitance  ( pF ) 152.7 158.2 164.7 166.5 DF   (%) 0.005 0.070 0.010 0.007 Dielectric constant 31.2 32.3 31.4 31.5 TCC  ( ppm / ° C) 25 ℃ -4.8 -3.8 0.5 0.2 85 ℃ 4.5 4.0 7.3 7.2 125 ℃ 4.5 5.0 8.0 7.6 IR  (10 ¹² OHM ) 25 ℃ 100.0 31.0 5.0 34.0 125 ℃ 6.5 5.0 2.1 3.0 Breakdown voltage (V) 1726 909 1565 1562

Example  3-14

Depending on the composition of Examples 3-14 in Table 14, all or some of MgO ₅ , CaO, Al ₂ O ₃ , SiO ₂ and / or SrO as sintering aids were added to precursor 1 in varying amounts. Since the sintering aids in Examples 12, 13 and 14 contain SrO, the total SrO in these examples comes from both precursor 1 and from the sintering aid. The total weight of precursor 1 is the sum of the first three items (SrO, ZrO ₂ and TiO ₂ ) for Examples 3-14. For ease of comparison, the composition and MLCC electrical properties of Example 2 were also included in Tables 14 and 15.

Example 2-14 Oxide Component (wt%) of Powder Example SrO ZrO ₂ TiO ₂ MgO CaO Al ₂ O ₃ SiO ₂ SrO from Sintering Aids 2 45.156 51.281 1.567 0.178 0.144 0.579 1.095 0 3 44.236 50.236 1.535 0.355 0.288 1.158 2.192 0 4 45.616 51.803 1.583 0.089 0.072 0.290 0.548 0 5 45.160 51.286 1.567 0.204 0.108 0.579 1.096 0 6 45.165 51.291 1.567 0.230 0.072 0.579 1.096 0 7 45.170 51.296 1.567 0.255 0.036 0.579 1.096 0 8 45.174 51.307 1.567 0.281 0.000 0.579 1.096 0 9 45.305 51.450 1.572 0.178 0.144 0.581 0.770 0 10 45.355 51.506 1.574 0.178 0.145 0.582 0.661 0 11 45.405 51.563 1.575 0.179 0.145 0.582 0.551 0 12 45.173 52.265 1.566 0.178 0.108 0.579 1.096 0.036 13 45.190 51.249 1.566 0.177 0.072 0.579 1.095 0.072 14 45.221 51.218 1.565 0.177 0.000 0.578 1.095 0.146

The final powder of Example 3-14 was processed according to the procedure of Example 1 to prepare an MLCC chip for electrical testing. Firing conditions and electrical properties are summarized in Table 14. MLCCs were calcined for 2 hours each.

Example chips were prepared from the compositions of Examples 1-14, all very high

Dielectric constant, low DF, small plastic grain size and high breakdown voltage. The TCC meets the COG standard and the IRs at 25 ° C and 125 ° C both exceed EIA specifications.

Additional advantages and modifications will readily occur to those skilled in the art. Thus, in the broadest sense, the present invention is not limited to the specific details and exemplary embodiments described and illustrated herein. Accordingly, various modifications may be made without departing from the spirit and scope of the general inventive concept as defined in the appended claims.

Claims (20)

In a lead and cadmium free dielectric paste comprising a solid portion, the solid portion may be a. 41.5 wt%-48.5 wt% SrO, b. 47 wt%-55 wt% ZrO ₂ , c. 0.5 wt%-2.5 wt% TiO ₂ , d. 0.05 wt%-1.5 wt% MgO, and e. 0.05 wt%-3 wt% B ₂ O ₃ Dielectric paste comprising a. In the method for forming an electronic component, a. Applying the dielectric paste of claim 1 on a substrate, b. Firing the substrate to a temperature at which the dielectric material is sintered &Lt; / RTI &gt; The process according to claim 2, wherein firing is carried out at a temperature of 1200-1350 ° C. 3. The process of claim 2, wherein firing is performed in an atmosphere having a partial oxygen pressure of 10 ^-12 -10 ^-8 atm. In the multilayer ceramic chip capacitor, a. Alternatingly stacked layers of the dielectric material of claim 1, and b. Layer of internal electrode material comprising a transition metal other than Ag, Au, Pd or Pt Multilayer ceramic chip capacitors comprising a fired aggregate consisting of. 6. The multilayer ceramic chip capacitor of claim 5 wherein the internal electrode material comprises nickel. In the method for forming an electronic component, a.-i. A layer of oxide-containing dielectric material comprising the paste of claim 1, and    ii. Layer of metal-containing electrode paste    iii. Alternately applied on the substrate to form a lamina stack, b. Firing the substrate to a temperature at which the dielectric material is sintered, c. Cut the lamina stack into the desired shape, d. Separating the cut stack from the substrate, e. Sintering the metal in the electrode and firing the stack to fuse the oxide in the dielectric material, wherein the inner electrode and the dielectric material each have a single layer thickness. 8. The method of claim 7, wherein the layers of dielectric material after firing have a thickness of 1-50 microns. 8. The method of claim 7, wherein the firing is carried out at a temperature of 1200-1325 ° C. 8. The method of claim 7, wherein the firing is carried out in an atmosphere having a partial oxygen pressure of 10 ^-12 -10 ^-8 atm. 8. The method of claim 7, wherein the metal-containing electrode paste comprises nickel. In a lead and cadmium free dielectric paste comprising a solid portion, the solid portion may be a. 44.2 wt%-45.6 wt% SrO, b. 50.2 wt%-51.8 wt% ZrO ₂ , c. 0.1 wt%-0.4 wt% MgO, d. 1.5 wt%-1.6 wt% TiO ₂ , e. 0.3 wt%-1.2 wt% Al ₂ O ₃ , f. 0.5 wt%-2.2 wt% SiO ₂ , and g. 0.3 wt% or less CaO Dielectric paste comprising a. In the method for forming an electronic component, a. Applying the dielectric paste of claim 12 on a substrate, b. Firing the substrate to a temperature at which the dielectric material is sintered &Lt; / RTI &gt; The process according to claim 13, wherein the firing is carried out at a temperature of 1200-1350 ° C. and in an atmosphere having a partial oxygen pressure of 10 ⁻¹² −10 ⁻⁸ atm. In the method for forming an electronic component, a. Apply particles of sintered dielectric material onto the substrate, b. Sintering the dielectric material includes firing the substrate to a temperature, c. The dielectric material comprises any one composition selected from the group consisting of Composition 1, Composition 2, Composition 3, Composition 4 prior to firing,   i. Composition 1 1.1 wt% -7 wt% SrTiO ₃ , 2.89 wt% -98 wt% SrZrO ₃ , 3. 0.05 wt%-3 wt% B ₂ O ₃ , and        4. comprising 0.05 wt% -1.5 wt% MgO,   ii. Composition 2 1.52 wt% -56 wt% SrCO ₃ , 2. 41 wt%-45 wt% ZrO ₂ , 3. 1 wt% _-2 wt% TiO ₂ , 4. 0.05 wt%-3 wt% B ₂ O ₃ , and        5. comprises 0.05 wt% -1.5 wt% MgO,   iii. Composition 3 1.50 wt% -58 wt% SrCO ₃ , 2. 40 wt%-46 wt% ZrO ₂ , 3.0.5 wt%-3 wt% TiO ₂ ,        4. 0.05-1 wt% MgO, 5.0.05 wt%-2 wt% Al ₂ O ₃ , 6.0.05 wt%-3 wt% SiO ₂ ,        7. CaO, provided that the amount does not exceed 1 wt%, and        8. comprises SrO on the premise that the amount does not exceed 0.5 wt%,   iv. Composition 4 1.2 wt%-5 wt% SrTiO ₃ , 2. 90 wt%-96.5 wt% SrZrO ₃ ,        3. 0.05-2 wt% MgO, 4.0.05 wt%-2.5 wt% Al ₂ O ₃ , 5. 0.05 wt%-3.5 wt% SiO ₂ ,        6. SrO, provided that the amount does not exceed 1 wt%, and        7. CaO provided that the amount does not exceed 1 wt% &Lt; / RTI &gt; 16. The method of claim 15, wherein firing is performed at a temperature of 1200-1350 ° C. 16. The process of claim 15, wherein firing is performed in an atmosphere having a partial oxygen pressure of 10 ^-12 -10 ^-8 atm. 16. The method of claim 15, wherein firing is performed at a temperature of 1200-1325 ° C. The method of claim 15, wherein the dielectric material comprises composition 1 prior to firing. The method of claim 15, wherein the dielectric material comprises composition 3 prior to firing.

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