KR101336799B1 - Apparatus for reproducing and method for controlling timing - Google Patents

Abstract

The present invention provides a reproducing apparatus and a timing control method for minimizing a configuration while generating an accurate clock, freely designing and using a system, and enabling a seamless reproduction of video and audio data. The reproducing apparatus 100 of the present invention includes a tuner unit 120 for generating a second clock and supplying regeneration data, a data storage unit 130 for receiving regeneration data from the tuner unit 120 and storing regeneration data. A first clock is generated by receiving a second clock and a first clock from the decoder 140 and the decoder 140 that generate one clock, acquire playback data from the data storage unit 130, and reproduce the data. And a synchronization controller 150 that controls the reproduction timing of the decoder 140 based on the second clock.

Description

Apparatus for reproducing and method for controlling timing}

1 is a block diagram showing a configuration of a playback apparatus according to an embodiment of the present invention.

FIG. 2 is a block diagram illustrating a detailed configuration of a synchronization controller in the playback device of FIG. 1 according to an embodiment of the present invention.

3 is a flowchart illustrating an operation of a timing control method according to an exemplary embodiment of the present invention.

4 is a block diagram showing a configuration of a clock generation unit using the MPEG2-TS standard which can be included in the data receiving side according to the prior art.

5 is a block diagram showing the configuration of a receiver according to the prior art.

<Brief description of symbols for the main parts of the drawings>

100: playback device 110: antenna

120: tuner unit 130: data storage unit

140: decoder 150: synchronization control unit

152: first counter 154: second counter

156: comparison unit 160: first control signal output unit

162: second control signal output unit

The present invention relates to a playback apparatus and a timing control method.

In a video / audio transmission system such as a television broadcast or a video telephone, or a system for reproducing a recording medium such as an optical disk or a magnetic disk on which a signal such as a video / audio is recorded, in order to effectively use a data transmission path or a recording medium. In addition, a method of improving transmission efficiency by performing encoding with high efficiency is known. Such a coding scheme includes a moving picture expert group (MPEG). The MPEG system includes the MPEG-2 system and the MPEG-4 system as a standard for television broadcasting.

In the MPEG-2 system, not only an encoding standard, but also an MPEG-2 system for multiplexing and transmitting encoded signals is defined. The MPEG-2 system has a transmission standard called a transport stream (TS) and a transmission standard called a program stream (PS). Among them, the TS transmission standard is intended to be applied to broadcasting and communication, and is used as a digital broadcasting standard in many countries including Japan.

In a digital broadcasting system using the MPEG2-TS standard, a moving picture or audio is reproduced by receiving and decoding data containing a moving picture or audio encoded using the MPEG method at the transmitting side. The receiving side generates a clock for decoding and performs decoding processing on the video or audio data based on the generated clock. As a decoding processing control method, there is, for example, Japanese Patent Laid-Open No. 11-252543.

4 is a block diagram showing a configuration of a clock generation unit using the MPEG2-TS standard which can be included in the data receiving side according to the prior art. As shown in FIG. 4, the conventional clock generator 10 includes a radio frequency (RF) tuner 11, a demodulator 12, a header detector 13, a system time clock (STC) counter 14, A comparator 15, a low pass filter (LPF) 16, and a voltage-controlled rrystal oscillator (VCXO) 17 are included.

Referring to FIG. 4, the operation of the clock generator 10 will be described. The RF tuner 11 extracts an audio / video signal from the radio signal received from the antenna 18. The demodulator 12 performs decoding processing of the extracted audio / video signal. The decoded audio / video signal is input to the header detector 13 to extract a PCR (program clock reference). Using the extracted PCR, the STC counter 14 reads the counter value described in the PCR. The read counter value becomes the initial value of the STC counter 14. And the comparison part 15 compares the counter value described in PCR with the counter value of STC counter 14, and calculates a difference. The calculation result of the comparator 15 is input to the LPF 16, and the output result of the LPF 16 is input to the VCXO 17 as a voltage. The VCXO 17 generates a 27 MHz clock for operation of the entire receiving side from this voltage signal. The generated clock is outputted from the clock generator 10, inputted to the demodulator 12, the header detector 13, and the STC counter 14 to operate them, and the audio / audio extracted by the RF tuner 11 is generated. PCR is extracted from the video signal and the process returns to the difference calculation process of the comparison unit 15. This process is repeated to generate a video / audio signal and a clock signal.

However, in the clock generation unit 10 shown in FIG. 4, there are analog circuits such as the LPF 16 and the VCXO 17. In order to accurately generate a 27 MHz clock in order to operate the system stably, there is a problem that the circuit size must be increased. In addition, when incorporated into a small portable device, there is a problem that the small portable device uses an analog circuit due to a lot of disturbances such as vibration. Furthermore, the clock generated by the clock generator 10 is a system clock that operates the system on the receiving side, and all of the video output, audio output, CPU operation, and the like are based on the clock generated by the clock generator 10. Since there is a need to operate, there is a problem that impairs the freedom of system design.

As a configuration for solving such a problem, the configuration of the receiver shown in FIG. 5 can be considered. The receiver 20 shown in FIG. 5 includes an antenna 21, a tuner unit 22, a data storage unit 23, and a decoder 24. Like the receiver 20 shown in FIG. 5, the clock of the tuner unit 22 and the operating clock of the decoder 24 can be separated to simplify the configuration of the system and increase the degree of freedom in design.

However, this configuration works well when the source of video and audio data is a digital storage media (DSM) system capable of stably supplying data such as a DVD or an HDD. In the case of receiving and reproducing, it does not necessarily work well. If the source of video and audio data is a DSM system capable of stably supplying data such as a DVD or an HDD, when the data stored in the data storage unit 23 is short or there is a lack of data, the DSM system can provide high speed data. Although data can be dealt with by reading data, when the source of video and audio data is received from the antenna 21, the data rate is always constant, and the tuner unit 22 is not provided with a large buffer. Interruption occurs when data is missing, and in some cases video and audio data are interrupted in seconds.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and the technical problem to be solved by the present invention is to generate an accurate clock, to reduce the size of the configuration, and to reproduce video and audio data without interrupting the freedom of system design. The present invention provides a novel and improved reproduction apparatus and timing control method.

A reproducing apparatus for solving the above technical problem to be achieved by the present invention comprises: a reproducing data supply unit generating a second clock and supplying reproducing data; A data storage unit for receiving and storing reproduction data from a reproduction data supply unit; A reproducing section which generates a first clock and acquires and reproduces reproducing data from the data storage section; And a synchronization controller configured to receive the second clock from the reproduction data supply unit and the first clock from the reproduction unit, respectively, and control the reproduction timing in the reproduction unit based on the first clock and the second clock.

According to this configuration, the reproduction data supply unit generates a second clock to supply the reproduction data, the data storage unit receives and stores the reproduction data from the reproduction data supply unit, and the reproduction unit generates the first clock to reproduce the reproduction data from the data storage unit. The reproduction control unit acquires and reproduces the data, and the synchronization control unit receives the second clock from the reproduction data supply unit and the first clock from the reproduction unit, respectively, and controls the reproduction timing in the reproduction unit based on the first clock and the second clock. As a result, video and audio data can be played back seamlessly without sacrificing freedom of system design by controlling the playback timing in the playback section in accordance with the two clocks.

The synchronization controller may detect and store a frequency difference from the first clock and the second clock, and control the reproduction timing when the stored frequency difference value exceeds a predetermined threshold that can be controlled as the reproduction timing. According to this configuration, the synchronization control unit detects and stores the frequency difference between the first clock from the playback unit and the second clock from the reproduction data supply unit, and the predetermined threshold value at which the stored frequency difference value can be controlled by the reproduction timing. If exceeded, the playback timing is controlled. As a result, the reproduction timing in the reproducing section can be controlled in accordance with the frequency difference between the two clocks.

The synchronization controller may include a first counter configured to receive a first clock and measure a first count value; A second counter configured to receive a second clock and measure a second count value; A comparison unit comparing a first count value with the second count value; And a control signal output unit configured to output a control signal of reproduction timing to the reproduction unit based on the comparison result of the comparison unit. According to this configuration, the first counter receives the first clock to measure the first count value, the second counter receives the second clock to measure the second count value, and the comparator measures the first count value and the The second count value is compared, and the control signal output section outputs a control signal of reproduction timing to the playback section based on the comparison result of the comparison section. As a result, by comparing the two clocks, it is possible to output a control signal for controlling the reproduction timing in the reproduction unit, and the reproduction timing in the reproduction unit can be controlled by the control signal.

The control signal output unit may output a control signal of the reproduction timing to the reproduction unit when the difference between the first count value and the second count value is equal to or greater than a predetermined value. According to this configuration, the control signal output section outputs a control signal of the reproduction timing to the playback section when the difference between the first count value and the second count value is equal to or greater than the predetermined value. As a result, when the count values of the two clocks are separated by a predetermined value or more, the reproduction timing in the reproduction portion can be controlled by outputting a control signal for controlling the reproduction timing in the reproduction portion.

The difference in count value may correspond to one frame of an image. As a result, the control signal output unit can output a control signal for controlling the reproduction timing of one frame of the image to the reproduction unit.

The control signal output section repeats playback of one frame when the first count value exceeds one frame of the image, and skips playback of one frame when the second count value exceeds one frame of the image. You can control the timing. As a result, the control signal output unit can output a control signal for controlling the reproduction timing for repeating reproduction of one frame of the image or skipping reproduction for the reproduction unit.

The second clock may be a clock having a predetermined amount of jitter, and the first clock may be a clock having sufficiently low jitter and high precision as compared to the second clock. As a result, even if the reproduction data supply unit cannot generate an accurate clock, video and audio data can be reproduced without interrupting the degree of freedom in system design by controlling the reproduction timing in the reproduction unit according to the two clocks.

The reproduction data supply unit may be a tuner unit conforming to the MPEG2-TS standard, and the reproduction unit may be a decoder for decoding a signal conforming to the MPEG2-TS standard.

The reproduction data supply unit may be a receiver for receiving a signal conforming to the IEEE 1394 standard, and the reproduction unit may be a decoder for decoding a signal conforming to the IEEE 1394 standard.

A timing control method for solving the above technical problem to be achieved by the present invention comprises: a reproduction data supply step of generating a first clock and supplying reproduction data; A reproduction data storage step of receiving reproduction data by the reproduction data supply step and storing reproduction data; A reproduction step of generating a second clock, acquiring and reproducing the reproduction data stored in the reproduction data storage step; And a synchronization control step of receiving a first clock from the reproduction data supply step and a second clock from the reproduction step, respectively, and controlling the reproduction timing in the reproduction step based on the first clock and the second clock. A timing control method is provided.

According to this configuration, the reproducing data supplying step generates a first clock to supply the reproducing data, the reproducing data storing step receives the reproducing data by the reproducing data supplying step to store the reproducing data, and the reproducing step is the second clock. Generate and reproduce the reproduced data stored in the reproduced data storage step, and input the first clock from the reproduced data supply step and the second clock from the reproduced step, respectively; The playback timing in the playback step is controlled based on the clock. As a result, by controlling the reproduction timing in the reproduction stage in accordance with the two clocks, the video and audio data can be reproduced without interruption of the degree of freedom in system design.

EMBODIMENT OF THE INVENTION Hereinafter, preferred embodiment of this invention is described in detail, referring an accompanying drawing. In the present specification and drawings, redundant descriptions of components having substantially the same functional configuration are given the same reference numerals.

1 is a block diagram showing the configuration of a playback apparatus 100 according to an embodiment of the present invention.

As shown in FIG. 1, the playback apparatus 100 according to an exemplary embodiment of the present invention includes an antenna 110, a tuner unit 120, a data storage unit 130, a decoder 140, and a synchronization controller 150. It includes.

The reproducing apparatus 100 is a device that receives the decoded video and audio data from the antenna 110, and reproduces and outputs the video or audio. The reproduction device 100 may be, for example, a digital broadcast receiver, or may be a player that reads and reproduces video and audio data from a DVD or an HDD. In the present embodiment, the reproducing apparatus 100 is a video and audio data reproducing apparatus using the MPEG2-TS method, and receives the video and audio data from the antenna 110 to reproduce the video and audio data.

The antenna 110 receives the decoded video and audio data. The tuner unit 120 is an example of a reproduction data supply unit of the present invention that selects and demodulates desired image and audio data from the image and audio data received from the antenna 110, and at the same time, operates a clock for operating the reproduction device 100. Create The clock generated by the tuner unit 120, which is an example of the second clock in the present invention, is a jittered clock. Since the internal configuration of the tuner unit 120 is the same as that shown in FIG. 4, a detailed description of the internal configuration of the tuner unit 120 is omitted.

The data storage unit 130 temporarily stores the demodulated video and audio data of the tuner unit 120. The data storage unit 130 has a characteristic of a so-called first in first out (FIFO) that outputs the first stored first. The video / audio data temporarily stored in the data storage unit 130 is input to the decoder 140 in order from the stored ones.

The decoder 140 is an example of a reproduction unit of the present invention and performs decoding processing of video and audio data obtained from the data storage unit 130. In the present embodiment, in addition to performing decoding processing of video and audio data, the decoder 140 also generates a clock for operating the reproduction device 100. The clock generated by the decoder 140 preferably generates a highly reliable clock. The clock generated by the decoder 140, which is an example of the first clock in the present invention, is preferably a 27 MHz clock for stably operating the reproduction device 100.

The decoding process at the decoder 140 is determined based on the encoding process of the video and audio data. For example, when video and audio data are encoded using the MPEG2-TS system, MPEG decoding is performed. In the present embodiment, since the playback device 100 is a video and audio data playback device using the MPEG2-TS system, the decoder 140 decodes the encoded video and audio data by performing MPEG decoding processing.

The synchronization controller 150 receives a clock signal from the tuner unit 120 and the decoder 140, compares the clock signal, and outputs a comparison result to the decoder 140 to control the operation of the decoder 140. The synchronization controller 150 outputs a signal to the decoder 140 to control the operation of the decoder 140, so that video and audio data can be seamlessly reproduced. The internal structure and operation of the synchronization controller 150 will be described later.

The configuration of the reproducing apparatus 100 according to an exemplary embodiment of the present invention has been described above with reference to FIG. 1. Next, a configuration of the synchronization controller 150 according to an embodiment of the present invention will be described.

FIG. 2 is a block diagram illustrating a detailed configuration of a synchronization controller in the playback device of FIG. 1 according to an embodiment of the present invention.

As shown in FIG. 2, the synchronization controller 150 according to an embodiment of the present invention may include a first counter 152, a second counter 154, a comparator 156, and a first control signal output unit 160. ), And a second control signal output unit 162.

The first counter 152 receives the clock from the decoder 140 and counts the clock. The first count value counted by the first counter 152 is input to the comparator 156. The second counter 154 receives the clock from the tuner unit 120 and counts the clock. The second count value counted by the second counter 154 is similarly input to the comparator 156.

The comparator 156 receives the first count value of the first counter 152 and the second count value of the second counter 154, and compares the two count values. The comparator 156 inputs a result of the comparison operation to the first control signal output unit 160 and the second control signal output unit 162. The comparison operation of the comparison unit 156 will be described later.

The first control signal output unit 160 and the second control signal output unit 162 output control signals for controlling the decoder 140 based on the comparison operation result of the comparator 156. The control signal output based on the comparison operation result of the comparison unit 156 will be described later.

In the above, the configuration of the synchronization controller 150 according to an embodiment of the present invention has been described. Next, a timing control method according to an embodiment of the present invention will be described.

The clock for operating the decoder 140 (hereinafter, the clock for operating the decoder 140 is referred to as "decoder clock") usually uses a stable clock with high precision. It is suitable to use a 27 MHz crystal oscillator as the clock to operate the decoder 140. On the other hand, the clock for operating the tuner unit 120 (hereinafter, the clock for operating the tuner unit 120 is referred to as "tuner clock") is a clock obtained from PCR. Unlike stable clocks with high precision and low jitter, such as decoder clocks, tuner clocks have poor precision and some jitter compared to decoder clocks.

If the frequency of the decoder clock and the tuner clock are different, the operation of the decoder 140 is disturbed. For example, if the frequency of the decoder clock is high, the decoding process of the decoder 140 proceeds faster than the demodulation process for the video and audio data of the tuner unit 120, so that the video and audio to be decoded by the decoder 140 are decoded. There is a lack of data and video or audio is lost. On the other hand, if the frequency of the tuner clock is high, the video / audio data demodulation process of the tuner unit 120 proceeds faster than the decoding process of the decoder 140, so that the video / temporarily stored in the data storage unit 130 Audio data overflows.

Therefore, in the present embodiment, the synchronization controller 150 calculates a difference value between the decoder clock and the tuner clock, and controls the decoding processing timing of the decoder 140 based on the difference value. By controlling the decoding processing timing of the decoder 140 by the calculated difference value, a stable decoded picture can be generated.

3 is a flowchart illustrating an operation of a timing control method according to an exemplary embodiment of the present invention.

First, the decoder clock is input from the decoder 140 to the first counter 152 and the tuner clock from the tuner unit 120 to the second counter 154, respectively, to measure the count value (step S110). Then, the first count value D_cnt is output from the first counter 152 and the second count value T_cnt is output from the second counter 154, respectively, and is input to the comparison unit 156 (step S112).

The comparison unit 156 performs a comparison operation of the count value using the inputted first count value D_cnt and the second count value T_cnt (step S114). In the present embodiment, a value A obtained by subtracting the second count value T_cnt from the first count value D_cnt, and a value B obtained by subtracting the first count value D_cnt from the second count value T_cnt. Calculate each. The value A calculated by the comparator 156 is input to the first control signal output unit 160, and the value B is input to the second control signal output unit 162.

When the value A is input to the first control signal output unit 160 and the value B is input to the second control signal output unit 162, the first control signal output unit 160 and the second control signal output unit are provided. In 162, it is determined whether each value is greater than or equal to a predetermined value. In this embodiment, it is determined whether the value A exceeds 900900 or whether the value B exceeds 900900 (step S116). Here, the value 900900 corresponds to a count value (27 × 10 6/30 × (1001/1000)) for one frame of a 27 MHz clock in the NTSC standard (national television standards committee). In the present invention, the predetermined value is not limited to 900900. The predetermined value may be determined according to the frequency of the clock operating therein.

If neither the value A nor the value B exceeds 900900, the flow returns to step S110 to measure the count value. In this case, the whole system continues normal operation. On the other hand, when either the value A or the value B exceeds 900900, the first control signal output unit 160 or the second control signal output unit 162 controls the decoder 140. Output the signal.

In the present embodiment, it is determined whether it is the value A or the value B exceeding 900900 (step S118). If the value A exceeds 900900, the decoder clock exceeds the tuner clock by one frame. Therefore, the data storage unit 130 outputs a frame duplicate signal (frame duplicate signal) which is a control signal to repeatedly decode by one frame so as not to exhaust the video and audio data (step S120). Then, 900900 is quickly subtracted from the count value of the first counter 152 (step S122).

On the other hand, when the value B exceeds 900900, since the tuner clock exceeds one decoder clock for one frame, the decoder 140 has one frame so that video and audio data does not overflow from the data storage unit 130. Data is discarded as many times and a frame drop signal (frame drop signal), which is a control signal for decoding from the next frame, is output (step S124). Then, 900900 is quickly subtracted from the count value of the second counter 154 (step S126). In the present embodiment, 900900 is subtracted, but the present invention can be realized by adding 900900 to the counter value on the opposite side.

Then, whether the value (A) or value (B) exceeds 900900 is judged whether or not the reproduction of the video / audio data has ended, and if not, the process returns to step S110 to continue measuring the count value. do. On the other hand, when the reproduction of the video and audio data ends, the measurement of the count value ends.

The timing control method according to an exemplary embodiment of the present invention has been described above with reference to FIG. 3. In the present exemplary embodiment, when the count value differs by one frame, the synchronization controller 150 repeatedly decodes one frame of data or outputs a control signal for discarding one frame of data. However, the present invention is not limited thereto, and the reference value for outputting the control signal may be a count value of 2 frames or more. In this case, the decoder 140 repeatedly decodes 2 frames of data or decodes 2 frames of data. It can also output a control signal for discarding.

As described above, according to the reproducing apparatus 100 and the timing control method according to an embodiment of the present invention, by controlling the reproduction timing of the decoder 140 in accordance with the difference between the decoder clock and the tuner clock, a stable decoding process The video and audio can be played smoothly. In addition, since the configuration of the synchronization controller 150 can be made of digital circuits such as application specific integrated circuits (ASICs), the circuit area can be miniaturized. Since the circuit area can be downsized, it greatly contributes to the downsizing of the reproducing apparatus 100.

The above-described timing method may be performed by a computer program. For example, a recording medium in which a computer program is recorded and a processor for reading out and executing the computer program are embedded in the reproduction apparatus 100, and the processor may execute the computer program. This can be achieved by reading out and executing sequentially.

As mentioned above, although preferred embodiment of this invention was described referring an accompanying drawing, it cannot be overemphasized that this invention is not limited to the said example. Those skilled in the art can clearly conceive of various modifications or modifications within the scope of the technical idea described in the claims, and it is understood that they belong to the technical scope of the present invention as well.

For example, in the above embodiment, the reproduction device 100 is a reproduction device for video and audio data using the MPEG2-TS method, and reproduces video and audio data received from the antenna 110. However, the playback device of the present invention is used. The form of is not limited to this example. For example, the reproducing apparatus of the present invention may be a reproducing apparatus for receiving a signal conforming to the IEEE1394 standard and reproducing video and audio data included in the received signal.

In addition, the synchronization controller of the playback apparatus of the present invention can be applied to various devices. For example, the present invention can be applied to a small portable device in addition to a small television receiver. As a small portable device, for example, a synchronization controller of the playback apparatus of the present invention can be applied to a cellular phone, a PDA (prsonal digital assistant), a digital camera, a camcorder, and the like.

As described above, according to the present invention, a novel and improved reproducing apparatus and timing control method capable of reproducing video and audio data without interruption while minimizing the configuration while generating an accurate clock and without sacrificing freedom of system design. Can be provided.

In addition, even when it is difficult to generate an accurate clock when supplying reproduction data, it is possible to provide a small reproduction apparatus and a timing control method capable of seamlessly reproducing video and audio data by controlling reproduction timing based on two clock signals. Can be.

Claims (10)

A reproduction data supply unit generating a second clock from the reproduction data and supplying the reproduction data; A data storage unit receiving the reproduction data from the reproduction data supply unit and storing the reproduction data; A reproducing section which generates a first clock having a fixed frequency and acquires and reproduces the reproducing data from the data storage section; And A synchronization for receiving the second clock from the reproduction data supply unit and the first clock from the reproduction unit, respectively, and controlling the reproduction timing of the reproduction unit based on the frequency difference between the first clock and the second clock; And a control unit. The method of claim 1, The synchronization controller detects and stores a frequency difference from the first clock and the second clock, and controls the reproduction timing when the stored frequency difference value exceeds a predetermined threshold for controlling the reproduction timing. Playback device. The method of claim 1, The synchronization control unit, A first counter receiving the first clock and measuring a first count value; A second counter configured to receive the second clock and measure a second count value; A comparator for comparing the first count value with the second count value; And a control signal output unit which outputs a control signal of reproduction timing to the reproduction unit based on the comparison result of the comparison unit. The method of claim 3, And the control signal output unit outputs a control signal of reproduction timing to the reproduction unit when the difference between the first count value and the second count value is equal to or greater than a predetermined value. 5. The method of claim 4, And the predetermined value corresponds to one frame of an image. 6. The method according to any one of claims 3 to 5, The control signal output unit is based on the comparison between the first count value and the second count value, If the excess of the first count value exceeds one frame of the image, playback of one frame is repeated. If the excess of the second count value exceeds one frame of the image, playback is skipped by one frame. Playback apparatus characterized by controlling the timing. The method of claim 1, And the second clock is a clock having a predetermined amount of jitter, and the first clock is a clock having less jitter than the second clock. The method of claim 1, And the reproduction unit is a tuner unit conforming to the MPEG2-TS standard, and the reproduction unit is a decoder for decoding a signal conforming to the MPEG2-TS standard. The method of claim 1, And the reproduction data supply unit is a receiver for receiving a signal conforming to the IEEE 1394 standard, and the reproduction unit is a decoder for decoding the signal according to the IEEE 1394 standard. A reproduction data supply step of generating a first clock from reproduction data and supplying the reproduction data; A data storage step of receiving the reproduction data by the reproduction data supply step and storing the reproduction data; A reproduction step of generating a second clock having a fixed frequency and acquiring and reproducing the reproduction data stored in the reproduction data storage step; And A synchronization for receiving the first clock from the reproducing data supply step and the second clock from the reproducing step, respectively, and controlling the reproducing timing in the reproducing step based on a frequency difference between the first clock and the second clock; Control step; comprising a timing control method.

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