KR101278601B1

KR101278601B1 - image signal controll apparatus for watching 3D image

Info

Publication number: KR101278601B1
Application number: KR1020110011395A
Authority: KR
Inventors: 이효충; 라종립
Original assignee: 주식회사 엠티아이; (주)아발론테크놀러지
Priority date: 2011-02-09
Filing date: 2011-02-09
Publication date: 2013-06-25
Also published as: KR20120091561A

Abstract

The video signal control apparatus for 3D video viewing according to the present invention counters the time for one period of the normal sync signal SYN when the normal sync signal SYN output from the video playback apparatus is received, and calculates an average value thereof. By the average value, the corrected synchronization signal output unit 70 outputs the corrected synchronization signal RSYN, and the synchronous signal receiver 10 having high power consumption does not operate during the reference time, thereby greatly reducing power consumption. have.

Description

Image signal controll apparatus for watching 3D image}

The present invention relates to a video signal control apparatus for viewing 3D video, and in particular, receives a sync signal output from the 3D video playback apparatus, finds a sync signal in a normal range, and then stops supplying power to the sync signal receiver. The receiver is not operated and power is supplied to the synchronization signal receiver every predetermined time to receive the synchronization signal output from the 3D image reproducing apparatus, thereby reducing the power consumption, and part of the synchronization signal due to noise according to the surrounding environment. The video reproducing apparatus and the shutter glass are related to the video signal control apparatus for three-dimensional image viewing that can be synchronized accurately by blocking the synchronous signal of the noise generated portion even if there is an error.

In general, an image reproducing apparatus for watching a 3D stereoscopic image is classified into a glasses type using special glasses and a non glasses type using no special glasses. The eyeglass type includes a color filter method for separating and selecting images using a color filter having a complementary color relationship, a polarization filter method for separating images of left and right eyes using a light shielding effect by a combination of orthogonal polarizing elements, and a left eye video signal. In response to a synchronization signal for projecting the right and right eye image signals to the screen, there is a shutter glass method that can sense a three-dimensional effect by alternately blocking the left and right eyes.

The shutter glass method uses the parallax of both eyes, and synchronizes the image displayed on the image reproducing apparatus with the on / off of the left and right eyes of the shutter glass so that the images observed from different angles recognize the sense of space due to the brain action. In addition, the image reproducing apparatus generates a left eye image and a right eye image, and alternately outputs the generated left eye image and the right eye image at regular time intervals, and the image reproducing apparatus of the left and right eyes of the shutter glass according to the left eye image and the right eye image. The synchronization signal transmission unit transmits the synchronization signal through the infrared transmission method for synchronization, and the image signal control device receives the synchronization signal through the synchronization signal receiver.

1 is a block diagram of a video signal control apparatus for viewing a conventional 3D video signal using a conventional shutter glass method.

As shown in FIG. 1, the video reproducing apparatus transmits the generated synchronizing signal SYN to the synchronizing signal receiving unit 3 of the image signal controlling apparatus 2 through an infrared transmission method through the synchronizing signal transmitting unit 1. do. The shutter glass controller 4 of the video signal controller 2 synchronizes the high logic value and the low logic value every one period of the sync signal SYN in synchronization with the sync signal SYN received through the sync signal receiver 3. The comb signal COM alternately outputs and the right eye inverting the left eye video signal L and the left eye video signal L, which are delayed by 90 degrees, i.e., 1/4 cycle of the common signal COM. Outputs an image signal (R), and the shutter glass is synchronized with the left eye image and the right eye image of the image reproducing apparatus according to the common signal (COM), the left eye image signal (L), and the right eye image signal (R). Open and close alternately.

In the conventional video signal control apparatus for viewing 3D video signals, the synchronization signal receiver of the video signal controller must continuously receive the synchronization signal transmitted from the video playback apparatus to synchronize the video playback apparatus with the shutter glasses. Since the synchronization signal receiver must be continuously powered and in an operating state, the conventional video signal control apparatus for watching a 3D video signal has a large power consumption problem.

In addition, the conventional video signal control device uses an infrared method having excellent linearity to transmit the synchronization signal. However, when there is an obstacle between the synchronization signal transmitter and the synchronization signal receiver, the synchronization signal output through the synchronization signal receiver is noisy. There is a problem that the image playback device and the shutter glass is not synchronized correctly generated.

An object of the present invention is to find a synchronization signal in the normal range by receiving the synchronization signal output from the 3D image reproducing apparatus, and then stops supplying power to the synchronization signal receiving unit so that the synchronization signal receiving unit is not operated, and the synchronization signal every predetermined time. The present invention provides a video signal control apparatus for 3D video viewing that reduces power consumption by supplying power to a receiver to receive a synchronization signal output from a 3D video playback device.

Another object of the present invention is to reproduce the image by blocking the synchronous signal generated noise even if noise is generated in a part of the synchronous signal output through the synchronous signal receiver due to an obstacle between the synchronous signal transmitter and the synchronous signal receiver according to the surrounding environment. The device and the shutter glass are to provide a video signal control device for three-dimensional image viewing that can be accurately synchronized.

In order to achieve the above object, the video signal control apparatus for 3D video viewing according to the present invention receives a synchronization signal synchronized with the left eye image and the right eye image outputted from the image reproducing apparatus and outputs the synchronization signal to the left eye image and the right eye image of the image reproducing apparatus. An image signal control apparatus for three-dimensional image viewing in which a left eye glass and a right eye glass of a shutter glass are alternately opened and closed, wherein the synchronization signal for receiving a synchronization signal synchronized with a left eye image and a right eye image output from the image reproducing apparatus is synchronized. Signal receiving means; Counter means for receiving a synchronization signal and a clock signal received through the synchronization signal receiving means, and counting one cycle value of the synchronization signal by the clock signal; Storage means for sequentially storing one cycle value of the synchronization signal counted by the counter means in a plurality of buffers; Comparing values stored in the buffers of the storage means are compared to each other to calculate comparison values, and when the comparison values are all within a reference error range defined by a user, an activated match signal is output, and at least one of the comparison values is a reference error. Comparison means for outputting an inactive match signal when out of range; When the match signal output from the comparing means is activated, the power enable signal is deactivated and the power supply of the sync signal receiving means is cut off to stop the operation of the sync signal receiving means, and then the match signal is activated. A timer for activating a power enable signal and supplying power to the synchronization signal receiving means when a reference time determined by a user has elapsed; Average value calculating means for receiving a value stored in each of the buffers of the storage means to calculate an average value when the match signal is activated and storing the average value; A time for receiving a mean value stored in the mean value calculating means and having a low logic value for a first reference time region, which is a time interval having a low logic value of a synchronization signal determined by a user, and subtracting the first reference time region from the average value. Correction synchronization signal output means for outputting a correction synchronization signal having a high logic value during the region; And a shutter glass signal output means for receiving the corrected synchronization signal and outputting a common signal, a left eye glass signal, and a right eye glass signal to alternately open and close the left eye glass and the right eye glass of the shutter glass. .

The video signal control apparatus for 3D video viewing according to the present invention receives a sync signal output from the 3D video playback apparatus, finds a sync signal in a normal range, and then stops supplying power to the sync signal receiver to operate the sync signal receiver. The power consumption can be reduced by supplying power to the synchronization signal receiver every predetermined time so as to receive the synchronization signal output from the 3D image reproducing apparatus, and between the synchronization signal transmitter and the synchronization signal receiver according to the surrounding environment. Even if noise is generated in a part of the synchronization signal due to an obstacle, etc., the image reproduction device and the shutter glass can be accurately synchronized by blocking the synchronization signal of the noise generated part.

1 is a block diagram of a video signal control apparatus for viewing a conventional 3D video signal using a conventional shutter glass method.
2 is a block diagram of a video signal control apparatus for viewing a three-dimensional video signal of the present invention;
3 is a waveform diagram of a synchronization signal;
4A and 4B are waveform diagrams for explaining the operation of FIG.
FIG. 5 is a waveform diagram illustrating the correction synchronization signal output unit of FIG. 2.

Hereinafter, a video signal control apparatus for viewing a 3D video signal of the present invention will be described in detail with reference to the accompanying drawings.

The video signal control apparatus for viewing 3D video according to the present invention shown in FIG. 2 includes a synchronization signal receiver 10 for receiving a synchronization signal SYN synchronized to a left eye image and a right eye image output from an image reproducing apparatus. A counter 20 for receiving the synchronization signal SYN and the clock signal CK received through the signal receiver 10 and counting one cycle value of the synchronization signal SYN by the clock signal CK, and a counter ( The storage unit 30 sequentially stores the one cycle value of the synchronization signal SYN counted at 20 in the plurality of buffers 31, 33, 35, 37, and each of the buffers of the storage unit 30 ( Comparing the values stored in the 31,33,35,37) to calculate the comparison values, and if the comparison values are all within the reference error range defined by the user, the activated match signal (MCH) is output, and at least one of the comparison values If one is not within the reference error range, the comparator 40 and the comparator 40 output the deactivated match signal (MCH). When the output match signal MCH is activated, the inactive power enable signal PEN is output to stop the power supply of the sync signal receiver 10 to stop the operation of the sync signal receiver 10, and the match signal ( When the reference time set by the user passes after the MCH is activated, the timer 50 for activating the power enable signal PEN to supply power to the synchronization signal receiver 10 and the match signal MCH are activated. An average value calculator 60 for receiving the values stored in the buffers 31, 33, 35, 37 of the storage unit 30, calculating an average value AVG, and storing the average value AVG; 60 has a low logic value during the first reference time region TR1, which is a time interval having a low logic value of the synchronization signal SYN determined by the user, by receiving the average value AVG stored in the user terminal 60. Corrected having a high logic value for the time domain subtracted from the 1 reference time domain TR1 The correction synchronous signal output unit 70 for outputting the synchronization signal RSYN, and the common signal COM and the left eye for alternately opening and closing the left eye glass and the right eye glass of the shutter glass by receiving the corrected synchronization signal RSYN. Shutter glass signal output unit 80 for outputting the glass signal (L) and the right eye glass signal (R).

In addition, the video signal control apparatus for viewing 3D image of the present invention receives the average value AVG stored in the average value calculating unit 60 and has a second reference value having a predetermined multiple larger than the first reference time region TR1. A synchronous enable signal having a low logic value in the time domain TR2 and outputting a synchronous enable signal SEN having a high logic value during the time domain in which the second reference time region TR2 is subtracted from the average value AVG. A noise signal generated in a section having a high logic value of the synchronization signal SYN by receiving the synchronization signal SYN received through the output unit 90, the synchronization enable signal SEN, and the synchronization signal receiver 10. The apparatus may further include a noise blocking unit OR for outputting the blocked synchronization signal BSYN to the counter 20.

The noise blocking unit OR comprises a logic summation unit for logic-suming the synchronization enable signal SEN and the synchronization signal SYN and outputting the synchronization signal BSYN from which the noise signal is cut off.

In addition, in the video signal control device for 3D video viewing, one terminal is connected to the power supply terminal Vdd, and the other terminal is connected to the power supply unit of the synchronization signal receiver 10 to activate the power enable signal PEN. In this case, the power supply unit of the synchronization signal receiver 10 may further include a switching unit Q for supplying power from the power supply terminal Vdd to operate the synchronization signal receiver 10.

When the power enable signal PEN is activated, the counter 20 performs a counter operation. When the power enable signal PEN is deactivated, the counter 20 does not perform a counter operation.

The operation of the video signal control apparatus for 3D video viewing according to the above configuration is as follows.

As shown in FIG. 3, the synchronization signal SYN synchronized to the left eye image and the right eye image output from the image reproducing apparatus has a low logic value during the first reference time region TR1 determined by the user, and the first reference time. At a time other than the area TR1, it has a high logic value and has a signal repeated in the same period. The first reference time region TR1 is a time region defined by the user. In the present invention, one period of the clock signal CK is T in the first reference time region TR1 in which the synchronization signal SYN has a low logic value. In this case, it is assumed that 10T, which is the time of 10 clock signal cycles, and 90T, which is the time of 90 clock signal cycles, are the time having the high logic value of the synchronization signal SYN. Even when viewing the video of the first reference time area TR1 has a constant value, the time of one cycle of the synchronization signal SYN is variable.

The counter 20 counters the start point to the end point of one cycle of the synchronization signal SYN in synchronization with the clock signal CK, as shown in FIG. As described above, when the first reference time region TR1 having the low logic value of the synchronization signal SYN is 10T and the time having the high logic value of the synchronization signal SYN is 90T, the counter 20 generates a clock signal. 100 is counted in synchronization with the rising edge at (CK).

The period of one cycle of the synchronization signal output from the image reproducing apparatus is constant, but is received through the synchronization signal receiver 10 by an obstacle or the like between the synchronization signal generator and the synchronization signal receiver 10 or by surrounding environment. The time of one cycle of the synchronization signal SYN may vary.

As shown in FIG. 2, it is assumed that the storage unit 30 includes four buffers of the first buffer 31, the second buffer 33, the third buffer 35, and the fourth buffer 37. do.

When the operating power of the shutter glass is turned on, the synchronizing signal SYN output from the video reproducing apparatus is received through the synchronizing signal receiving unit 10 by the infrared transmission method, and the counter 20 is synchronized by the clock signal CK. Each cycle of the signal SYN is countered and stored in the buffers 31, 33, 35, and 37 of the storage unit 30, respectively.

For example, when the value countered by the counter 20 is 95 for a time t1, which is the start point of the first period of the synchronization signal SYN, and t1, which is the end point of the first period, 95 is stored in the first buffer 31. If the value counted by the counter 20 during t2 time from t1 which is the second period of the synchronization signal SYN is 100, 100 is stored in the second buffer 33. By the above method, the value 95 counted by the counter 20 during the third period of the synchronization signal SYN is stored in the third buffer 35 and counted by the counter 20 during the fourth period of the synchronization signal SYN. The value 110 is stored in the fourth buffer 37.

Although the number of buffers of the storage unit 30 is not limited, there are disadvantages in that it takes too long to find the correction synchronization signal RSYN described later when there are many buffers. Since it is possible to find the value closest to one period value of SYN), there is an advantage of accurately synchronizing the left and right images between the image reproducing apparatus and the shutter glass.

The comparison unit 40 compares the values stored in the buffers 31, 33, 35, and 37 of the storage unit 30, respectively, and calculates comparison values. For example, the counter value 95 stored in the first buffer 31 and the counter value 100 stored in the second buffer 33 are compared, and the counter value 100 stored in the second buffer 33 and the counter stored in the third buffer 35 are compared. The value 95 is compared, and the counter value 95 stored in the third buffer 35 and the counter value 110 stored in the fourth buffer 37 are compared. Thus, the comparison values are 5, 5, and 15, respectively. Assuming that the reference error range defined by the user is 20, the comparison values 5, 5, and 15 of the counter values stored in the buffers 31, 33, 35, and 37 are all within the reference error range defined by the user. The unit 40 outputs the activated match signal MCH. If at least one of the comparison values is not within the reference error range, the comparison unit 40 outputs an inactivated match signal MCH.

As shown in FIG. 4A, since the match signal MCH, which is the output of the comparison unit 40, is activated at time t4, the timer 50 starts to operate by the activated match signal MCH. The output enable power enable signal PEN is initially activated and continues to be inactive for a reference time Tref defined by the user after t4 hours, and the power enable at t5 time after the reference time Tref set by the user has elapsed. The signal PEN is activated.

When the power enable signal PEN is deactivated, the switching unit Q is turned off to stop the supply of the power supply Vdd to the synchronous signal receiving unit 10 so that the synchronous signal receiving unit 10 is stopped and output from the image reproducing apparatus. When the synchronous signal is not received and the power enable signal PEN is activated at the time t5 after the reference time Tref has elapsed, the switching unit Q is turned on and the power supply Vdd is supplied to the synchronous signal receiving unit 10. Then, the operation is restarted and the synchronization signal receiver 10 receives the synchronization signal SYN output from the video reproducing apparatus.

When the match signal MCH is activated at time t4, the average value calculator 60 calculates the first buffer 31, the second buffer 33, the third buffer 35, and the fourth buffer, which are the respective buffers of the storage unit 30. 95, 100, 95, and 110, which are values counted by the counter 20 stored in the buffer 37, are received, and 100, which is their average value AVG, is calculated and stored.

The correction synchronization signal output unit 70 receives the average value AVG 100 stored in the average value calculation unit 60 and has a low logical value of the synchronization signal SYN determined by the user. Is a low logic value for 10T, and the corrected synchronization signal RSYN having a high logic value for 90T time after subtracting 10 which is the first reference time area TR1 from the average value AVG 100, i.e., 100T time for one week. The corrected synchronizing signal RSYN is continuously output.

As shown in FIG. 4A, the shutter glass signal output unit 80 synchronizes with the synchronizing signal RSYN corrected in the same manner as in the related art, and continuously opens and closes the left eye glass and the right eye glass of the shutter glass after t4 hours. The common signal COM, the left eye glass signal L, and the right eye glass signal R are outputted.
That is, in the 0 to t4 time domain, the corrected synchronization signal RSYN does not have a constant period and has a high logic value which is a fixed value. Therefore, the common signal COM, the left eye glass signal L, and the right eye glass signal R ) Open both the left and right eye glasses of the shutter glass by having a low logic value.
After t4 hours, the corrected synchronization signal RSYN has a certain period, and therefore, the shutter glass signal output unit 80 is synchronized with the corrected synchronization signal RSYN and becomes high every one period of the corrected synchronization signal RSYN. Outputs a common signal (COM) having alternating logic and low logic values, and outputs a left eye video signal (L) with a delay of the common signal (COM) by 90 degrees, i.e., a quarter cycle of the common signal (COM). The left eye video signal L is inverted and the right eye video signal R is output.
That is, since the corrected synchronization signal RSYN does not change periodically when the user first wears the shutter glass by the same method as the conventional method, the shutter glass signal output unit 80 uses both the left eye glass and the right eye glass of the shutter glass. After a certain period of time, the corrected synchronization signal RSYN is a signal having a constant period. Therefore, the common signal COM, the left eye glass signal L, and the right eye glass that are output in synchronization with the corrected synchronization signal RSYN are output. In response to the signal R, the shutter glass alternately opens and closes the left eye glass and the right eye glass in synchronization with the left eye image and the right eye image of the image reproducing apparatus.

When the reference time Tref elapses after the match signal MCH is activated and the power enable signal PEN, which is the output of the timer 50, is activated at t5 hours, the synchronization signal receiver 10 starts to play an image. Receiving the synchronization signal (SYN) output from the device, the counter 20 counters for each period of the synchronization signal (SYN) received by the synchronization signal receiver 10, the first buffer of the storage unit 30 The comparison unit 40 stores 80, 84, 92, and 88, which are the values counted by the counter 20, in the second buffer 33, the third buffer 35, and the fourth buffer 37, respectively. Outputs a match signal (MCH) activated at time t6, and the average value calculation unit 60 stores the average value AVG 86 thereof, and the correction synchronous signal output unit 70 determines the first reference after t6 time. A low logic value for 10T, which is the time domain TR1, and a high logic value for 76T, after subtracting 10, which is the first reference time zone TR1, from the average value AVG 86. Continued synchronization signal (RSYN), i.e., the corrected sync signal (RSYN) having a time 86T group and one weeks and output.

As shown in FIG. 4B, when the power enable signal PEN is activated, the switching Q is turned on to operate the synchronization signal receiver 10, and the counter 20 receives the synchronization signal received by the synchronization signal receiver 10. (SYN) is counted and the counter values stored in the first buffer 31, the second buffer 33, the third buffer 35 and the fourth buffer 37 of the storage unit 30 are 95, 100 and 95, respectively. , 140, the values compared in the comparison unit 40 are 5, 5, and 45. That is, since the comparison value between the third buffer 35 and the fourth buffer 37 is 45, and the comparison value 45 is larger than the reference error range 20 determined by the user, the match signal MCH, which is the output of the comparison unit 40, is output. ) Is continuously deactivated, and since the timer 50 is not operated, the power enable signal PEN, which is the output of the timer 50, is activated in the same state as before, so that the switching unit Q is continuously turned on. The synchronization signal receiver 10 continues to receive the synchronization signal SYN. The counter values stored in the first buffer 31, the second buffer 33, the third buffer 35, and the fourth buffer 37 by the received synchronization signal SYN are 95, 100, 110, respectively. 92, the comparison values in the comparison unit 40 are 5, 10, and 18, respectively, and their comparison values are within the reference error range 20, so that the match signal MCH, which is the output of the comparison unit 40, is activated and is activated. The power enable signal PEN is deactivated by the match signal MCH, and the synchronization signal receiver 10 is stopped.

As described above, when the switching unit Q is turned on and the power is supplied to the synchronization signal receiver 10, the synchronization signal receiver 10 synchronizes the video signal controller. Receiving the signal (SYN), the counter 20 counts one period of the received synchronization signal (SYN) and stores in each buffer of the storage unit 30, the comparator 40 is stored in each buffer When the comparison values are within the allowable error range, the match signal MCH, which is the output of the comparator 40, is activated, and the timer 50 is operated by the activated match signal MCH for a reference time. By deactivating the power enable signal PEN, the operation of the synchronization signal receiver 10 is stopped. When any one of the comparison values is out of the error range in the comparator 40, the power enable signal PEN continues to be active. The synchronization signal receiver 10 continues to synchronize. And it receives a call (SYN).

That is, the video signal control apparatus for 3D video viewing according to the present invention counters the time for one period of the normal synchronization signal SYN when the normal synchronization signal SYN outputted from the image reproducing apparatus is received, and the average value thereof. The synchronous signal output unit 70 outputs the corrected synchronous signal RSYN based on the average value, and the synchronous signal receiver 10 that consumes a lot of power does not operate during the reference time, thereby greatly reducing power consumption. Can be reduced.

When viewing a new video by changing a channel or the like while watching a 3D video, the time of one cycle of the synchronization signal SYN may be changed. Therefore, after a predetermined time, that is, after the reference time Tref has elapsed by the timer 50, The sync signal receiver 10 is operated to update the corrected sync signal RSYN.

As shown in FIG. 2, when the power enable signal PEN is activated, the counter 20 operates a counter. When the power enable signal PEN is inactivated and the synchronization signal receiver 10 does not operate, the counter ( 20) can also be disabled to further reduce power consumption.

As shown in FIG. 2 and FIG. 5, the synchronization enable signal output unit 90 receives the average value AVG stored in the average value calculator 60 and has a predetermined multiple larger than the first reference time region TR1. A synchronization enable signal SEN having a low logic value in the second reference time region TR2 and having a high logic value during the time domain in which the second reference time region TR2 is subtracted from the average value AVG is output.

That is, the first reference time region TR1, which is a time section having a low logic value of the synchronization signal SYN output from the image reproducing apparatus, is 10T, the section having a high logic value is 90T, and the average value calculator 60 When the average value AVG stored in the control unit 100 is 100, the synchronization enable signal SEN output from the synchronization enable signal output unit 90 is a predetermined multiple larger than 10T, which is the first reference time zone TR1. 86T obtained by subtracting the second reference time area TR2 having a low logic value of 14T with a margin of ± 20% margin than the first reference time area TR1 and the second reference time area TR2 having an average value of 100 to 14T. Has a high logic value.

As shown in FIG. 5, noise may be generated in the synchronization signal SYN output from the image reproducing apparatus due to a surrounding environment, and the noise may have a higher logic value than a region having a low logic value of the synchronization signal SYN. Since the noise blocking unit OR, which is a logic sum unit, is logically combined with the synchronous enable signal SEN output from the synchronous enable signal output unit 90 when the noise is generated, the noise blocking unit OR is a logic sum unit. Noise is not generated in a section having a high logic value of the sync signal BSYN from which the signal is cut off.

Therefore, in the video signal control apparatus of the present invention, even if noise is generated in the synchronization signal SYN due to the surrounding environment, the counter 20 is operated by the synchronization signal BSYN in which the noise signal is cut off. Synchronization can be made accurately.

Claims

Receives a synchronization signal synchronized with the left eye image and the right eye image outputted from the image reproducing apparatus, and synchronizes the left eye image and the right eye image of the image reproducing apparatus. In the video signal control device,
Synchronizing signal receiving means (10) for receiving a synchronizing signal (SYN) synchronized with a left eye image and a right eye image output from the image reproducing apparatus;
Counter means 20 for receiving the synchronization signal SYN and the clock signal CK received through the synchronization signal receiving means 10 and counting one cycle value of the synchronization signal SYN based on the clock signal. ;
Storage means (30) for sequentially storing one cycle value of the synchronization signal (SYN) counted by the counter means (20) in a plurality of buffers (31, 33, 35, 37);
Compare values stored in the buffers 31, 33, 35, and 37 of the storage means 30 are compared with each other to calculate comparison values. Comparison means 40 for outputting MCH and outputting an inactive match signal MCH if at least one of the comparison values is within a reference error range;
When the match signal MCH output from the comparing means 40 is activated, an inactivated power enable signal PEN is output to cut off the power supply of the sync signal receiving means 10 so as to receive the sync signal receiving means ( 10) to stop the operation, and to activate the power enable signal (PEN) to supply power to the synchronization signal receiving means 10 when the reference time set by the user has passed after the match signal (MCH) is activated. Timer 50;
When the match signal MCH is activated, an average value for receiving the value stored in each of the buffers 31, 33, 35, 37 of the storage means 30, calculating an average value AVG, and storing the average value AVG, is stored. Calculating means (60);
The average value AVG stored in the average value calculating means 60 is received and has a low logic value during the first reference time region TR1 which is a time interval having a low logic value of the synchronization signal SYN determined by the user. Corrected synchronization signal output means (70) for outputting a corrected synchronization signal (RSYN) having a high logic value for a time domain after subtracting the first reference time domain (TR1) from an average value; And
A shutter for receiving the corrected synchronization signal RSYN and outputting a common signal COM, a left eye glass signal L, and a right eye glass signal R to alternately open and close the left eye glass and the right eye glass of the shutter glass. An image signal control apparatus for three-dimensional image viewing, comprising: a glass signal output means (80).

The apparatus of claim 1, wherein the image signal control apparatus for viewing 3D image comprises:
The average value AVG stored in the average value calculating means 60 is received and has a low logical value in the second reference time area TR2 having a predetermined multiple greater than the first reference time area TR1. Synchronous enable signal output means (90) for outputting a synchronous enable signal (SEN) having a high logic value during the time domain obtained by subtracting the second reference time region (TR2) from AVG; And
Receives the synchronization signal SYN received through the synchronization enable signal SEN and the synchronization signal receiving means 10 to logically sum the synchronization enable signal SEN and the synchronization signal SYN to generate the synchronization signal. Noise blocking means (OR) for outputting to the counter means 20, the synchronization signal cut off the noise signal generated in the section having a high logic value of (SYN) for 3D video viewing Image signal control device.

delete

The counter means 20 performs a counter operation when the power enable signal PEN is activated, and the counter means 20 performs a counter operation when the power enable signal PEN is deactivated. Image signal control device for three-dimensional image viewing, characterized in that not.