KR101243385B1 - Testing device of semiconductor device improving the accuracy - Google Patents

Abstract

PURPOSE: A semiconductor testing device having improved accuracy is provided to embody a circuit having an improved accuracy by receiving the GND of DSA(Device Specific Adaptor). CONSTITUTION: A semiconductor testing device(20) includes a power voltage generating module(200) and an amplification module(100). The power voltage generating module generates power voltage applied to a testing object. The amplification module amplifies and supplies the voltage and electricity to the power voltage generating module. The amplification module supplies an accurate voltage to the power voltage generating module through the compensation of DUT(Device Under Test) GND by receiving and amplifying HGND voltage, DUT GND voltage and user setting voltage. The amplification module includes an OP AMP(Operational Amplifier)(110) and a power amplifier(130). The power amplifier amplifies electricity and supplies the electricity to the power voltage generating module. The OP AMP amplifies voltage and inputs the voltage to the power amplifier. [Reference numerals] (100) Amplification module; (110) Operational amplifier; (130) Power amplifier; (200) Power voltage generating module; (300) Device under test

Description

TESTING DEVICE OF SEMICONDUCTOR DEVICE IMPROVING THE ACCURACY}

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a semiconductor test apparatus with improved accuracy. In particular, the present invention relates to a semiconductor test apparatus that compensates the ground (GND) of each device under test (hereinafter referred to as a 'DUT') to improve accuracy. It is related with the improved semiconductor test apparatus.

In general, a semiconductor test apparatus includes a programmable power supply (hereinafter, referred to as a 'PPS'), a power supply voltage generation module that generates a power supply voltage applied to a DUT, and a power amplifier that amplifies and inputs the power to the PPS. ), And an operational amplifier (hereinafter, referred to as an "OP AMP") commonly used for voltage amplification.

The existing semiconductor test apparatus selects the number of channels of the PPS in consideration of the number of DUTs required in the design. In this case, if the concept of extending the number of channels is substituted, the shortage of the number of PPS channels may occur. do.

In order to solve this problem, a board for externally increasing a PPS channel has been designed. However, due to the difference in the ground (GND) for each device specific adapter (hereinafter referred to as 'DSA') or a socket board, the accuracy of the PPS is severely distorted. At this time, the figures are largely dozens of ㎽.

In addition, the semiconductor test apparatus used in the prior art is a structure that can not compensate for the deviation between the socket board because only one or two HGND, there is a problem that does not increase the accuracy of the PPS.

The present invention has been proposed to solve the above problems of the conventionally proposed methods, by setting the user for the test or by using the HGND voltage and the DUT GND voltage in addition to the preset SET voltage, It is an object of the present invention to provide a semiconductor test apparatus having an improved accuracy for receiving a GND of each DSA to implement a circuit for improving accuracy.

In addition, the present invention overcomes the difference between the HGND voltage and the DUT GND voltage in an environment where SW or EWS (Engineer Work Station), which is used in a conventional semiconductor test apparatus, cannot be applied, thereby improving PPS voltage accuracy of all DSAs. As an alternative, it is another object of the present invention to provide a semiconductor test apparatus with improved accuracy that can be excellent in price / performance.

According to a feature of the present invention for achieving the above object, a semiconductor test device having improved accuracy,

A power supply voltage generation module configured to generate a power supply voltage applied to a device under test (hereinafter, referred to as a “DUT”); And

Including an amplification module for amplifying a voltage and power supply to the power supply voltage generation module,

The amplification module compensates for the DUT GND by receiving and amplifying all the voltages of the HGND which is the representative ground, the set or preset voltage set by the user, and the voltage of the DUT GND which is the ground of the DUT. Through the supply of the correct voltage to the power supply voltage generation module is characterized by its configuration.

Preferably, the power supply voltage generation module,

It may include a programmable power supply (hereinafter, referred to as a 'PPS').

Preferably, the amplification module,

A power amplifier for amplifying and supplying power to the power supply voltage generation module; And

It may include an operational amplifier (hereinafter referred to as "OP AMP") to amplify a voltage and input it to the power amplifier.

More preferably, the OP AMP is,

The HGND voltage and the feedback voltage from the DUT may be input to an inverting input terminal, and the SET voltage and the DUT GND voltage may be input to a non-inverting input terminal.

Even more preferably,

A resistor is connected to the conductive line through which the voltage is input to the OP AMP to adjust the current.

According to the semiconductor test apparatus which improves the accuracy proposed by the present invention, the user receives the GND of each DSA by using the HGND voltage and the DUT GND voltage in addition to the preset voltage or the preset voltage. Implement circuits with improved accuracy.

In addition, according to the present invention, by overcoming the difference between the HGND voltage and the DUT GND voltage in an environment where SW or EWS (Engineer Work Station) used in the conventional semiconductor test apparatus is not applicable, As an alternative to improve the voltage accuracy, it can be excellent in terms of price / performance.

1 is a diagram illustrating a configuration of a conventional semiconductor test apparatus.
2 is a diagram illustrating a configuration of a semiconductor test apparatus having improved accuracy according to an exemplary embodiment of the present invention.
3 is a process flowchart of a semiconductor test apparatus having improved accuracy according to an embodiment of the present invention.
4 is a detailed flowchart of the step (S200) of amplifying voltage and power.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings, in order that those skilled in the art can easily carry out the present invention. In the following detailed description of the preferred embodiments of the present invention, a detailed description of known functions and configurations incorporated herein will be omitted when it may make the subject matter of the present invention rather unclear. In the drawings, like reference numerals are used throughout the drawings.

In addition, in the entire specification, when a part is referred to as being 'connected' to another part, it may be referred to as 'indirectly connected' not only with 'directly connected' . In addition, the term 'comprising' of an element means that the element may further include other elements, not to exclude other elements unless specifically stated otherwise.

1 is a diagram illustrating a configuration of a conventional semiconductor test apparatus. As illustrated in FIG. 1, the conventional semiconductor test apparatus 10 may generate a power supply voltage generation module 200 for generating a power supply voltage applied to the DUT 300, a device under test, and amplify the power to generate a power supply voltage. And an amplification module 100 including a power amplifier 130 input to the module 200 and an operational amplifier (OP AMP) 110 that is commonly used for voltage amplification. In this case, the feedback voltage from the DUT 300, that is, the representative GND (HGND) voltage of the DUT is input to the inverting input terminal of the OP AMP 110, and the non-inverting input terminal is set by the user for a test or preset. Only the set voltage has been used. As a result, in the prior art, since the GND of each DSA cannot be compensated, there is a problem in that the accuracy of the PPS (not shown) mainly used as the power supply voltage generation module 200 is severely distorted.

In order to solve this problem, the present invention not only inputs a set voltage to the OP AMP 110 but also inputs and uses a HGND voltage, which is a representative GND, and a DUT GND voltage, which is a GND of a test target device (DUT). The present invention will be described in detail with reference to FIGS. 2 and 3.

2 is a diagram illustrating a configuration of a semiconductor test apparatus having improved accuracy according to an exemplary embodiment of the present invention. As shown in FIG. 2, the semiconductor test apparatus 20 having improved accuracy according to an embodiment of the present invention may include a power supply voltage generation module 200 that generates a power supply voltage applied to the DUT 300, which is a device under test. ), And an amplification module 100 that amplifies a voltage and power to supply the power voltage generation module 200.

The power supply voltage generation module 200 is a device that generates a power supply voltage for receiving an electric signal from the amplification module 100 and applying it to the DUT 300. The power supply voltage generation module 200 may include a PPS (not shown), and may receive an electrical signal from the amplification module 100 and apply a high accuracy voltage to the DUT 300 through the PPS.

The amplification module 100 may include an OP AMP 110 that amplifies a voltage and a power amplifier 130 that amplifies a power. The OP AMP 110 that can be used at this time is not limited to the positive power supply OP AMP, it is also possible to use a single power supply OP AMP.

The operational amplifier (OP AMP) 110 may receive both a preset or preset voltage set by the user for a test, a HGND voltage that is a representative GND, and a DUT GND voltage that is a GND of a test target device. In this case, the DUT GND voltage and the SET voltage may be input to the non-inverting input terminal of the OP AMP 110, and the HGND voltage may be input to the inverting input terminal. In addition, the feedback voltage from the DUT 300 may be input to the inverting input terminal of the OP AMP 110. In this case, a resistor is connected to the conductive line through which the voltage is input to the OP AMP 110 to adjust the current. The principle of applying a high-accuracy voltage to the DUT 300 by receiving and using the HGND voltage and the DUT GND voltage will be described in detail later with examples.

The power amplifier 130 is a device for amplifying power and may amplify the power of an electric signal whose voltage is amplified through the OP AMP 110. An electrical signal having an amplified voltage and power may be used in the power supply voltage generation module 200. Of course, the amplification module 100 is not limited to the configuration of the OP AMP 110 and the Power Amplifier 130, any device can be included as long as it can serve to amplify the voltage and power.

The test target device DUT 300 receives a power supply voltage from the power supply voltage generation module 200 for a test. The performance of the DUT 300 may be determined according to the input voltage and whether there is an abnormality. As the power supply voltage generation module 200 provides an accurate voltage, a highly reliable test result may be obtained.

3 is a process flowchart of a semiconductor test apparatus having improved accuracy according to an embodiment of the present invention. As shown in FIG. 3, the semiconductor test apparatus having improved accuracy according to an embodiment of the present invention includes a process of inputting an HGND voltage, a SET voltage, and a DUT GND voltage (S100), and a process of amplifying the voltage and power ( S200), a process of generating a power supply voltage to be applied to the DUT in the power supply voltage generation module (S300), and a process of inputting the power supply voltage to the DUT to perform a test (S400).

Process S100 is a process for inputting a voltage required for a semiconductor test apparatus with improved accuracy. In this process, the HGND voltage and the DUT GND voltage, which is the GND of the device under test, are set by the user for the test or a preset value (SET). The voltage is input. As described in FIG. 2, the DUT GND voltage and the SET voltage may be input to the non-inverting input terminal of the OP AMP 110 included in the amplification module 100, and the HGND voltage may be the inverting input terminal of the OP AMP 110. Can be entered. In addition, the feedback voltage from the DUT may be input to the inverting input terminal of the OP AMP 110. In this case, the amount of current may be adjusted through a resistor connected to the conductive line through which the voltage is input to the OP AMP 110.

In process S200, the voltage and power are amplified through the amplification module 100, and the amplified voltage and power are input to the power supply voltage generation module 200. The process may include a process of amplifying a voltage (S210) and a process of amplifying a power (S230). The detailed process of process S200 is demonstrated in detail with reference to FIG.

4 is a detailed flowchart of step S200 of amplifying voltage and power. As shown in FIG. 4, in process S210, the voltage input by the OP AMP 110 is amplified. In this case, the OP AMP 110 used is not limited to the positive power OP AMP, it is also possible to use a single power OP AMP. The amplified and output electrical signal can be used in process S230.

In process S230, the power of the electrical signal is amplified by the power amplifier 130. As the power is amplified, the power supply voltage may be supplied from the power supply voltage generation module 200 to the DUT 300 in the process S300.

In process S300, a power supply voltage applied from the power supply voltage generation module 200 to the DUT 300 is generated. At this time, the PPS that can be used as the power supply voltage generation module 200 is a device that generates a power supply voltage applied to the DUT 300, and performs experiments using the amplified electric signal through the amplification module 100. In order to provide the power supply voltage to be applied to the DUT 300 with high accuracy.

In process S400, a voltage is input to the DUT 300 to perform a test. In this process, the power supply voltage generated by the PPS in the process S300 is input to the DUT 300, and the performance of the corresponding DUT (300) or the presence or absence of abnormality through the reaction of the DUT 300 according to the input power supply voltage Done.

[Experimental Example]

Table 1 is a table for the DSA. For convenience of calculation, the numerical value was changed to a high value, but it is actually several tens of microseconds. Assume that each DUT GND is as follows.

The representative GND, HGND, can be calculated as follows.

HGND = Σ (DUT GND) / 16 = 1.0 V

It will be described based on the DUT # 6 of Table 1. At this time, the HGND voltage is 1V and the DUT GND voltage of # 6 is 2V. Assume that the SET voltage is 3V.

(1) When applying an existing configuration

PPS = SET + HGND = 3V + 1V = 4V

In the configuration of the conventional semiconductor test apparatus as shown in FIG. 1, since the value is compensated under the influence of the feedback voltage from the DUT, that is, the HGND voltage, the voltage of 4V plus 1V is output in the PPS. Since the DUT GND voltage of DUT # 6 is 2V, the voltage applied to DUT # 6, which is the device under test (DUT), becomes 4V-2V = 2V. Since 3V is expected, an error of 1V occurs.

(2) When applying the configuration proposed in the present invention

PPS = (SET + HGND) + (DUT GND-HGHD) = (3V + 1V) + (2V-1V) = 5V

In the configuration of the semiconductor test apparatus with the improved accuracy according to the embodiment of the present invention as shown in FIG. 2, since the difference between the DUT GND and HGND (DUT GND-HGND = 1V) is further compensated, the conventional PPS device is known. The voltage of 5V, which is compensated 1V more than in the semiconductor test apparatus, is output. Since the DUT GND voltage of DUT # 6 is 2V, the voltage applied to DUT # 6, which is the device under test (DUT), is 5V-2V = 3V. Since 3V is expected, no error occurs.

In summary, when the SET voltage is set to 3V according to this calculation, the equipment outputs 4V because the HGND voltage, which is the feedback voltage from the DUT, is 1V. In the previous configuration, 4V is output as it is because the compensation for DUT GND is not included. In this case, since the DUT GND voltage of DUT # 6 is 2V, the voltage recognized by DUT # 6, which is the actual device under test (DUT), becomes 4V-2V = 2V, and an error of 1V occurs with the intended 3V. On the other hand, in the configuration proposed in the present invention, since the compensation for the DUT GND enters, 5V is output by further compensating 1V, which is the difference between the DUT GND and HGND, to 1V, which is the HGND voltage that is the feedback voltage from the DUT. Since the DUT GND voltage of DUT # 6 is 2V, the voltage recognized by the actual device under test (DUT) DUT # 6 is 5V-2V = 3V, which is exactly the intended 3V.

As described above, the present invention can apply the correct value by sensing the GND in the individual DUT. In addition, since these circuits are present individually on every DSA, every DSA can receive a PPS voltage with improved accuracy. Furthermore, when HGND wires all DSA GNDs, not only PPS, but also parametric measurement units (PMUs) and signals can be compensated.

The present invention may be embodied in many other specific forms without departing from the spirit or essential characteristics of the invention.

10: Conventional Semiconductor Test Equipment
20: Semiconductor Test Equipment Improves Accuracy
100: amplification module 110: operational amplifier (OP AMP)
130: power amplifier 200: power supply voltage generation module
300: device under test (DUT)
S100: Process in which voltage is input
S200: Process of Boosting Voltage and Power
S210: Process where the voltage is amplified by OP AMP
S230: Process in which power is amplified by the Power Amplifier
S300: Process for generating a power supply voltage to be applied to the DUT from the power supply voltage generation module
S400: a process in which a test is performed on a DUT to which a power voltage is applied

Claims (5)

In the semiconductor test apparatus,
A power supply voltage generation module configured to generate a power supply voltage applied to a device under test (hereinafter, referred to as a 'DUT'); And
Including an amplification module for amplifying a voltage and power supply to the power supply voltage generation module,
The amplification module compensates for the DUT GND by receiving and amplifying all the voltages of the HGND which is the representative ground, the set or preset voltage set by the user, and the voltage of the DUT GND which is the ground of the DUT. Through supplying the correct voltage to the power supply voltage generation module,
The amplification module,
A power amplifier for amplifying and supplying power to the power supply voltage generation module; And
And an operational amplifier (hereinafter referred to as "OP AMP") for amplifying a voltage and inputting the voltage to the power amplifier.
The method of claim 1, wherein the power supply voltage generation module,
A semiconductor test device with improved accuracy, comprising a programmable power supply (hereinafter, referred to as a 'PPS').
delete The method of claim 1, wherein the OP AMP,
The HGND voltage and the feedback voltage from the DUT are input to an inverting input terminal, and the SET voltage and the DUT GND voltage are input to a non-inverting input terminal. Device.
5. The method of claim 4,
The semiconductor test device with improved accuracy, characterized in that the resistance is connected to the conductive wire is a voltage input to the OP AMP to adjust the current.

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