KR101216806B1 - Power semiconductor device - Google Patents

Power semiconductor device Download PDF

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Publication number
KR101216806B1
KR101216806B1 KR1020110086404A KR20110086404A KR101216806B1 KR 101216806 B1 KR101216806 B1 KR 101216806B1 KR 1020110086404 A KR1020110086404 A KR 1020110086404A KR 20110086404 A KR20110086404 A KR 20110086404A KR 101216806 B1 KR101216806 B1 KR 101216806B1
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KR
South Korea
Prior art keywords
conductive column
region
conductive
column
active cell
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KR1020110086404A
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Korean (ko)
Inventor
홍기석
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주식회사 케이이씨
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0642—Isolation within the component, i.e. internal isolation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7811—Vertical DMOS transistors, i.e. VDMOS transistors with an edge termination structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7816—Lateral DMOS transistors, i.e. LDMOS transistors
    • H01L29/7823—Lateral DMOS transistors, i.e. LDMOS transistors with an edge termination structure

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

One embodiment of the present invention relates to a power semiconductor device, and a technical problem to be solved is to provide a power semiconductor device having a relatively higher breakdown voltage of the termination region formed outside the active cell region and the diode region.
To this end, the present invention provides a power semiconductor device comprising an active cell region, a diode region formed outside the active cell region, and a termination region formed outside the diode region. Respectively, the first conductive column and the second conductive column are sequentially formed, and the concentrations of the first conductive column and the second conductive column in the active cell region and the diode region are the same. Disclosed are power semiconductor devices in which the concentrations of the first conductive column and the second conductive column are formed differently.

Description

Power semiconductor device {POWER SEMICONDUCTOR DEVICE}

One embodiment of the invention is directed to a power semiconductor device.

In general, a power semiconductor device includes an active cell region, a diode region formed outside the active cell region, and a termination region formed outside the diode region in a planar structure.

In addition, such a power semiconductor device includes a semiconductor substrate and an epitaxial layer in a vertical structure, and particularly a body region, a source region, a gate oxide film, and a gate electrode in an active cell region. Of course, in the active region, the source metal is deposited on the source region, and the drain metal is deposited on the semiconductor substrate.

On the other hand, such a power semiconductor device is one of the important design elements withstand voltage at a constant voltage. Since the area of the active cell region is generally larger than the area of the termination region, the breakdown voltage of the termination region should be made larger so that the breakdown voltage or surge current can be uniformly applied to the relatively wide active cell region.

One embodiment of the present invention provides a power semiconductor device having a relatively higher breakdown voltage of an termination region formed outside the active cell region and the diode region.

An embodiment of the present invention is a power semiconductor device comprising an active cell region, a diode region formed outside the active cell region, and a termination region formed outside the diode region, wherein the active cell region, the diode region, and the termination The first conductive column and the second conductive column are sequentially formed in the region, respectively, and the amount of charge of the first conductive column and the second conductive column in the active cell region and the diode region is the same, and the termination region is the same. The amount of charge in the first conductive column and the second conductive column in Equation provide different power semiconductor devices.

In the termination region, the amount of charge of the second conductive column may be smaller than the amount of charge of the first conductive column.

In the termination region, the amount of charge of the second conductive column may be 0.75 to 0.95 times the amount of charge of the first conductive column.

In the termination region, a width of the second conductive column may be relatively smaller than a width of the first conductive column.

In the termination region, the concentration of the second conductive column may be 0.75 to 0.95 times the amount of charge of the first conductive column.

The first conductive column may be a semiconductor region formed by n-type impurities, and the second conductive column may be a semiconductor region formed by p-type impurities.

The first conductive column may be a first conductive epitaxial layer formed on a first conductive semiconductor substrate, and the second conductive column may be a second conductive epitaxial layer formed together on the first conductive epitaxial layer. have.

According to an embodiment of the present invention, the amount of charge in the second conductive column in the termination region is relatively smaller than the amount of charge in the first conductive column in the termination region compared to the active cell region and the diode region, thereby terminating the region compared to the active cell region and the diode region. The result is a power semiconductor device with increased breakdown voltage at.

1 is a cross-sectional view illustrating a power semiconductor device according to an embodiment of the present invention.
2 is a cross-sectional view showing a power semiconductor device according to another embodiment of the present invention.
3 is a graph showing the relationship between the breakdown voltage and the concentration of the first conductive column / second conductive column by the power semiconductor device according to the embodiment of the present invention.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings such that those skilled in the art may easily implement the present invention.

1 and 2 are cross-sectional views illustrating power semiconductor devices 100 and 200 according to an embodiment of the present invention.

As shown in FIGS. 1 and 2, the power semiconductor devices 100 and 200 according to the present invention have an active cell region AC and a diode region DR formed outside the active cell region AC in a horizontal cross-sectional structure. And a termination region TR formed outside the diode region DR.

In the present invention, a first conductive column and a second conductive column are sequentially formed in the active cell region AC, the diode region DR, and the termination region TR, respectively. Here, the first conductive column and the second conductive column formed in the active cell region AC and the diode region DR are defined by reference numerals 181 and 182, respectively, and the first conductive type formed in the termination region TR. The column and the second conductive column are defined by reference numerals 181a and 182a.

The amount of charge of the first conductive column 181 and the second conductive column 182 in the active cell region AC and the diode region DR is the same, and the first conductivity in the termination region TR is the same. It is a main feature of the present invention that the charge amounts of the type column 181a and the second conductive column 182a are different from each other.

More specifically, in the termination region TR, the charge amount of the second conductive column 182a is smaller than the charge amount of the first conductive column 181a, and more specifically, the second conductivity in the termination region TR. The amount of charge of the type column 182a may be 0.75 to 0.95 times the amount of charge of the first conductive column 181a.

The first conductive columns 181 and 181a are defined as semiconductor regions formed by n-type impurities, and the second conductive columns 182 and 182a are defined as semiconductor regions formed by p-type impurities.

Meanwhile, the vertical cross-sectional structure of the power semiconductor devices 100 and 200 will be described.

An approximately flat first conductive semiconductor substrate 110 is provided, and a first conductive epitaxial layer 120 having a predetermined thickness is formed on the first conductive substrate 110, and the first conductive epitaxial layer is formed. An active cell region AC, a diode region DR, and a termination region TR are defined at 120, and a plurality of first conductive columns 181 and 181a and second conductive columns 182 and 182a are formed. do.

Here, the first conductivity type means that n-type impurities are included in silicon, for example. In addition, the second conductivity type means that the p-type impurity is included in silicon, for example. In addition, the concentration of the first conductive epitaxial layer 120 is lower than that of the first conductive semiconductor substrate 110.

A plurality of second conductive bodies 130 are formed at a predetermined interval in the active cell region AC, and a plurality of first conductive source regions 140 are formed in the second conductive body 130. . In addition, a gate oxide layer 150 is formed on surfaces of the second conductive body 130, the first conductive source region 140, and the first conductive epitaxial layer 120, and the gate oxide layer 150 is formed on the surface of the second conductive body 130. The gate electrode 160 is formed thereon.

Although not illustrated, the gate oxide film 150 and the gate electrode 160 may be covered with an interlayer insulating film, and the first conductive source region 140 and the second conductive body 130 outside the interlayer insulating film may be formed. Source metal is deposited. Of course, the drain metal is deposited on the bottom surface of the first conductive semiconductor substrate 110. In addition, a gate metal is connected to the gate electrode 160.

In this way, in the active cell region AC, when a voltage difference higher than a threshold voltage is applied to the gate metal after a potential difference is applied between the source metal and the drain metal, the first conductive source region 140 and the first conductive layer are applied. A channel is formed in the second conductive body 130 formed between the conductive epitaxial layer 120, and a current flows between the source metal and the drain metal through the channel.

A second conductive body 130a is formed in the diode region DR at a predetermined depth from the first conductive epitaxial layer 120. Thus, the diode region DR is naturally formed. The diode region DR serves to quickly absorb and remove carriers when the gate voltage is blocked.

In addition, an oxide film 170 having a predetermined thickness is formed on the surfaces of the diode region DR and the termination region TR. In some cases, the oxide film 170 is connected with a field plate connected through the diode region DR. It can be formed on).

Meanwhile, in the active cell region AC, the diode region DR, and the termination region TR, the first conductive column 181 and 181a and the second conductive layer are formed on the first conductive epitaxial layer 120 as described above. Mold columns 182 and 182a may be sequentially formed. The first conductive columns 181 and 18a may be formed of a first conductive epitaxial layer formed on the first conductive semiconductor substrate 110, and the second conductive columns 182 and 182a may be formed of the first conductive epitaxial layer. The second conductive epitaxial layer is formed together with the first conductive epitaxial layer. Of course, various methods of forming the first conductive column and the second conductive column in addition to the epitaxial method are known.

In addition, as shown in FIG. 1, in the termination region TR, the width W2 of the second conductive column 182a is the width W1 of the first conductive column 181a in the termination region TR. It can be formed relatively smaller. When the concentration of the first conductive column 181a and the second conductive column 182a is the same, but the width of the second conductive column 182a is smaller than the width of the first conductive column 181a. Naturally, the amount of charge that the second conductive column 182a has becomes smaller than the amount of charge that the first conductive column 181a has. Here, the widths of the first conductive column 181 and the second conductive column 182 in the active cell region AC and the diode region DR are the same, and the amount of charge and concentration are the same.

Also, as illustrated in FIG. 2, in order to control the amount of charge, the concentration of the second conductive column 182a may be formed to be smaller than that of the first conductive column 181a in the termination region TR. Can be. As such, the widths W1 and W2 of the first conductive column 181a and the second conductive column 182a are the same, but the concentration of the second conductive column 182 is the same as that of the first conductive column 181. When the concentration is smaller than, the amount of charge that the second conductive column 182 has naturally becomes smaller than the concentration that the first conductive column 181 has.

In this case, the concentration of the second conductive column 182a in the termination region TR may be 0.75 to 0.95 times the amount of charge of the first conductive column 181a.

In this case, the concentration of the second conductive column 182a in the termination region TR may be 0.75 to 0.95 times the amount of charge of the first conductive column 181a.

In addition, the concentrations and charges of the first conductive column 181 and the second conductive column 182 in the active cell region AC and the diode region DR are the same as well as the width thereof.

3 is a graph showing a relationship between the breakdown voltage and the first conductive column / second conductive column by the power semiconductor devices 100 and 200 according to the embodiment of the present invention. Here, the concentration may be viewed substantially in the same sense as the charge amount.

As shown in FIG. 3, the X axis is the concentration ratio (%) of the second conductive column 182a / the first conductive column 181a, and the Y axis is a breakdown voltage that the semiconductor device can withstand without breaking. .

When the concentration ratio of the second conductive column 182a / the first conductive column 181a is less than approximately 75%, it can be seen that the breakdown voltage is 400 V at maximum, and the second conductive column 182a / the first conductive column When the concentration ratio of the mold column 181a exceeds approximately 95%, it can be seen that the breakdown voltage is 600 V at maximum.

However, when the concentration ratio of the second conductive column 182a / first conductive column 181a is about 75% to 95%, it can be seen that the breakdown voltage is 700V to 800V.

Based on the experimental results, the inventors of the present invention found that when the concentration (charge amount) ratio of the second conductive column 182a / first conductive column 181a is approximately 75% to 95%, the breakdown voltage is the most. I could find high.

What has been described above is only one embodiment for implementing the power semiconductor device according to the present invention, and the present invention is not limited to the above-described embodiment, and as claimed in the following claims, the gist of the present invention Without departing from the scope of the present invention, any person having ordinary skill in the art will have the technical spirit of the present invention to the extent that various modifications can be made.

100; Power semiconductor device according to the present invention
AC: active cell area DR: diode area
TR; Termination area 110; First Conductive Semiconductor Substrate
120; A first conductive epitaxial layer 130; Second conductive body
140; First conductive source region 150; Gate oxide film
160; Gate electrode 170; Oxide film
181; First conductive column 182; Second conductivity type column

Claims (7)

A power semiconductor device comprising an active cell region, a diode region formed outside the active cell region, and a termination region formed outside the diode region,
A first conductive column and a second conductive column are sequentially formed in the active cell region, the diode region and the termination region, respectively.
The amount of charge in the first conductive column and the second conductive column in the active cell region and the diode region is the same,
And the amount of charges of the first conductive column and the second conductive column in the termination region are different from each other. The method of claim 1,
And the charge amount of the second conductive column in the termination region is smaller than that of the first conductive column. The method of claim 1,
And the charge amount of the second conductive column in the termination region is 0.75 to 0.95 times the charge amount of the first conductive column. The method of claim 1,
And the width of the second conductive column is relatively smaller than the width of the first conductive column in the termination region. The method of claim 1,
And the concentration of the second conductive column in the termination region is 0.75 to 0.95 times the amount of charge of the first conductive column. The method of claim 1,
And the first conductive column is a semiconductor region formed by n-type impurities, and the second conductive column is a semiconductor region formed by p-type impurities. The method of claim 1,
The first conductive column is a first conductive epitaxial layer formed on the first conductive semiconductor substrate,
And the second conductive column is a second conductive epitaxial layer formed together on the first conductive epitaxial layer.
KR1020110086404A 2011-08-29 2011-08-29 Power semiconductor device KR101216806B1 (en)

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Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004319732A (en) 2003-04-16 2004-11-11 Toshiba Corp Semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004319732A (en) 2003-04-16 2004-11-11 Toshiba Corp Semiconductor device

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