KR101216676B1 - Sub-channel allocation apparatus in broadband wireless communication system - Google Patents

Abstract

An apparatus for allocating subchannels in a broadband wireless communication system, comprising: a channel coding unit for channel coding data provided from an upper end, and a respective subchannel allocation processor according to a subchannel allocation method; A sub-channel allocator for generating a physical address for mapping the channel coded data to a frame buffer according to the sub-channel allocation information of the data, and the data at the generated physical address. Including a frame buffer that maps the order of the data provided to the Inverse Fast Fourier Transform (IFFT) calculator, the utilization of the modulation part can be maintained at about 64% of the time average of the maximum utilization state. And reduce the wasted resources by using shared memory to reduce memory consumption to 30% of maximum utilization. There is an advantage in that the overall processing time can be reduced by performing null coding and subchannel allocation in parallel.

Spatial Division Multiplexing, Subchannel Allocator, Adaptive Antenna System, OFDM

Description

SUB-CHANNEL ALLOCATION APPARATUS IN BROADBAND WIRELESS COMMUNICATION SYSTEM}

1 is a block diagram of a broadband wireless communication system according to an embodiment of the present invention;

2 is a block diagram of a subchannel allocator of a broadband wireless communication system according to an embodiment of the present invention;

3 is a block diagram of a subchannel allocator of a broadband wireless communication system according to another embodiment of the present invention; and

4 is a block diagram of a broadband wireless communication system according to another embodiment of the present invention.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wideband wireless communication system, and more particularly, to a subchannel allocation apparatus for reducing power consumption and resources by inefficient use of resources (eg, memory) by subchannel allocation in the wideband wireless communication system. will be.

In the era of wireless multimedia, the necessity of transmitting a large amount of data at high speed through a wireless channel is rapidly increasing. Accordingly, in order to support Internet services through mobile channels and wireless channels, wireless and high-speed data transmission systems have been actively studied worldwide.

The maximum transmission speed of the 3rd Generation communication system is 2Mbps in the stationary state, but the 4th Generation communication system aims at 1Gbps when stopped or walking in a wireless LAN (Local Area Network) environment. Move to a vehicle in a cellular environment (wireless metropolitan area network (MAN) and aim for 100 Mbps. However, when data is transmitted at high speed in a wireless channel, a wireless access method suitable for a wireless channel is required due to a high error rate due to multipath interference of the wireless channel.

Orthogonal Frequency Division Multiplexing (OFDM) and Orthogonal Frequency Division Multiplexing (OFDMA) are applied to the physical channel of the wireless MAN system. Electronics Engineers) 802.16 system. In other words, the IEEE 802.16 system realizes high-speed data transmission by transmitting a physical channel signal using a plurality of subcarriers.

The IEEE 802.16e system is provided with standard devices for supporting AAS (Adaptive Antenna System) mode and Non-AAS mode in one frame.

The non-AAS mode uses a diversity allocation scheme and a band adaptive modulation and coding (AMC) technique to allocate data bursts to subcarriers. In this case, the diversity allocation scheme is a method for subcarriers in a subchannel separated from each other in a frequency domain so as to obtain a diversity effect, such as a partial usage of sub-channel (PUSC), a full usage of sub-channel (FUSC), and the like. Belong.

The band AMC scheme is a method for adaptively changing a modulation scheme and a coding scheme for each frequency band according to a channel environment, and can actively cope with a channel environment.
A base station of a broadband wireless communication system using the non-AAS mode allocates a diversity subchannel to a terminal having a relatively poor channel environment by using channel quality information (CQI) information of terminals existing in a cell. A good terminal is allocated a band AMC subchannel to increase the efficiency of frequency resources.

In the AAS mode, an array antenna is used to continuously detect a cell area and adaptively form a beam pattern in a changing wireless channel environment. The AAS mode may increase cell capacity and increase cell coverage.

In the AAS mode, when N terminals exist, spatial division multiple access (SDMA), which can share frequency and time by generating N beams in the same frequency band toward each terminal, is referred to as SDMA. Can be implemented. Here, when the AAS mode is used to implement the SDMA scheme, in addition to PUSC, FUSC, and AMC, TUSC 1 (Tile Usage of Sub-Channel 1) and TUSC 2 (Tile Usage of Sub-Channel 2) are used to allocate data bursts to subcarriers. Technique is used.

As described above, the non-AAS mode system uses a subchannel allocation scheme of PUSC, FUSC, and AMC. In order to increase cell capacity and increase cell coverage, the system should implement five subchannel allocation methods by adding TUSC1 and TUSC2 in addition to the subchannel allocation methods of PUSC, FUSC, and AMC. Accordingly, there is a need for an apparatus for allocating subchannels by efficiently using resources of the broadband wireless communication system.

Accordingly, an object of the present invention is to provide a subchannel allocation apparatus for efficiently using resources in a broadband wireless communication system.

Another object of the present invention is to provide a subchannel allocation apparatus for efficiently using resources by activating only a processor of a subchannel allocation scheme used in a broadband wireless communication system.

It is still another object of the present invention to provide an apparatus for reducing overall process time by performing channel coding and subchannel allocation in parallel in a broadband wireless communication system.

According to a first aspect of the present invention for achieving the above objects, an apparatus for allocating subchannels in a wireless communication system includes a channel coding unit for channel coding data received from an upper end, and a different subchannel. At least one subchannel allocation processor having a channel allocation scheme, and generating a physical address for mapping the channel coded data to a frame buffer according to the subchannel allocation information of the data provided from the upper end. Sub-channel allocator (Sub-Channel Allocation), and the frame buffer to arrange the order of the data by mapping the data to the physical address generated by the sub-channel allocator.

According to a second aspect of the present invention, an apparatus for allocating subchannels in a broadband wireless communication system using a SDMA scheme includes channel coding for channel coding data received from an upper end. And at least one subchannel allocation processor having different subchannel allocation schemes, and mapping the channel coded data to a frame buffer according to the subchannel allocation information of the data provided from the upper end. A sub-channel allocator for generating a physical address for the data; and a frame buffer for arranging the order of the data by mapping the data to the physical address generated by the sub-channel allocator. The channel coding unit and the subchannel allocator may be operated in parallel.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Reference will now be made in detail to the preferred embodiments of the present invention, examples of which are illustrated in the accompanying drawings. In the following description of the present invention, detailed descriptions of related known functions or configurations will be omitted if it is determined that the detailed description of the present invention may unnecessarily obscure the subject matter of the present invention.

Hereinafter, the present invention describes a subchannel allocation technique for efficiently using resources (eg, memory) in a broadband wireless communication system.

1 is a block diagram of a broadband wireless communication system according to an exemplary embodiment of the present invention.

As shown in FIG. 1, the transmitter of the broadband wireless communication system includes an encoder 101, a modulator 103, a sub-channel allocation 105, a frame buffer 107, It includes an Inverse Fast Fourier Transform (IFFT) operator 109, a Cyclic Prefix (CP) adder 111, and a Radio Frequency (RF) processor 113.

The encoder 101 performs channel coding on burst data (bit stream) provided from an upper end according to a predetermined code rate and outputs the result. The modulator 103 modulates the data provided from the encoder 101 in a corresponding modulation scheme and outputs the modulated data. Here, the modulation scheme may be Quadrature Phase Shift Keying (QPSK), 16 Quadrature Amplitude Modulation (16QAM), 64QAM, or the like.

The subchannel allocator 105 generates and outputs a physical address to map data received from the modulator 103 using the burst information logically allocated at the upper end.

The frame buffer 107 receives the data from the subchannel allocator 105 and a physical address for mapping the data, allocates the data according to the physical address, and outputs the data to the IFFT operator 109. The order is aligned (in case of 1024 FFT OFDMA, 1 symbol 1-> 1024 subcarriers, 2 symbols 1-> 1024 subcarriers ...).

The IFFT operator 109 converts the signal provided from the frame buffer 107 into an inverse fast fourier transform and converts the signal into a signal in a time domain.

The CP adder 111 provides a protection period to a signal in the time domain provided from the IFFT operator 109 to remove inter-symbol interference caused by a multipath fading phenomenon of a wireless channel. Insert Prefix) to print.

The RF processor 113 frequency-converts the signal provided from the CP adder 111 into an RF signal and transmits the same through an antenna.

2 is a block diagram of a subchannel allocator of a broadband wireless communication system according to an exemplary embodiment of the present invention. Hereinafter, the subchannel allocator of the broadband wireless communication system using the AAS mode will be described as an example. In addition, it is assumed that FIG. 2 shows a detailed configuration of the subchannel allocator 105 shown in FIG.

As shown in FIG. 2, the subchannel allocator 105 includes a PUSC processor 201, a FUSC processor 203, an OFUSC processor 205, an AMC processor 207, a TUSC1 processor 209, and a TUSC2 processor ( 211, internal memories 202, 204, 206, 208, 210, 212 of each processor, a switch 213, and a modulation buffer 215.

Each of the subchannel allocation processors 201, 203, 205, 207, 209, and 211 is activated through an activation signal and receives burst information to receive each subchannel allocation processor 201, 203, 205, 207, 209, and the like. A physical address is calculated according to the subchannel allocation method of 211). For example, the PUSC processor 201 calculates physical addresses of pilot and data subcarriers in each cluster. Here, the cluster is used as a basic unit of subchannel allocation, and is composed of 28 subcarriers (24 data and 4 pilot subcarriers) over two symbols, and one subchannel is composed of two clusters (48 data subcarriers). It is composed. The PUSC subchannel allocation method region is located after the preamble of every frame.

The FUSC processor 203 sequentially generates and assigns a physical address to the data subcarriers excluding the pilot subcarriers in each symbol. Here, one symbol consists of 48 data subcarriers.

The pilot subcarrier consists of a fixed set of 11 subcarriers and a variable set of 71 subcarriers. The variable set is 12k + 6 (k = 0,1,2, ..., 70) for odd-numbered symbols and 12k (k = 0,1,2, ..., 70) for even-numbered symbols. The position changes.

The OFUSC (Optional FUSC) processor 205 performs the FUSC processor (except that the position of a pilot subcarrier is 9k + 3m + 1 (k = 0,1, ..., 95, m = (symbol index) mod 3)). As in step 203, physical symbols are sequentially generated and allocated to the data subcarriers except for the pilot subcarriers in each symbol.

The AMC processor 207 calculates physical addresses of pilot and data subcarriers in each channel. Here, one subchannel is composed of six consecutive bins (including 48 data subcarriers), and the bin is a basic unit of subchannel allocation consisting of nine subcarriers (8 data and one pilot subcarrier). to be.

The TUSC1 processor 209 calculates physical addresses of pilot and data subcarriers in each tile. Here, the tile is a basic unit of subchannel allocation and is composed of 12 subcarriers (8 data and 4 pilot subcarriers) over three symbols. In addition, one subchannel includes 6 tiles (including 48 data subcarriers).

The TUSC2 processor 211 comprises a tile consisting of nine subcarriers (8 data and one pilot subcarrier) as a basic unit of subchannel allocation, and pilots in each tile in the same manner as the TUSC2 processor 209. And calculate a physical address of the data subcarrier.

The internal memories 202, 204, 206, 208, 210 and 212 of the respective processors are the physical address generated by the respective subchannel allocation processors 201, 203, 205, 207, 209 and 211 and the modulator 103. It is used to synchronize the data provided from. That is, the time coded in the encoder 101 and the modulator 103 is longer than the time taken for the subchannel allocation. Accordingly, the internal memories 202, 204, 206, 208, 210 and 212 of each of the processors are used to synchronize data and physical addresses to be input to the frame buffer 107.

The switch 213 selects a physical address assigned to the data from among the physical addresses of the data stored in the internal memories 202, 204, 206, 208, 210, and 212 of the respective processors. To provide.

The modulation buffer 215 temporarily stores the modulated data provided from the modulator 103 while the physical address is generated in the subchannel allocation processors 201, 203, 205, 207, 209, and 211.

When allocating subchannels to one frame, all subchannel allocation functions are not used at the same time, and usually two or less subchannel allocation functions are used. However, since the subchannel allocator 105 of FIG. 2 drives the subchannel allocation processor of the subchannel allocation scheme that is not used, power consumption and resources (eg, memory) are wasted. Accordingly, the subchannel allocator 105 may be configured to selectively operate the subchannel allocation processor according to the subchannel allocation scheme allocated to the input burst as shown in FIG. 3.

3 is a block diagram of a subchannel allocator of a broadband wireless communication system according to another embodiment of the present invention. In the following description, it is assumed that the processors of the subchannel allocation scheme required in one frame send burst data for each subchannel allocation scheme by aligning the burst order in the frame at the upper end in order to sequentially activate the subchannel allocation scheme.

As shown in FIG. 3, the subchannel allocator 105 includes a PUSC processor 303, a FUSC processor 305, an OFUSC processor 307, an AMC processor 309, a TUSC1 processor 311, and a TUSC2 processor. 313, and a common memory 317 and switches 311 and 315. Here, the subchannel allocation processors 303, 305, 307, 309, 311, and 313 perform the same operations as the subchannel allocation processors 201, 203, 205, 207, 209, and 211 of FIG. 2. The description below will be omitted.

The first switch 301 switches an activation signal and burst information to a subchannel allocation processor corresponding to the input burst. That is, only the subchannel allocation processor corresponding to the input burst is activated.

The second switch 315 connects the activated subchannel allocation processor and the common memory 317 to store the physical address generated by the activated subchannel allocation processor in the common memory 317.

The shared memory 317 is selectively driven instead of all of the subchannel allocation processors, so that one memory 317 may be shared. Here, the common memory 317 may be a subchannel allocation processor (eg, AMC processor 309) that requires the largest capacity among the subchannel allocation processors 303, 305, 307, 309, 311, and 313. It must include the amount of memory required.

As described above, power consumption can be reduced by activating only the subchannel allocation processor corresponding to the input burst and deactivating the subchannel allocation processors irrelevant to the input burst. In addition, as shown in Table 1, waste of resources (eg, memory) of each subchannel allocator may be reduced.

Table 1 below shows internal memory required for each subchannel allocation processor included in the subchannel allocator 105 illustrated in FIG. 2.

Subchannel Allocation Technique Memory requirements Occupancy PUSC 7 KB 10.15 FUSC 9 KB 13.04 OFUSC 10 KB 14.49 AMC 21 KB 30.43 TUSC1 9 KB 13.04 TUSC2 13 KB 18.84 Total memory required 69 KB 100

Table 1 shows the internal memory of the subchannel allocation processors shown in FIG. As shown in FIG. 3, since the common memory 317 is used instead of the internal memory for each subchannel allocation processor, at least the required memory of the AMC processor should be included. Accordingly, the common memory 317 of FIG. 3 can save memory resources of 30% or less than the respective subchannel allocation processors of FIG. 2.

In addition, if an average of two subchannel allocation functions are used in one frame, the resource allocation of the subchannel allocator is about 24% of the maximum state. In addition, since the percentage of memory occupied by the subchannel allocator 105 in the modulation block 100 is 48%, the resource utilization of the modulation portion may be reduced by about 36% by using the subchannel allocator of FIG.

In the broadband wireless communication system, more data must be processed within the same time in order to support space division multiple access (SDMA). Therefore, the transmitter can be configured to process more data at the same time by reducing the overall processor time as shown in FIG.

4 is a block diagram of a broadband wireless communication system according to another embodiment of the present invention.

As shown in FIG. 4, the transmitter of the broadband wireless communication system includes an encoder 401, a modulator 403, a subchannel allocator 405, a frame buffer 407, and an inverse fast fourier transform (IFFT) operator 409. And a cyclic prefix adder (411) and a radio frequency (RF) processor 413.

The encoder 401 channel-codes and outputs the information data (bit stream) provided from the upper end according to a predetermined code rate. The modulator 403 modulates the data provided from the encoder 401 in a corresponding modulation scheme and outputs the modulated data to the frame buffer 407.

The sub-channel allocator 405 is configured to use the modulator 403 using burst information logically allocated at an upper end while encoding and modulating data at the encoder 401 and the modulator 403. A physical address is generated to map the data provided from) to the frame buffer 407. Thereafter, the subchannel allocator 405 outputs the generated address to the frame buffer 407 in synchronization with the time point at which the data modulated by the modulator 403 is output. Here, the subchannel allocator 405 uses a subchannel allocator as shown in FIG. 3.

The frame buffer 407, the IFFT operator 409, the CP adder 411, and the RF processor 413 are the frame buffer 107, the IFFT operator 109, and the CP adder 111 shown in FIG. And since the same operation as the RF processor 113 will be omitted.

While the present invention has been described in connection with what is presently considered to be the most practical and preferred embodiment, it is to be understood that the invention is not limited to the disclosed embodiments, but is capable of various modifications within the scope of the invention. Therefore, the scope of the present invention should not be limited to the described embodiments, but should be determined not only by the scope of the following claims, but also by the equivalents of the claims.

As described above, by activating only the subchannel allocation processor corresponding to the burst received from the upper end in the transmitter of the broadband wireless communication system, unnecessary processor power consumption can be reduced.
In addition, by configuring the transmitter so that the subchannel allocation processes constituting the transmitter use a common memory, there is an advantage in that resource consumption is reduced by reducing memory consumption to 30% of the maximum use.
In addition, by performing the channel coding and subchannel allocation in parallel in the transmitter, there is an advantage that can reduce the overall processing time.

Claims (10)

An apparatus for allocating subchannels in a wireless communication system, A channel coding unit for channel coding data received from an upper end, At least one subchannel allocation processor having different subchannel allocation schemes, and a physical address for mapping the channel coded data to a frame buffer according to the subchannel allocation information of the data provided from the upper end. Sub-channel Allocation for generating a; And a frame buffer for arranging the order of the data by mapping the data to the physical address generated by the subchannel allocator. And the data provided from the upper end includes burst data arranged for each subchannel allocation scheme in a frame. The method of claim 1, The channel coding unit includes an encoder for encoding data provided from an upper end at a predetermined code rate, And a modulator for modulating the data encoded by the encoder by a predetermined modulation scheme and providing the modulated data to the subchannel allocator. The method of claim 1, The subchannel allocator, A first switch connecting the activation signal and the data to a corresponding subchannel allocation processor according to a subchannel allocation method of the data; At least one subdivided according to a subchannel allocation method and activated by an activation signal provided through the first switch, and generating a physical address for mapping the data to the frame buffer according to the subchannel allocation method A channel allocation processor, A second switch configured to connect a memory and a subchannel allocation processor generating a physical address of the data among the at least one subchannel allocation processor; And a memory for temporarily storing a physical address of the data to synchronize the physical address of the data with the data; The method of claim 3, The at least one subchannel allocation processor may include a partial usage of sub-channel (PUSC) processor, a full USC (FUSC) processor, an adaptive modulation and coding (AMC) processor, an optional FUSC (OFUSC) processor, and a TUSC 1 (Tile USC 1). Processor), at least one of a TUSC 2 processor. The method of claim 1, An Inverse Fast Fourier Transform (IFFT) operator for inverse fast Fourier transforming the signal provided from the frame buffer, A CP adder for inserting a cyclic prefix into an output signal of the IFFT operator; And converting an output signal of the CP adder into an RF signal and outputting the RF signal to the terminal through an antenna. An apparatus for allocating subchannels in a broadband wireless communication system using a spatial division multiple access method, comprising: A channel coding unit for channel coding data received from an upper end, At least one subchannel allocation processor having different subchannel allocation schemes, and a physical address for mapping the channel coded data to a frame buffer according to the subchannel allocation information of the data provided from the upper end. Sub-channel Allocation for generating a; And a frame buffer for arranging the order of the data by mapping the data to the physical address generated by the subchannel allocator. The channel coding unit and the subchannel allocator operate in parallel, The data provided from the upper stage includes burst data arranged for each subchannel allocation scheme in a frame. The method according to claim 6, The channel coding unit includes an encoder for encoding data provided from an upper end at a predetermined code rate, And a modulator for modulating the data coded by the encoder by a predetermined modulation scheme and providing the modulated data to the subchannel allocator. The method according to claim 6, The subchannel allocator, A first switch connecting the activation signal and the data to a corresponding subchannel allocation processor according to a subchannel allocation method of the data; At least one subdivided according to a subchannel allocation method and activated by an activation signal provided through the first switch, and generating a physical address for mapping the data to the frame buffer according to the subchannel allocation method A channel allocation processor, A second switch configured to connect a memory and a subchannel allocation processor generating a physical address of the data among the at least one subchannel allocation processor; And a memory for storing the physical address of the data to synchronize the physical address of the data with the data; 9. The method of claim 8, The at least one subchannel allocation processor may include a partial usage of sub-channel (PUSC) processor, a full USC (FUSC) processor, an adaptive modulation and coding (AMC) processor, an optional FUSC (OFUSC) processor, and a TUSC 1 (Tile USC 1). Processor), at least one of a TUSC 2 processor. The method according to claim 6, An Inverse Fast Fourier Transform (IFFT) operator for inverse fast Fourier transforming the signal provided from the frame buffer, A CP adder for inserting a cyclic prefix into an output signal of the IFFT operator; And converting an output signal of the CP adder into an RF signal and outputting the RF signal to the terminal through an antenna.

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