KR101171255B1 - System and Method for Designing Semiconductor Integrated Circuit, Recording Medium Therefor - Google Patents

Abstract

A semiconductor integrated circuit design system including a memory in which a semiconductor integrated circuit design tool is stored, the semiconductor integrated circuit being designed by referring to a chip database and a chip database in which device information of each unit element included in a designed semiconductor integrated circuit is stored. Disclosed are a semiconductor integrated circuit design system and method including a characteristic analyzer configured to update operation of a chip database by acquiring operation information of each unit element included therein, and a computer-readable recording medium therefor.

Description

System and Method for Designing Semiconductor Integrated Circuit, Recording Medium Therefor}

The present invention relates to an integrated circuit design system, and more particularly to a semiconductor integrated circuit design system and method.

Semiconductor chips using semiconductor integrated circuits are designed using computer design tools. The semiconductor chip design process is performed through electronic circuit design, verification, and physical implementation thereof.

1 is a flowchart illustrating a general semiconductor integrated circuit design method.

As shown in the drawing, design data is generated using a computer design tool such as CAD (S101). The designed hardware system is verified by using a simulator (S103) to check whether it operates correctly, and in order to physically implement the verified design data, each component is disposed and wired (S105). When the arrangement and wiring is completed, the process of manufacturing the actual chip is performed (S107).

The design system for providing such a design process includes a cell library, and provides the designer with information on each device available for the semiconductor integrated circuit. Thus, designers can design the desired semiconductor chip with reference to the cell library. In addition, when the design of the semiconductor chip is completed, the information of the elements included in the chip is database (chip database) is stored in the design system.

On the other hand, in order for the designed semiconductor chip to perform faster and more stable operation, it is necessary to analyze characteristic information, that is, operation information, such as a delay amount and a current consumption amount, for each device of the designed semiconductor chip. If such characteristic information is stored in the chip database, the timing margin until a specific signal is input and output through a plurality of unit elements, or the delay amount of the input signal is changed to easily check a racing phenomenon in which the output signal cannot be predicted. This can prevent errors in design.

To this end, a method of measuring a delay value and a current amount for each node of a semiconductor integrated circuit designed using a conventional simulator, for example, HSPICE, etc., may be considered and reflected in a chip database.

However, hundreds of thousands of elements are disposed in one semiconductor chip, and if a delay value or an amount of current is measured at each node of the semiconductor chip, a huge amount of time is required. In addition, since the delay value and the current amount can be changed by PVT or the like at the time of circuit design, it is almost impossible to measure the delay value or the current amount according to all conditions.

SUMMARY OF THE INVENTION The present invention provides a semiconductor integrated circuit design apparatus and method capable of easily grasping operation information of a device included in a semiconductor chip, and a computer readable recording medium therefor.

The semiconductor integrated circuit design system according to an embodiment of the present invention for achieving the above technical problem is a semiconductor integrated circuit design system including a memory in which a semiconductor integrated circuit design tool is stored, each unit included in the designed semiconductor integrated circuit A chip database that stores device information about devices; And a characteristic analyzer configured to update the chip database by acquiring characteristic information of each unit element included in the designed semiconductor integrated circuit by referring to the chip database.

Meanwhile, a semiconductor integrated circuit design method according to an embodiment of the present invention includes a memory in which a semiconductor integrated circuit design tool is stored, a chip database in which device information of each unit element included in a designed semiconductor integrated circuit is stored, and a characteristic analysis unit. A design method in a semiconductor integrated circuit design system comprising: storing device information of each unit element included in the designed semiconductor integrated circuit in the chip database as the semiconductor integrated circuit is designed by the semiconductor integrated circuit design tool; And updating the chip database by acquiring characteristic information of each unit element included in the designed semiconductor integrated circuit by referring to the chip database.

In addition, a computer-readable recording medium for designing a semiconductor integrated circuit according to an embodiment of the present invention stores a memory in which a semiconductor integrated circuit design tool is stored and device information for each unit element included in the designed semiconductor integrated circuit. A computer-readable recording medium for a semiconductor integrated circuit design system including a chip database, the device of each unit element included in the designed semiconductor integrated circuit as the semiconductor integrated circuit is designed by the semiconductor integrated circuit design tool. Storing information in the chip database; And updating the chip database by acquiring characteristic information of each unit element included in the designed semiconductor integrated circuit by referring to the chip database.

In the present invention, the unit devices used in the designed semiconductor chip are compressed by type and size to collect characteristic information, that is, operation information, such as a delay value and an amount of current, for the compressed unit device. The operation information is then reflected in the chip database.

Therefore, when checking the signal margin of the designed semiconductor chip, the delay value or the current amount between specific nodes, it is possible to simply check the operating characteristics of the designed semiconductor chip by referring only to the chip database without using a simulator.

In addition, by reflecting such operating characteristics, it is possible to design a semiconductor chip capable of operating at a higher speed and more stably.

1 is a flowchart illustrating a general semiconductor integrated circuit design method;
2 is a block diagram of a semiconductor integrated circuit design system according to an embodiment of the present invention;
3 is an exemplary view of a characteristic analyzer shown in FIG. 2;
4 is a flowchart illustrating a semiconductor integrated circuit design method according to an embodiment of the present invention;
5 is a flowchart illustrating a process of reflecting operation information shown in FIG. 4;
6 is an exemplary diagram of a chip database applied to the present invention;
FIG. 7 is a diagram for explaining an example of updating the chip database shown in FIG. 6.

Hereinafter, with reference to the accompanying drawings will be described an embodiment of the present invention in more detail.

2 is a configuration diagram of a semiconductor integrated circuit design system according to an exemplary embodiment of the present invention.

Referring to FIG. 2, the semiconductor integrated circuit design system 10 may include a controller 110 for controlling overall operation, a cell library 120 storing related information of each unit element available for design, and a computer design tool such as CAD. The memory 130 includes a memory 130, a characteristic analyzer 140, a simulator 150, a user interface (UI) 160, and a chip database 170.

Computer design tools such as CAD stored in memory 130 allow designers to refer to cell library 120 to generate design data. The simulator 150 allows to verify that the designed hardware system is operating correctly. In addition, if the integrated circuit is designed through a computer design tool, and verified to operate correctly through the verification process, information about each unit element used in the designed circuit is built into the chip database 170. In this case, the information stored in the chip database 170 may include a device name, a function, a size, a fanout value, an input / output terminal definition, a location of the input / output terminal, and the like.

The characteristic analyzer 140 extracts at least one unit device, which is an object of measurement of operation information, from among the unit devices used in the designed semiconductor integrated circuit by referring to the chip database 170. Then, the operation information on the extracted unit device is checked.

To this end, the characteristic analyzer 140 may be configured as shown in FIG. 3.

3 is an exemplary view of a characteristic analyzer illustrated in FIG. 2.

Referring to FIG. 3, the characteristic analyzer 140 may include an element information listing unit 141, a sampling unit 143, a measurement unit 145, a correction unit 147, and a list-up unit 149. .

The device information listing unit 141 collects information of each unit device used in the semiconductor chip designed by referring to the chip database 170. In addition, the device information listing unit 141 may sort the information of each unit device collected by type and size.

As the sampling unit 143 collects the information of each unit device in the device information listing unit 141, the sampling unit 143 extracts unit devices having different types and sizes to determine the measurement target. That is, when there are a plurality of unit elements having the same type and size, only one of them is extracted as an operation information analysis target.

A plurality of unit devices of the same type and the same size (channel width / length in the case of transistors) may be used for the designed semiconductor chip. Since the unit elements of the same type and size have the same delay value, the amount of current consumption, and the like, it will be wasteful to repeatedly measure the delay value, the amount of current consumption, and the like for such elements. Accordingly, when there are a plurality of unit elements having the same type / size, the sampling unit 143 selects only one of them and reduces the number of unit elements to be measured.

Hundreds of thousands of devices are used for one semiconductor chip, and 17 to 200,000 unit devices are used for a 1 GByte memory device. However, when the unit device of the same type and size is removed through the sampling unit 143, the number of unit devices to be measured is reduced to thousands. Therefore, assuming that it takes about 1 second to measure the delay value of one transistor, the time required to measure the operation information for each unit element can be reduced to about 1/20.

The measuring unit 145 measures operation information regarding the rising pulse and the falling pulse with respect to each unit element extracted by the sampling unit 143. For example, the delay value and current consumption when a rising pulse is applied, and the delay value and current consumption when a falling pulse is applied are measured.

To this end, the measuring unit 145 inputs an arbitrary rising (or falling) pulse signal to each unit element extracted by the sampling unit 143 and measures an output pulse. Then, the delay value is calculated by comparing the input pulse with the output pulse. Similarly, the current consumption can be measured by calculating the difference between the amount of current when an arbitrary rising (or falling) pulse signal is input to the unit element and the amount of current when the pulse signal is output.

The correction unit 147 corrects the operation information in consideration of the fanout value for the unit element extracted by the sampling unit 143. That is, a correction value such as a delay amount ratio and a current consumption ratio is calculated by referring to the fanout value for each unit element and reflected in the operation information measured by the measuring unit 145.

For example, the delay value measured by the measurement unit 145 for the specific unit element is D, and the ratio of the delay amount considering the fanout value in the correction unit 147 is Fa (F is a fanout value, and a is a positive value. Integer), the final delay value of the unit device can be corrected to D + Fa. Similarly, if the current consumption measured by the measuring unit 145 is I and the value corrected by the correction unit 147 is Fb (F is a fanout value and b is a positive integer), the final current consumption is I. Can be corrected to + Fb.

The list-up unit 149 reflects the operation information for each unit element acquired by the correction unit 147 in the chip database 170. The chip database 170 includes information on all unit devices included in the designed semiconductor chip. In addition, the correction unit 147 obtains operation information about unit elements having different types and sizes.

Accordingly, the list-up unit 149 stores the operation information for each unit element obtained by the correction unit 147 in the chip database 170, and at this time, the unit of the same type and size as the unit element selected by the sampling unit 143. The chip database 170 may be updated by reflecting the same operation information for the device.

4 is a flowchart illustrating a semiconductor integrated circuit design method according to an embodiment of the present invention.

Referring to FIG. 4, design data is generated using a computer design tool such as CAD stored in the memory 130 of the semiconductor integrated circuit design system 10 (S201). The designed hardware system is verified using the simulator 150 to check whether it is operating correctly (S203).

If it is confirmed that the circuit designed in step S201 operates correctly, each component is arranged and wired using a computer design tool to physically implement the verified design data (S205). In addition, when the arrangement and wiring is completed, information of each unit element used in the semiconductor chip may be built into the chip database 170.

Thereafter, the characteristic analyzer 140 checks the operation information of each unit element used in the semiconductor integrated circuit designed with reference to the chip database 170 and reflects it to the chip database 170 (S207). In this case, the characteristic analyzer 140 extracts at least one unit device, which is an object of measurement of operation information, in consideration of the type and size of the device for the designed unit integrated circuit. Then, the operation information on the extracted unit device is checked.

5 is a flowchart illustrating a process of reflecting operation information illustrated in FIG. 4.

First, the device information listing unit 141 collects information of each unit device used in the semiconductor chip designed with reference to the chip database 170 (S301). In this case, the collected device information may be arranged to sort information of each unit by type and size.

Next, the sampling unit 143 extracts unit elements having different types and sizes from each other by referring to the information of the unit elements collected in step S301 (S303). That is, in order to prevent duplicate measurement of a plurality of unit elements having the same type and size, when there are a plurality of unit elements having the same type and size, only one of them is selected for analysis.

When the analysis target unit device is selected, the measurement unit 145 measures operation information on each selected unit device (S305). For example, the delay value and current consumption when a rising pulse is applied, and the delay value and current consumption when a falling pulse is applied are measured.

Since the operation information measured in step S305 is simply a comparison value of the output signal (output current amount) with respect to the input signal (input current amount), correction is made to measure more accurate characteristics of each unit element (S307). The correction process S307 may be performed in consideration of the fanout value of each unit element, and thus, operation information considering the fanout value is obtained for each unit element.

When operation information of each unit element extracted as a sample is obtained, the list-up unit 149 updates the operation information for each unit element obtained in operation S307 to the chip database 170 (S309). In this case, the operation information of all the unit elements included in the semiconductor integrated circuit designed by reflecting the same operation information for the unit element of the same type and size as the unit element selected in step S303 may be constructed in the chip database 170.

6 is an exemplary diagram of a chip database applied to the present invention.

When the electronic circuit is designed, verified, arranged, and wired by the designer, information about all the unit devices included in the designed semiconductor integrated circuit may be built into the chip database 170 as illustrated in FIG. 6.

Referring to FIG. 6, in the chip database 170 in which wiring and arrangement are completed, device information including a device name, a function, a size, an input / output terminal definition, an input / output terminal position, a fanout value, and the like of each unit element is stored. Can be.

Meanwhile, as in the present invention, after selecting unit devices having different types and sizes from the designed semiconductor integrated circuit and obtaining operation information, the chip database 170 may be changed as shown in FIG. 7.

FIG. 7 is a diagram for explaining an example of updating the chip database shown in FIG. 6.

As can be seen in FIG. 7, the updated chip database 170 has element information (element name, function, size, input / output terminal definition, input / output terminal position) stored in the chip database 170 after the minimum arrangement and wiring completion. , Fanout value, etc.), as well as operation information such as a delay value and current consumption.

As described above, in the present invention, a delay value, a current consumption amount, and the like of each unit element included in the designed semiconductor integrated circuit are databased. For the designed semiconductor integrated circuit, it is assumed that it is necessary to measure a delay time after passing a plurality of unit devices by inputting a signal to a unit device at a specific node. If the operation information is not made into a DB as in the present invention, it should be measured directly by using a simulator, and the influence of PVT cannot be excluded in this process.

However, when the operation information is made into a DB as in the present invention, the delay time can be obtained without a separate simulation process simply by summing pre-established delay values for each unit element.

Furthermore, since the delay value for the rising pulse and the delay value for the falling pulse have been measured for each unit element, the delay means after passing the plurality of unit elements by applying the rising pulse is required. The rising delay values measured from the unit devices of and the falling delay values measured from the unit devices of the paired units may be obtained and summed, respectively.

Current consumption can also be measured in a similar manner.

As described above, the unit devices having different types and sizes are sampled among the unit devices included in the semiconductor integrated circuit, the operation information such as the delay value / current consumption is measured, and the operation is performed in consideration of the fanout value. By correcting the information accurately, the operation information of each unit device can be DBized.

In addition, the design error can be identified by referring to the DB, and the circuit design can be optimized for more stable and high speed operation.

Those skilled in the art to which the present invention described above belongs will understand that the present invention can be implemented in other specific forms without changing the technical spirit or essential features. Therefore, the above-described embodiments are to be understood as illustrative in all respects and not as restrictive. The scope of the present invention is defined by the appended claims rather than the detailed description and all changes or modifications derived from the meaning and scope of the claims and their equivalents are to be construed as being included within the scope of the present invention do.

10: semiconductor integrated circuit design system
110:
120: cell library
130: memory
140: characterization unit
150: simulator
160: user interface
170: chip database
141: device information listing
143: sampling unit
145 measuring unit
147: correction unit
149: List Up

Claims (14)

A semiconductor integrated circuit design system comprising a memory in which a semiconductor integrated circuit design tool is stored,
A chip database storing device information on each unit device included in the designed semiconductor integrated circuit;
An element information listing unit for collecting the element information of each unit element used in the designed semiconductor integrated circuit by referring to the chip database;
A sampling unit extracting unit elements having different types and sizes from each other by referring to the device information collected by the device information listing unit;
A measuring unit measuring operation information on each unit element extracted by the sampling unit;
A correction unit correcting the operation information measured by the measurement unit based on a fanout value of each unit element extracted by the sampling unit; And
A list-up unit for storing operation information for each unit element corrected by the correction unit in the chip database;
Semiconductor integrated circuit design system comprising a. delete Claim 3 has been abandoned due to the setting registration fee. The method of claim 1,
And the device information includes a type, a size, and a fan out value of each unit device. Claim 4 has been abandoned due to the setting registration fee. The method of claim 3, wherein
The operation information includes a delay value or a current consumption amount,
And the measuring unit measures a delay value or a current consumption for a rising pulse and / or a falling pulse for each unit element extracted by the sampling unit. A design method in a semiconductor integrated circuit design system including a memory in which a semiconductor integrated circuit design tool is stored, a chip database in which device information of each unit element included in a designed semiconductor integrated circuit is stored, and a characteristic analyzer,
Storing device information of each unit element included in the designed semiconductor integrated circuit in the chip database as the semiconductor integrated circuit is designed by the semiconductor integrated circuit design tool;
Collecting the device information including the type, size, and fanout value of a unit device used in the designed semiconductor integrated circuit;
Extracting unit devices having different types and sizes from each other by referring to the collected device information; And
Obtaining operation information on the extracted unit device;
Semiconductor integrated circuit design method comprising a. delete delete Claim 8 was abandoned when the registration fee was paid. The method of claim 5, wherein
The acquiring of the operation information on the extracted unit device may include: measuring operation information of each extracted unit device as the unit devices having different types and sizes are extracted;
Correcting the measured operation information based on the extracted fan out value of each unit element;
Storing the corrected operation information for each unit element in the chip database;
Semiconductor integrated circuit design method comprising a. Claim 9 has been abandoned due to the setting registration fee. The method of claim 8,
The operation information includes a delay value or a current consumption amount,
The measuring of the operation information may include measuring a delay value or a current consumption of a rising pulse and / or a falling pulse for each extracted unit device. A computer-readable recording medium for a semiconductor integrated circuit design system comprising a memory in which a semiconductor integrated circuit design tool is stored and a chip database in which device information for each unit element included in the designed semiconductor integrated circuit is stored.
Storing device information of each unit element included in the designed semiconductor integrated circuit in the chip database as the semiconductor integrated circuit is designed by the semiconductor integrated circuit design tool;
A function of collecting the device information including the type, size, and fanout value of the unit device used in the designed semiconductor integrated circuit;
A function of extracting unit devices having different types and sizes by referring to the collected device information; And
Obtaining operation information on the extracted unit device;
A computer readable recording medium that carries the data. delete delete Claim 13 was abandoned upon payment of a registration fee. 11. The method of claim 10,
The function of acquiring operation information on the extracted unit device may include a function of measuring operation information on each extracted unit device as the unit device having different types and sizes is extracted;
Correcting the measured operation information based on the extracted fan out value of each unit element;
Storing the corrected operation information for each unit element in the chip database;
Computer-readable recording medium comprising a. Claim 14 has been abandoned due to the setting registration fee. The method of claim 13,
The operation information includes a delay value or a current consumption amount,
And the function of measuring the operation information is a function of measuring a delay value or current consumption for a rising pulse and / or a falling pulse for each of the extracted unit elements.

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