KR101134840B1 - Light Emitting Device and Method of Manufacturing Thereof - Google Patents

Abstract

The light emitting device according to the embodiment includes a nanorod assembly including a plurality of nanorods; A first conductive semiconductor layer on the plurality of nanorod assemblies spaced apart; An active layer on the first conductive semiconductor layer; And a second conductive semiconductor layer on the active layer.

Light emitting element

Description

Light Emitting Device and Method of Manufacturing Thereof

The present invention relates to a light emitting device and a method of manufacturing the same.

Light emitting diodes (LEDs) are semiconductor light emitting devices that convert current into light.

The wavelength of light emitted by the light emitting diode depends on the semiconductor material used to manufacture the light emitting diode. This is because the wavelength of the emitted light is determined in accordance with the band-gap of the semiconductor material, which represents the energy difference between valence band electrons and conduction band electrons.

Recently, the light emitting diode is gradually increasing in brightness, and is being used as a light source for a display, an automotive light source, and an illumination light source. A light emitting diode that emits white light having high efficiency by using a fluorescent material or by combining various color light emitting diodes. It is also possible to implement.

On the other hand, the brightness of the light emitting diode depends on various conditions such as the structure of the active layer, the light extraction structure that can effectively extract light to the outside, the size of the chip, the type of the molding member surrounding the light emitting diode.

The embodiment provides a light emitting device having improved light extraction efficiency and a method of manufacturing the same.

The embodiment provides a method of manufacturing a light emitting device that can easily manufacture a plurality of nanorods.

The embodiment provides a method of manufacturing a light emitting device capable of easily growing a plurality of nanorods and nitride semiconductors on a substrate.

The light emitting device according to the embodiment includes a nanorod assembly including a plurality of nanorods; A first conductive semiconductor layer on the plurality of nanorod assemblies spaced apart; An active layer on the first conductive semiconductor layer; And a second conductive semiconductor layer on the active layer.

In another embodiment, a light emitting device manufacturing method includes: forming a mask layer having a plurality of spaced apart patterns on a substrate; Growing a nanorod aggregate including a plurality of nanorods and seed layers in the plurality of spaced patterns; Removing the mask layer; And forming a light emitting structure on the substrate and the nanorod aggregate.

The embodiment can provide a light emitting device capable of improving light extraction efficiency and a method of manufacturing the same.

The embodiment can provide a method of manufacturing a light emitting device that can easily manufacture a plurality of nanorods.

The embodiment can provide a method of manufacturing a light emitting device capable of easily growing a plurality of nanorods and nitride semiconductors on a substrate.

In the description of embodiments according to the present invention, each layer (film), region, pattern or structure is "on" or "under" a substrate, each layer (film), region, pad or pattern. In the case of being described as being formed "in", "on" and "under" include both "directly" or "indirectly" formed. In addition, the criteria for the top or bottom of each layer will be described with reference to the drawings.

In the drawings, the thickness or size of each layer is exaggerated, omitted, or schematically illustrated for convenience and clarity of description. In addition, the size of each component does not necessarily reflect the actual size.

Hereinafter, a light emitting device and a method of manufacturing the same according to embodiments will be described with reference to the accompanying drawings.

<First Embodiment>

1 is a view showing a light emitting device 100 according to the first embodiment.

Referring to FIG. 1, the light emitting device 100 includes a substrate 110, a plurality of nanorod aggregates 115, a nonconductive semiconductor layer 120, a first conductive semiconductor layer 130, and an active layer 140. ), A second conductive semiconductor layer 150, a first electrode 170, and a second electrode 180.

The substrate 110 may be selected from the group consisting of sapphire substrate (Al ₂ O ₃ ), GaN, SiC, ZnO, Si, GaP, InP, GaAs, metallic substrate, and the like.

The plurality of nanorod aggregates 115 may be formed on the substrate 110 to be spaced apart from each other.

The nanorod aggregate 115 includes a plurality of nanorods, and the plurality of nanorods are grown in a direction perpendicular to the substrate 110.

The nanorod aggregate 115 may include a semiconductor oxide such as ZnO, In ₂ O ₃ , a nitride such as GaN, a carbide such as SiC, a group III-V or group II-VI such as GaAs, GaP, InP, GaInP, and AlGaAs. It may be formed of a semiconductor or silicon (Si) and the like, but is not limited thereto.

The temperature at which the nanorod aggregate 115 is grown may be 60 ° C. to 200 ° C. Since the temperature range is a temperature range in which the photoresist formed in the process of growing the nanorod aggregate 115 is not damaged, the nanorod aggregate 115 may be stably grown. This will be described later in detail in the manufacturing method of the light emitting device 100.

The length of the nanorod aggregate 115 may be 1μm to 100μm, the diameter of each nanorod included in the nanorod aggregate 115 may be 1nm to 1000nm.

The nanorod aggregate 115 emits light emitted from the light emitting device 100 to the outside of the light emitting device 100 by refracting, diffraction, scattering, or reflecting light, thereby improving light extraction efficiency of the light emitting device 100. Can be improved.

The non-conductive semiconductor layer 120 and / or the light emitting structure 145 may be formed on side surfaces and / or top surfaces of the substrate 110 and the nanorod aggregate 115.

That is, the thickness of the nonconductive semiconductor layer 120 may be formed to be thicker than the length of the nanorod assembly 115 or may be formed to be thinner than the length of the nanorod assembly 115, but is not limited thereto.

The light emitting structure 145 is a minimal structure that emits light and includes a first conductive semiconductor layer 130, an active layer 140, and a second conductive semiconductor layer 150.

The non-conductive semiconductor layer 120 may be formed on the substrate 110 and the nanorod aggregate 115. The nonconductive semiconductor layer 120 is a semiconductor layer having a significantly lower electrical conductivity than the first and second conductive semiconductor layers 130 and 150, and may be, for example, an undoped semiconductor layer that is not doped with impurities.

A buffer layer (not shown) may be inserted between the substrate 110 and the nonconductive semiconductor layer 120. The buffer layer (not shown) is a layer for reducing the difference in lattice constant between the substrate 110 and the nonconductive semiconductor layer 120, and formed of any one of AlInN, InN, GaN, AlN, AlGaN, InGaN, AlInGaN, and the like. Can be.

Meanwhile, at least one layer of the buffer layer and the nonconductive semiconductor layer 120 may be formed, or both layers may not exist.

The first conductive semiconductor layer 130 is formed on the nonconductive semiconductor layer 120. The first conductive semiconductor layer 130 is, for example, may comprise n-type semiconductor layer, the n-type semiconductor layer is _{In x Al y Ga 1 -x- y} N (0≤x≤1, 0 ≤ a semiconductor material having a composition formula of y≤1, 0≤x + y≤1), for example, InAlGaN, GaN, AlGaN, InGaN, AlInN, AlN, InN, etc., and may be selected from n-types such as Si, Ge, Sn, etc. The dopant is doped.

The active layer 140 is formed on the first conductive semiconductor layer 130, and the active layer 140 has a single quantum well structure, a multi quantum well structure (MQW), and a quantum-wire structure. Or may be formed of at least one of a quantum dot structure.

A clad layer (not shown) doped with an n-type or p-type dopant may be formed on and / or under the active layer 140, and the clad layer (not shown) may be implemented as an AlGaN layer or an InAlGaN layer. have.

The second conductive semiconductor layer 150 is formed on the active layer 140. The second conductive semiconductor layer 150 is, for example, p-type may be implemented as a semiconductor layer, and the p-type semiconductor layer is _{In x Al y Ga 1 -x- y} N (0≤x≤1, 0 ≤ semiconductor material having a composition formula of y≤1, 0≤x + y≤1), for example, InAlGaN, GaN, AlGaN, InGaN, AlInN, AlN, InN and the like, and a p-type dopant such as Mg is doped .

Meanwhile, p-type and n-type dopants may be doped into the first conductive semiconductor layer 130 and the second conductive semiconductor layer 150, respectively, but are not limited thereto. Although not shown, a third conductive semiconductor layer (not shown) may be formed on the second conductive semiconductor layer 150. Therefore, the semiconductor light emitting device 100 may be formed of any one of pn, np, pnp, and npn junction structures.

The transparent electrode layer 160 may be formed on the second conductive semiconductor layer 150. The transparent electrode layer 160 may include ITO, IZO (In-ZnO), GZO (Ga-ZnO), AZO (Al-ZnO), AGZO (Al-Ga ZnO), IGZO (In-Ga ZnO), IrOx, RuOx, At least one of RuOx / ITO, Ni / IrOx / Au, and Ni / IrOx / Au / ITO, including but not limited to these materials.

The second electrode 180 may be formed on the transparent electrode layer 160, and the first electrode 170 may be formed on the first conductive semiconductor layer 130. The first and second electrodes 170 and 180 provide power to the light emitting device 100.

Hereinafter, a method of manufacturing the light emitting device 100 will be described in detail with reference to FIGS. 1 to 8.

Referring to FIG. 2, a mask layer 117 having a plurality of spaced apart patterns 118 may be formed on the substrate 110.

The substrate 110 may be selected from the group consisting of sapphire substrate (Al ₂ O ₃ ), GaN, SiC, ZnO, Si, GaP, InP, GaAs, metallic substrate, and the like.

The mask layer 117 may be formed of, for example, a photoresist (PR), and the plurality of spaced patterns 118 may be formed by a photolithography process.

On the other hand, the plurality of spaced pattern 118 is a mask layer (Lithography process, such as electron beam lithography (E-beam Lithography), laser hologram, Deep UV Stepper (Lithography) process, etc. 117 may be formed on, but not limited to.

Referring to FIG. 7, the plurality of spaced patterns 118 of the mask layer 117 may be formed to have various patterns, and as illustrated, a plurality of circular patterns may be formed to be spaced apart from each other. The plurality of spaced apart patterns 118 may be formed in various ways, for example, may be formed to have a pattern such as a polygon, an oval.

3 and 8, nanorod aggregates 115 may be grown and formed in the plurality of spaced patterns 118 on the substrate 110.

That is, the plurality of nanorod aggregates 115 may be formed on the substrate 110 to be spaced apart from each other by the plurality of spaced patterns 118.

The nanorod aggregate 115 includes a plurality of nanorods 112, and the nanorods 112 are grown in a direction perpendicular to the substrate 110.

Meanwhile, when the nanorod aggregate 115 is grown, a seed layer 113 is first formed, and then a plurality of nanorods 112 are formed on the seed layer 113. That is, the plurality of nanorods 112 may be connected to each other by the seed layer 113 at the bottom thereof, and the region where the seed layer 113 is formed in the substrate 110 may be formed by the seed layer 113. May not be exposed.

As such, when a region in which the substrate 110 is not exposed is formed by the seed layer 113, when the light emitting structure is grown on the substrate 110, the light emission is formed in the region where the seed layer 113 is formed. The growth of the structure may not be performed smoothly, such as dents, which may lower the reliability of the light emitting device 100.

Referring to FIG. 4, in order to prevent such a phenomenon, the nanorod aggregate 115 may be etched to expose the substrate 110.

The etching may be a dry etching including Reactive Ion Etching (RIE), but is not limited thereto.

The substrate 110 may be exposed in the nanorod assembly 115 by the etching, and the light emitting structure may be smoothly grown on the substrate 110.

On the other hand, since the etching may be performed for the entire region of the nanorod assembly 115, the upper portion of the plurality of nanorods 112 as well as the seed layer 113 may be partially removed by the etching. have.

Accordingly, when the etching is performed on the nanorod aggregate 115, the nanorod aggregate 115 may be initially grown slightly longer in consideration of this. That is, when the desired length of the nanorod aggregate 115 is a first length, the length of the nanorod aggregate 115 may be initially grown to a second length longer than the first length in consideration of the etching.

The nanorod aggregate 115 may be formed on the substrate 110 by chemical vapor deposition (CVD), plasma-enhanced chemical vapor deposition (PECVD), sputtering, thermal or electron beam evaporation. (Thermal or Electron Beam Evaporation), Pulse Laser Deposition (Vapor-Phase Transport Process), etc. may be grown using a method, preferably organic metal chemical vapor deposition (MOCVD: Metal Organic) Chemical Vapor Deposition) may be grown and formed.

The nanorod aggregate 115 may include a semiconductor oxide such as ZnO, In ₂ O ₃ , a nitride such as GaN, a carbide such as SiC, a group III-V or group II-VI such as GaAs, GaP, InP, GaInP, and AlGaAs. It may be formed of a semiconductor or silicon (Si) and the like, but is not limited thereto.

The temperature at which the nanorod aggregate 115 is grown may be 60 ° C. to 200 ° C. Since the temperature range is a temperature range in which the photoresist is not damaged, the nanorod aggregate 115 may be stably grown.

The length of the nanorod aggregate 115 may be 1μm to 100μm, the diameter of each nanorod included in the nanorod aggregate 115 may be 1nm to 1000nm.

The nanorod aggregate 115 emits light emitted from the light emitting device 100 to the outside of the light emitting device 100 by refracting, diffraction, scattering, or reflecting light, thereby improving light extraction efficiency of the light emitting device 100. Can be improved.

4 and 5, the mask layer 117 is removed from the substrate 110. The mask layer 117 may be removed by ashing, etching, or the like, but is not limited thereto.

Since the mask layer 117 is removed, the substrate 110 is exposed to allow the light emitting structure 145 to grow smoothly on the substrate.

That is, the nanorod aggregate 115 may be formed on the substrate 110 while forming the mask layer 117 and sufficiently securing a region for smoothly growing the light emitting structure 145.

Referring to FIG. 6, a nonconductive semiconductor layer 120 and a light emitting structure 145 may be formed on the substrate 110 and the nanorod aggregate 115. The light emitting structure 145 is a minimal structure that emits light and includes a first conductive semiconductor layer 130, an active layer 140, and a second conductive semiconductor layer 150.

The non-conductive semiconductor layer 120 and the light emitting structure 145 may be formed of a metal organic chemical vapor deposition (MOCVD), a chemical vapor deposition (CVD), or a plasma chemical vapor deposition (PECVD). Vapor Deposition), Molecular Beam Epitaxy (MBE), Hydride Vapor Phase Epitaxy (HVPE), and the like.

The non-conductive semiconductor layer 120 may be formed on the substrate 110 and the nanorod aggregate 115. The nonconductive semiconductor layer 120 is a semiconductor layer having a significantly lower electrical conductivity than the first and second conductive semiconductor layers 130 and 150, and may be, for example, an undoped semiconductor layer that is not doped with impurities.

A buffer layer (not shown) may be inserted between the substrate 110 and the nonconductive semiconductor layer 120. The buffer layer (not shown) is a layer for reducing the difference in lattice constant between the substrate 110 and the nonconductive semiconductor layer 120, and formed of any one of AlInN, InN, GaN, AlN, AlGaN, InGaN, AlInGaN, and the like. Can be.

Meanwhile, at least one layer of the buffer layer and the nonconductive semiconductor layer 120 may be formed, or both layers may not exist.

The first conductive semiconductor layer 130 is formed on the nonconductive semiconductor layer 120. The first conductive semiconductor layer 130 is, for example, may comprise n-type semiconductor layer, the n-type semiconductor layer is _{In x Al y Ga 1 -x- y} N (0≤x≤1, 0 ≤ a semiconductor material having a composition formula of y≤1, 0≤x + y≤1), for example, InAlGaN, GaN, AlGaN, InGaN, AlInN, AlN, InN, etc., and may be selected from n-types such as Si, Ge, Sn, etc. The dopant is doped.

The active layer 140 is formed on the first conductive semiconductor layer 130, and the active layer 140 has a single quantum well structure, a multi quantum well structure (MQW), and a quantum-wire structure. Or may be formed of at least one of a quantum dot structure.

A clad layer (not shown) doped with an n-type or p-type dopant may be formed on and / or under the active layer 140, and the clad layer (not shown) may be implemented as an AlGaN layer or an InAlGaN layer. have.

The second conductive semiconductor layer 150 is formed on the active layer 140. The second conductive semiconductor layer 150 may be implemented, for example, as a p-type semiconductor layer, wherein the p-type semiconductor layer is In _x Al _y Ga _{1 -x- y} N (0 ≦ x ≦ 1, 0 ≦ semiconductor material having a composition formula of y≤1, 0≤x + y≤1), for example, InAlGaN, GaN, AlGaN, InGaN, AlInN, AlN, InN, and the like, and a p-type dopant such as Mg is doped .

Meanwhile, p-type and n-type dopants may be doped into the first conductive semiconductor layer 130 and the second conductive semiconductor layer 150, respectively, but are not limited thereto. Although not shown, a third conductive semiconductor layer (not shown) may be formed on the second conductive semiconductor layer 150. Therefore, the semiconductor light emitting device 100 may be formed of any one of pn, np, pnp, and npn junction structures.

6 and 1, a transparent electrode layer 160 may be formed on the second conductive semiconductor layer 150. The transparent electrode layer 160 may include ITO, IZO (In-ZnO), GZO (Ga-ZnO), AZO (Al-ZnO), AGZO (Al-Ga ZnO), IGZO (In-Ga ZnO), IrOx, RuOx, At least one of RuOx / ITO, Ni / IrOx / Au, and Ni / IrOx / Au / ITO, including but not limited to these materials.

The second electrode 180 may be formed on the transparent electrode layer 160, and the first electrode 170 may be formed on the first conductive semiconductor layer 130. In this case, mesa etching may be performed on the light emitting structure 145 to expose the first conductive semiconductor layer 130, and the first electrode 170 may be formed thereon. The first and second electrodes 170 and 180 provide power to the light emitting device 100.

Second Embodiment

Hereinafter, the light emitting device 100B and the manufacturing method thereof according to the second embodiment will be described in detail. In the description of the second embodiment, the same parts as those of the first embodiment are referred to the first embodiment, and redundant description thereof will be omitted.

9, the light emitting device 100B according to the second embodiment includes a substrate 110, a plurality of nanorods 112b, a plurality of nanorods 112b, and a plurality of nanorods 112b on the substrate 110. ) Includes a nonconductive semiconductor layer 120, and a light emitting structure 145 on the nonconductive semiconductor layer 120.

The light emitting structure 145 may include a first conductive semiconductor layer 130, an active layer 140, and a second conductive semiconductor layer 150.

The first electrode 170 may be formed on the first conductive semiconductor layer 130.

The transparent electrode layer 160 may be formed on the second conductive semiconductor layer 150, and the second electrode 180 may be formed on the transparent electrode layer 160.

Hereinafter, the plurality of nanorods 112b will be described in detail with reference to FIGS. 10 and 11.

Referring to FIG. 10, the plurality of nanorods 112b are formed on the substrate 110.

The plurality of nanorods 112b may be grown in a vertical direction with respect to the substrate 110, and may be randomly formed on the substrate 110.

Meanwhile, when the plurality of nanorods 112b are grown, the seed layer 113b is first formed, and then the plurality of nanorods 112b are formed. That is, the plurality of nanorods 112b may be connected to the lower ends of the seed layers 113b by one another, and the substrate 110 may not be exposed by the seed layer 113b.

As such, when the substrate 110 is not exposed by the seed layer 113b, the light emitting structure, which is a nitride semiconductor layer, may not be grown smoothly on the substrate 110.

Therefore, referring to FIG. 11, the plurality of nanorods 112b may be etched to remove the seed layer 113b to expose the substrate 110.

The etching may be a dry etching including Reactive Ion Etching (RIE), but is not limited thereto.

The seed layer 113b may be removed by the etching, and thus the substrate 110 is exposed between the plurality of nanorods 112b, thereby smoothly growing the light emitting structure on the substrate 110. You can do it.

Meanwhile, since the etching may be performed on the plurality of nanorods 112b as a whole, an upper portion of the plurality of nanorods 112b as well as the seed layer 113 may be partially removed by the etching. .

Therefore, when the etching is performed on the plurality of nanorods 112b, the plurality of nanorods 112b may be initially grown slightly longer in consideration of this. That is, when the desired length of the plurality of nanorods 112b is the first length, the length of the plurality of nanorods 112b may be initially grown to a second length longer than the first length in consideration of the etching. have.

The plurality of nanorods 112b may be formed on the substrate 110 by chemical vapor deposition (CVD), plasma-enhanced chemical vapor deposition (PECVD), sputtering, thermal or electron beam evaporation. Thermal or Electron Beam Evaporation, Pulse Laser Deposition, Vapor-Phase Transport Process, etc. may be grown, preferably organometallic chemical vapor deposition (MOCVD: Metal) Organic Chemical Vapor Deposition) may be grown and formed.

The plurality of nanorods 112b may include a semiconductor oxide such as ZnO, In 2 O 3, a nitride such as GaN, a carbide such as SiC, a group III-V or group II-VI compound semiconductor such as GaAs, GaP, InP, GaInP, AlGaAs, or Silicon (Si) and the like, but is not limited thereto.

The temperature at which the plurality of nanorods 112b is grown may be 60 ° C to 200 ° C. Since the temperature range is a temperature range in which the photoresist is not damaged, the plurality of nanorods 112b may be stably grown.

The length of the plurality of nanorods 112b may be 1 μm to 100 μm, and the diameter of each nanorod included in the plurality of nanorods 112b may be 1 nm to 1000 nm.

Since the plurality of nanorods 112b refracts, diffracts, scatters, or reflects light emitted from the light emitting device 100B, light extraction efficiency of the light emitting device 100B may be improved.

Third Embodiment

Hereinafter, the light emitting devices 200 and 200B according to the third embodiment will be described in detail. In the description of the third embodiment, the same parts as those of the first embodiment are referred to the first embodiment, and redundant description thereof will be omitted.

Referring to FIG. 12, the light emitting device 200 according to the third embodiment may be defined as a vertical light emitting device, and includes a plurality of nanorod aggregates 215 and side and top surfaces of the plurality of nanorod aggregates 215. A non-conductive semiconductor layer 220, a light emitting structure 245 on the nonconductive semiconductor layer 220, a reflective layer 260 on the light emitting structure 245, and a conductive support member 270 on the reflective layer 260. ).

In addition, the first conductive semiconductor layer 230 of the light emitting structure 245 is etched to expose the non-conductive semiconductor layer 220 only at the position where the first electrode 280 is to be formed. The first electrode 280 may be formed in the semiconductor layer 230.

Alternatively, when the thickness of the nonconductive semiconductor layer 220 is thinner than the length of the nanorod aggregate 215, the nonconductive semiconductor layer 220 is removed and the first electrode 280 is connected to the first conductive semiconductor. Or may be formed in layer 230. In this case, the nanorod aggregate 215 protruding out of the first conductive semiconductor layer 230 may be removed by etching.

The light emitting structure 245 may include a first conductive semiconductor layer 230, an active layer 240 on the first conductive semiconductor layer 230, and a second conductive semiconductor layer 250 on the active layer 240. Can be.

The reflective layer 260 may be formed of at least one of silver (Ag) having a high reflectance, an alloy containing silver (Ag), aluminum (Al), or an alloy containing aluminum (Al).

The conductive support member 270 may include titanium (Ti), chromium (Cr), nickel (Ni), aluminum (Al), platinum (Pt), gold (Au), tungsten (W), copper (Cu), and molybdenum ( Mo) or at least one of the semiconductor substrates into which impurities are implanted, and together with the first electrode 280, power is supplied to the light emitting device 200.

The plurality of nanorod aggregates 215 emits the light emitted from the light emitting device 200 to the outside of the light emitting device 200 by refracting, diffraction, scattering, or reflecting light, thereby extracting light from the light emitting device 200. The efficiency can be improved.

<Fourth Embodiment>

The fourth embodiment is similar to the third embodiment except that the plurality of nanorod assemblies 215 are removed. The fourth embodiment will be described below.

Referring to FIG. 13, at least a portion of the plurality of nanorod aggregates 215 may be removed by etching or the like to form an uneven pattern 218. Thus, the light emitting device 200B according to the fourth embodiment may be provided. Can be.

When only a part of the plurality of nanorod aggregates 215 is removed, a part of the plurality of nanorod aggregates 215 may remain in the uneven pattern 218, but the present invention is not limited thereto.

Since the uneven pattern 218 may emit light incident at various angles, the light extraction efficiency of the light emitting device 200B may be improved. I

Features, structures, effects, and the like described in the above embodiments are included in at least one embodiment of the present invention, and are not necessarily limited to only one embodiment. Furthermore, the features, structures, effects, and the like illustrated in each embodiment may be combined or modified with respect to other embodiments by those skilled in the art to which the embodiments belong. Therefore, it should be understood that the present invention is not limited to these combinations and modifications.

In addition, the above description has been made with reference to the embodiment, which is merely an example, and is not intended to limit the present invention. Those skilled in the art to which the present invention pertains will be illustrated as above without departing from the essential characteristics of the present embodiment. It will be appreciated that various modifications and applications are possible. For example, each component specifically shown in the embodiment can be modified. And differences relating to such modifications and applications will have to be construed as being included in the scope of the invention defined in the appended claims.

1 to 13 illustrate a light emitting device and a method of manufacturing the same according to embodiments.

Claims (17)

A nanorod aggregate comprising a plurality of nanorods; A light emitting structure disposed on the nanorod aggregate; Including, The light emitting structure, the first conductive semiconductor layer; An active layer on the first conductive semiconductor layer; And a second conductive semiconductor layer on the active layer. The method of claim 1, The non-conductive semiconductor layer is formed on the side of the nanorod aggregate. The method of claim 1, The non-conductive semiconductor layer is formed on the side and the upper surface of the nanorod assembly, the first conductive semiconductor layer is formed on the non-conductive semiconductor layer. The method of claim 1, The nanorod aggregate is formed of at least one of ZnO, In ₂ O ₃ , GaN, SiC, GaAs, GaP, InP, GaInP, AlGaAs, Si. The method of claim 1, The nanorod aggregate has a length of 1μm to 100μm, each nanorod contained in the nanorod aggregate is a light emitting device of 1nm to 1000nm. The method of claim 1, A light emitting device further comprising a substrate under the nanorod aggregate. The method of claim 6, The substrate is any one of a sapphire substrate (Al ₂ O ₃ ), GaN, SiC, ZnO, Si, GaP, InP, GaAs, metallic substrate. The method of claim 1, A light emitting device comprising a conductive support member on the second conductive semiconductor layer. Forming a mask layer having a pattern exposing the substrate on the substrate; Growing a nanorod assembly including a nanorod and a seed layer on the substrate exposed through the pattern; Removing the mask layer; And Forming a light emitting structure on the nanorod aggregate; A light emitting device manufacturing method in which all of the nanorod aggregate is disposed below the light emitting structure. The method of claim 9, Before forming the light emitting structure, Forming a non-conductive semiconductor layer on the substrate. The method of claim 9, After growing the nanorod aggregates, And etching the nanorod assembly to remove the seed layer. The method of claim 11, The etching is a light emitting device manufacturing method performed by a dry etching method comprising a reactive ion etching. The method of claim 11, In the case of performing the said etching, The first length of the nanorod aggregate is a light emitting device manufacturing method formed of a second length longer than the first length to be obtained. The method of claim 9, The nanorod assembly is a light emitting device manufacturing method is formed at 60 ℃ to 200 ℃. The method of claim 9, The nanorod aggregate is a light emitting device manufacturing method grown using any one of chemical vapor deposition, plasma chemical vapor deposition, sputtering, heat or electron beam evaporation, pulsed laser deposition, vapor phase transfer, organometallic chemical vapor deposition method. The method of claim 9, Forming a conductive support member on the light emitting structure; And The method of manufacturing a light emitting device comprising the step of removing the substrate. The method of claim 16, After removing the substrate, And etching at least the nanorod aggregate to remove at least a portion of the nanorod aggregate.

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