KR101132950B1 - Universal receiver and pattern recognition method thereof - Google Patents

Abstract

PURPOSE: A universal receiver and a pattern recognition method thereof are provided to compare edge information with received information by previously storing reference pattern information. CONSTITUTION: An edge detection unit(250) detects edge of a received pulse signal. An edge extraction unit(300) extracts information about the detected edge. A DMA(Direct Memory Access) control unit(350) directly stores extracted edge information to a memory(400). A computation unit(500) analyzes edge information pattern.

Description

Universal receiver and its pattern recognition method {UNIVERSAL RECEIVER AND PATTERN RECOGNITION METHOD THEREOF}

The present invention relates to a general-purpose receiving apparatus and a pattern recognition method thereof, and particularly, extracts edge information including time information related to a detected edge, whether it is rising or falling, and calculates a time interval between extracted edge information to analyze a pattern. A general purpose receiving apparatus and a pattern recognition method thereof.

Portable controllers for remotely controlling various electronic devices such as TVs, VTRs, DVD players / recorders, audio systems, air conditioners, lighting devices, etc. are commonly referred to as remote controllers.

Recently, an integrated remote controller has been developed and widely used to manage various electronic devices by using a single remote controller. In the case of an integrated remote controller, a signal is used to identify an electronic device and a user to which a signal is transmitted and received. The technique of extracting a pattern from is adopted and used.

Remote controllers often use infrared (IR) signals to communicate with remotely located master devices (ie, devices such as TVs, VTRs, DVD players, and audio systems). This is because the user's view may be uncomfortable. Therefore, the remote controller generally includes an infrared sensor (IR sensor) for receiving an infrared pulse signal transmitted from the master device.

An infrared sensor used in a remote controller or the like may interfere with noise caused by infrared components of sunlight, noise caused by infrared components such as fluorescent lights, or infrared components generated by other electronic devices. It may also be affected by the noise of the infrared sensor itself. FIG. 1 is a block diagram illustrating a conventional receiver for receiving a conventional pulse signal. When the receiver IR sensor (not shown) receives a pulse signal, the edge detector 110 detects an edge, and the main processor 120 analyzes a pattern or type based on the detected edge. If necessary, the memory 130 may be used to store the detected edge information.

When using this method, the main processor 120 should always operate when a pulse signal comes. Since the remote controller is generally driven by a battery, when the main processor 120 continuously operates to consume power, the remote controller may be inconvenient to shorten the usable time and to frequently charge or replace the battery.

To this end, efforts have been made to reduce the burden on the main processor 120 by implementing a module for detecting patterns by interpreting signals, but in this case, dedicated hardware must be implemented for each promised pattern. There was a problem that requires too large resources.

This problem is further exacerbated when a general-purpose receiver is used mounted on shutter glasses that provide a 3D image. Conventional remote controllers only need to restore communication between the master device intermittently, but in the case of shutter glasses that provide three-dimensional images, the master device (= display device) is continuously connected to synchronize the left and right eye images. This is because communication and synchronization must be performed. Specifically, when an error in pattern recognition occurs due to noise in the shutter glasses, the number of times the main processor of the shutter glasses controller is operated for pattern detection increases frequently, thereby increasing the power consumption of the battery, and charging once (or replacing the battery). After that, the usable time is shortened, causing inconvenience to the user.

Shutter glasses that provide a three-dimensional image uses a principle of providing a three-dimensional effect of an object using a binocular parallax, which is a factor that allows a three-dimensional image to be recognized at a short range. Therefore, the display device alternately provides a left eye image frame and a right eye image frame, and the shutter glasses alternately open or close the left eye shutter and the right eye shutter in response to this to provide a wearer with a 3D effect by the left eye image and the right eye image.

In this case, the synchronization pattern for providing the left eye image frame and the right eye image frame is different for each manufacturer of the display device and for each product, so that the shutter glasses must have a solution that can cope with various patterns. In this case, each display device transmits an ID that can be identified for each manufacturer or product in an infrared signal, and the shutter glasses need to identify a display device by detecting a pattern from the infrared signal by a post-processing process of the IR sensor.

Therefore, when the infrared signal is contaminated by noise, the pattern identification process of the main processor is frequently performed, and thus, the power of the battery is quickly consumed, and there is an inconvenience of frequently recharging or replacing the battery.

The present invention is derived to solve the above problems of the prior art, an object of the present invention is to reduce the power consumption of the universal receiver (Universal Receiver) used in a remote controller or three-dimensional image shutter glasses. In this case, the general purpose receiver may be accompanied by an infrared sensor, but the object of the present invention is not limited to the infrared receiver, but may be applied to a general purpose receiver such as an RF receiver.

In addition, an object of the present invention is to provide a general-purpose receiver that can perform a pattern detection process with a relatively simple hardware configuration to reduce the load of the main processor or controller. An object of the present invention is to reduce the load of the main processor or controller and to reduce power consumption by performing a pattern detection process hierarchically.

It is also an object of the present invention to provide a hardware configuration that can cope with pattern analysis of general purpose signals. The present invention implements an efficient pattern recognition means to enable communication with various master devices, and to extract various patterns.

Reduction of power consumption of the remote controller or the three-dimensional shutter glasses using the general-purpose receiver of the present invention can extend the battery replacement or recharging time interval, thereby eliminating user inconvenience.

In order to achieve the above object, a general-purpose receiving apparatus according to an embodiment of the present invention is an edge extractor for extracting edge information on a detected edge, sequentially extracting addresses, and using the extracted edge information as addresses. A direct memory access controller that directly stores the memory in the memory without passing through the main processor, and an operation unit that extracts time information and analyzes patterns by reading edge information sequentially stored in the memory when a predetermined operation condition occurs.

The apparatus further includes a pattern recognizing unit configured to quickly recognize the reference pattern when comparing the previously stored reference pattern with sequentially stored edge information.

In addition, in order to achieve the above object, the pattern recognition method according to an embodiment of the present invention is to detect the edge of each of the received pulse signal, the rising or falling from the detected edge, extract the time interval information edge Extracting information, sequentially storing the extracted edge information directly in a memory without passing through the main processor, and extracting time interval information by reading N edge information when the number of edge information stored in the memory reaches a reference value N And analyzing the pattern.

In addition to reading the N edge information, a pattern recognition unit which compares the extracted edge information with pre-stored reference patterns and quickly recognizes the reference pattern when the patterns match, can be used in real time with low power consumption. Quickly recognize patterns.

The general-purpose receiving apparatus and method of the present invention can organize and store information corresponding to the edge of a pulse signal received from a master device such as a TV or a DVD player into a predetermined data field.

According to the present invention, information corresponding to a reference pattern may be stored in advance and compared with edge information sequentially received, thereby rapidly responding to various patterns. In addition, this process can reduce the operation of the main processor or controller, which can significantly reduce the power consumption.

In addition, according to the present invention, by storing the edge information of the pulse received from the master device (TV, DVD player, etc.) into a data field, it is possible to recognize the pattern quickly while using a minimum of hardware resources, and to easily perform various patterns. Can respond.

According to the present invention, by processing the edge information of the pulse hierarchically, it is possible to reduce the load of the main processor or controller, and reduce the overall power consumption.

In addition, the general-purpose receiving apparatus of the present invention simplifies the data structure by cyclically generating the address of the memory area storing the edge information of the pulse, and easily arranges the patterns in chronological order.

1 is a block diagram showing a conventional general-purpose receiving apparatus.
2 is a block diagram illustrating a general-purpose receiving apparatus according to an embodiment of the present invention.
FIG. 3 is a block diagram illustrating an example embodiment of an edge detector of the general-purpose receiver of FIG. 2.
4 is a block diagram illustrating an example embodiment of an edge extracting unit of the general-purpose receiving apparatus of FIG. 2.
FIG. 5 is a diagram illustrating an example of a data field of edge information generated by the edge extractor of FIG. 4.
6 is a diagram illustrating an example of a received pulse signal and extracted edge information. FIG. 7 is a diagram illustrating a direct memory access controller of the general purpose receiver of FIG. 2.
FIG. 8 is a diagram illustrating an example of an address structure of a memory of the general purpose receiving apparatus of FIG. 2.
9 is a block diagram illustrating in detail a calculator of the general-purpose receiver of FIG. 2.
FIG. 10 is a block diagram illustrating a pattern recognition unit of the general-purpose receiver of FIG. 2.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the present invention is not limited or limited by the embodiments. Like reference numerals in the drawings denote like elements.

2 is a block diagram illustrating a general-purpose receiving apparatus 200 according to an embodiment of the present invention. Referring to FIG. 2, the general purpose reception apparatus 200 may include an edge detector 250, an edge extractor 300, a direct memory access controller 350, a memory 400, a main processor 450, an operation unit 500, and the like. The pattern recognition unit 550 is included. The edge detector 250 detects an edge of the received pulse signal, and the edge extractor 300 extracts information of the edge received in hardware. The information on the edges is determined whether the received edge is rising or falling, the time of the received edge, the number of edges contained in the packet if it is considered to form one packet, and no edge is detected beyond the reference time after the edge is detected. It may include at least one of whether the state persists. The direct memory access controller 350 is a means for storing the extracted edge information in the memory 400 without passing through the main processor 450. The memory 400 sequentially stores the extracted edge information according to sequentially generated addresses.

When a predetermined calculation condition occurs, the calculation unit 500 reads edge information sequentially stored in the memory 400, extracts time information, and analyzes a pattern. The pattern recognition unit 550 sequentially stores the extracted edge information in a register, and compares the reference pattern previously stored in the programmable control register with the edge information sequentially stored in the register to determine whether the pattern matches. The edge information extracted by the edge extractor 250 may be sequentially stored in the pattern recognizer 550 separately from the memory 400. If the number of edge information stored in the memory 400 exceeds a certain number or the pattern recognition unit 550 does not find a matching pattern (or the predetermined time is elapsed without finding a matching pattern). In one case, you can read all edge information stored in memory and analyze the pattern.

The process of extracting the pattern of the edge information may be primarily performed by the pattern recognizer 550. The pattern recognition unit 550 sequentially compares the information of the received edges with a pre-stored reference pattern to determine whether the pattern matches.

When the pattern recognizing unit 550 does not find a matching specific pattern due to interference factors such as noise, the pattern recognizing unit 500 may recognize the pattern of the signal received by the operation unit 500. The calculation unit 550 may store the edge information stored in the memory 400 when the number of edge information stored in the memory 400 exceeds a predetermined criterion or when the pattern recognition unit 550 exceeds a predetermined reference time without recognizing a pattern. Can be read together to extract the pattern.

When the operation unit 550 and the pattern recognition unit 550 do not recognize the pattern, the main processor 450 may access the memory 400 to read edge information and recognize the pattern by software processing. By using the hierarchical pattern recognition process, the general purpose reception apparatus 200 may recognize various patterns in real time quickly while reducing the burden on the main processor 450 and reducing the overall power consumption.

FIG. 3 is a block diagram illustrating an example of the edge detector 250 of the general purpose reception apparatus 200 of FIG. 2. The edge detector 250 includes a high frequency noise remover 260, a signal filter 270, and an edge discriminator 280. In some cases, the edge detector 250 may demodulate a modulated signal. The pulse signal transmitted from the master device may be modulated by a carrier frequency and transmitted, or the baseband signal may be transmitted as it is. The high frequency noise removing unit 260 removes a portion of the received modulated signal or baseband signal that is not related to the signal, and the signal filter 270 filters only signals of a desired band. For modulated signals, only signals near the carrier frequency band pass, and for baseband signals, low frequency band signals pass through filter 270. The edge determination unit 280 detects or determines an edge in the signal from which the noise is removed. Information of the detected edge is transmitted to the edge extraction unit 300.

FIG. 4 is a block diagram illustrating an example embodiment of the edge extractor 300 of the general purpose receiver 200 of FIG. 2. The edge extractor 300 receives information on the detected edge from the edge detector 250, extracts information on the detected edge, and stores the information on the detected edge in the memory 400 through the direct memory access controller 350. The edge extractor 250 may sequentially provide the extracted edge information to the pattern recognizer 550 through a data path separate from the memory 400.

The edge extractor 300 includes a timer 310, a time information analyzer 320, and an edge information storage unit 330. The timer 310 may provide the time information interpreter 320 with information about the time at which the edge was detected. The time information interpreter 320 interprets the information about the time provided from the timer 310. For example, the time information interpreter 320 may calculate the time interval between the previous edge and the current edge, and whether the reference time has elapsed since the edge was detected or if no edge was detected for a certain time after the edge was received. It is also possible to judge the Such an event will be referred to herein as a null edge for convenience of description. In addition, a plurality of edges satisfying such a determination condition are regarded as one packet, including a decision condition that considers multiple edges as one packet, for example, when a distance between two neighboring edges is relatively narrow and constant. You may. In this case, a time interval that forms a criterion for considering a null edge or a criterion for considering a plurality of pulses (edges) as one packet may be externally programmed.

The pattern to be recognized by the general purpose reception apparatus 200 may include a predetermined number of edges and a null edge in which no other edge is detected for a predetermined time after the edge is detected. At this time, if there is no influence due to noise, the pattern can be easily detected even by the edge information (type of edge (rising, falling), number, null edges) extracted by the edge extraction unit 300.

The edge extractor 300 may extract one edge as one edge information, or may group several edges to extract one edge information. The edge extractor 300 may consider the plurality of detected edges to form one packet when the plurality of detected edges satisfy a predetermined condition. When a plurality of detected edges are regarded as one packet, the edge extractor 300 does not extract edge information for all edges, and simply extracts the number of edges existing in the packet as edge information (hereinafter referred to as the number of edges). can do.

 FIG. 5 is a diagram illustrating a data field structure of an embodiment of edge information extracted by the edge extractor 300 of FIG. 4. Edge information includes the receiving end classification, the type of edge, and the time at which the edge was received. The type of edge includes the number of rising edge, falling edge, null edge, and number of edges (in one packet). It may include. Receiving end segmentation represents each receiving end corresponding to a signal having a different carrier frequency. The infrared sensor and its post-processing configuration (edge detector 250 and edge extractor 300) may be implemented in one piece of hardware capable of simultaneously processing multiple carrier frequencies, but a plurality of pieces of hardware may each be assigned to one carrier frequency. It may be economical to implement to correspond.

When a plurality of receivers respectively correspond to one carrier frequency, each processing module detects edges and extracts edge information in parallel with respect to the plurality of carrier frequency signals. When edge information is processed independently for each receiver, the edge information stored in the memory 400 needs to include a receiver segment field.

If the detected edge is a rising edge, a falling edge, a null edge, or if a plurality of edges are regarded as one packet, the number of edges in the packet is generated as edge information, so that the minimum for extracting a pattern by edge information Fast pattern recognition is possible using hardware resources.

6 is a diagram illustrating an embodiment of a received pulse signal and extracted edge information. Signal 1 and signal 2 represent signals received by different receivers. The edge information extracted here refers to a part of the data structure of the edge information of FIG. 5. Compared with the edge information of FIG. 5, when there is an edge number (in the packet), a portion (hereinafter, referred to as edge number data) indicating the number of edges is added, and information of the time at which the edge is detected is omitted. In the signal 1 channel, the rising edge was first detected. The receiving node division area field of the edge information is assigned 0, which means signal 1, 00, which means rising edge, and the data field, which is assigned a timer value corresponding to the time when the first rising edge is detected (xxxxxx). ). The first rising edge is the earliest detected edge in time and therefore is assigned the fastest address in the direct memory access controller 350 (addr = 0).

Thereafter, when the first falling edge is detected, 0 is assigned to the receiving end division region field, 01 means a falling edge, and a data value is assigned a timer value corresponding to the time when the first falling edge is detected ( yyyyyyy). The first falling edge is assigned the next address of the first rising edge in the direct memory access controller 350 (addr = 1). Since the direct memory access controller 350 generates addresses sequentially irrespective of the receiving end, packets extracted from the signal 2 channel, which is the earliest detected edge in time, are subsequently assigned an address (addr = 2). In signal 2, a plurality of edges may be considered as packets. The edge extractor 300 may generate the number of edges in the packet as one edge information instead of extracting one edge information one by one. In this case, the receiving end of the edge information generated is 1 corresponding to signal 2, and the edge type field has 11 representing the number of edges in the packet, and the data field is allocated 0000003, which is the number of edges. When the direct memory access controller 350 generates address 6 (addr = 6), the edge extractor 300 extracts a null edge from the signal 1 channel. The receiving end division field may be assigned 0, which means signal 1, and the edge type field, 10, which means a null edge, and a data value may store a timer value or an overflowed value indicating that it is a null edge.

FIG. 7 is a diagram illustrating a direct memory access controller 350 of the general purpose reception apparatus 200 of FIG. 2. The direct memory access controller 350 is a means for accessing the memory 400 without the main processor 450 processing. The direct memory access controller 350 includes a direct memory access buffer 360 and a read / write controller 370. The read / write control unit 370 may read information contained in the memory 400 or record information in the memory 400. The direct memory access buffer 360 receives a request to read the information contained in the memory 400 or write the information to the memory 400, but immediately responds to the request because the read / write controller 370 is performing another task. If it cannot, it stores the contents of the request and transmits the stored request to the read / write control unit 370 when other operations of the read / write control unit 370 are finished.

8 is a diagram illustrating a recursive address structure of the memory 400. The memory 400 includes a start address 410 and a current address 420, and may be set to cyclically use a predetermined area (ring buffer type). The memory sequentially stores the edge information generated from the start address 410 and may be implemented such that only N pieces of predetermined edge information are stored in the form of a ring buffer. Where N is the size of the ring buffer. As described in FIG. 6, since addresses are generated in chronological order, the memory 400 stores edge information extracted in chronological order from the start address 410, and the current address 420 is stored from the start address 410. Starting and moving as the number of stored edge information increases. Since the ring buffer form, when the number of edge information reaches N (ring buffer size), the current address 420 is returned to the start address 410 and the storage space of the ring buffer memory is full. 500 reads all the edge information stored in the memory 400 to extract time information and to analyze the pattern. As described above, since the edge information stored in the memory 400 is sequentially stored in chronological order, the calculation unit 500 may easily reconstruct the pulse signal in time series according to the receiver segment field, edge type field, and data field value. Can recognize the pattern.

FIG. 9 is a block diagram illustrating an operation unit 500 and a direct memory access controller 350 of the general purpose reception apparatus 200 of FIG. 2. 9, the read / write controller 370 of the direct memory access controller 350 includes an address controller 380 and a read / write circuit 390, and the address controller 380 is stored in the memory 400. Generate the desired address or control to access the desired address. The read / write circuit 390 is a means of reading and storing a value stored in the address after accessing a desired address, or writing a value already stored in the address.

The calculator 500 includes a subtractor 510, a sub memory 520, and a DSP core 530. The read / write circuit 390 reads information on a detected time of edge information stored at the first address. In this case, the first address is generated by the address controller 380. The address controller 380 then generates a second address adjacent to the first address, and the read / write circuit 390 reads information about the detected time from the edge information stored at the second address. Based on the two values read by the read / write circuit 390, the subtractor 510 calculates a difference between the two time values, and the sub memory 520 stores the calculated difference value. The DSP core 530 recognizes the pattern based on the difference values sequentially stored in the sub memory 520. Through this operation, the operation unit 500 may recognize the pattern of the received pulse signal by approaching the memory 400 regardless of the main processor 450.

The general-purpose receiver 200 of the present invention may be applied to a remote controller or 3D shutter glasses. In the case of 3D shutter glasses that receive left and right eye images for different times from the display side and adjust the opening and closing states of the left and right eyes, the display device transmits a predetermined pattern of signals determined by the manufacturer to the 3D shutter glasses at regular intervals. When the pattern of the signal to be determined by the manufacturer is recognized, the pattern of the signal received in all products can be recognized only by the operation of the operation unit 500.

FIG. 10 is a block diagram illustrating the pattern recognition unit 550 of the general purpose reception apparatus 200 of FIG. 2. The pattern recognition unit 550 sequentially stores the extracted edge information in a register, compares the reference pattern previously stored in the programmable M control registers 560 with the sequentially stored edge information, and matches the received signal when the match is performed. Is recognized as a reference pattern, and includes a control register unit 560 and a pattern comparison unit 570. In FIG. 10, it is assumed that there is one reference pattern for convenience of description. The pattern recognition unit 550 receives the edge information extracted from the edge extraction unit 300 and sequentially stores the edge information. In the control register unit 560, edge information of the reference pattern is stored in advance, and M edge information corresponding to the reference pattern is externally programmable. The pattern comparison unit 570 compares the edge information stored first with a value stored in the first control register among the control registers 560. If different from each other, it is not a reference pattern, so it is not necessary to check any more. If the same is different, the extracted edge information stored in the register is compared with the value stored in the second control register. Through this process, if the information stored in the M control registers and the extracted edge information stored in the register are the same, the pattern recognition unit 550 recognizes the pattern of the received signal as a reference pattern. In FIG. 10, the case where one reference pattern is one is described as an example. However, when comparing edge information sequentially extracted in registers to N reference patterns stored in advance, a received signal is included in any one of N reference patterns. It can be quickly determined in real time.

When the pattern recognition unit 550 operates smoothly, the pattern of the received signal can be recognized in real time, and even though the pattern is recognized in real time, additional burden is placed on the operation unit 500 and the main processor 450. Do not give. However, when the noise is severe and the edge detector 250 or the like is not sufficiently removed, unwanted edges may be detected. If an unwanted edge is detected by noise, the pattern recognition unit 550 may not recognize the pattern smoothly because it does not satisfy the condition for generating the null edge, and thus the pattern recognition unit 550 does not recognize the pattern for a predetermined time. When the elapsed time or the edge information is stored in the memory 400 by the ring buffer size, the calculation unit 500 recognizes the pattern by using the edge information stored in the memory 400.

In addition, the pattern recognition method of the general-purpose receiving apparatus 200 according to the present invention may be implemented in the form of program instructions that can be executed by various computer means and recorded in a computer-readable medium. The computer readable medium may include program instructions, data files, data structures, etc. alone or in combination. Program instructions recorded on the media may be those specially designed and constructed for the purposes of the present invention, or they may be of the kind well-known and available to those having skill in the computer software arts. Examples of computer-readable recording media include magnetic media such as hard disks, floppy disks, and magnetic tape, optical media such as CD-ROMs, DVDs, and magnetic disks, such as floppy disks. Magneto-optical media, and hardware devices specifically configured to store and execute program instructions, such as ROM, RAM, flash memory, and the like. Examples of program instructions include not only machine code generated by a compiler, but also high-level language code that can be executed by a computer using an interpreter or the like. The hardware device described above may be configured to operate as one or more software modules to perform the operations of the present invention, and vice versa.

The foregoing description is merely illustrative of the technical idea of the present invention, and various changes and modifications may be made by those skilled in the art without departing from the essential characteristics of the present invention. Therefore, the embodiments disclosed in the present invention are not intended to limit the technical idea of the present invention but to describe the present invention, and the scope of the technical idea of the present invention is not limited by these embodiments. The protection scope of the present invention should be interpreted by the following claims, and all technical ideas within the equivalent scope should be interpreted as being included in the scope of the present invention.

200: general purpose receiver
250: edge detector
300: edge extraction unit
350: direct memory access controller
400: memory
450: main processor
500: calculation unit
550: pattern recognition unit

Claims (8)

An edge detector detecting an edge of the received pulse signal;
An edge extractor for extracting edge information for the detected edge, the edge information including time information associated with the detected edge;
A direct memory access controller which sequentially extracts an address and stores the extracted edge information directly in a memory without passing through the main processor using the address; And
An operation unit for extracting time information and analyzing patterns by reading edge information sequentially stored in the memory together when the number of edge information sequentially stored in the memory exceeds N pieces;
Universal receiving device comprising a. An edge detector detecting an edge of the received pulse signal;
An edge extractor for extracting edge information for the detected edge, the edge information including time information associated with the detected edge;
A direct memory access controller which sequentially extracts an address and stores the extracted edge information directly in a memory without passing through the main processor using the address;
A pattern recognition having a register, and sequentially storing the extracted edge information in the register, and comparing the reference pattern stored in advance in the M programmable control registers with the edge information sequentially stored in the register to determine pattern matching. part; And
If the number of edge information sequentially stored in the memory exceeds a predetermined number of N or the pattern recognition unit cannot find a matching pattern for a reference time, the edge information stored in the memory is sequentially read together to extract time information. An operation unit analyzing a pattern;
Universal receiving device comprising a. delete The method of claim 1,
The edge extraction unit,
Whether the detected edge is raised, whether the detected edge is falling, timer information corresponding to the detected edge, the number of a series of detected edges deemed to form one packet, or after the edge is detected General purpose receiving apparatus for extracting information including at least one or more of whether a reference time has elapsed as the edge information. The method of claim 1,
The direct memory access controller,
And managing the memory in a ring buffer structure by using a start address pointer at which the extracted edge information starts to be stored in the memory, and a current address pointer in which the latest edge information is stored. In the pattern recognition method of a general-purpose receiver for receiving a series of pulse signals and analyzing a pattern,
Detecting an edge of each of the received pulse signals;
Extracting edge information by extracting rising or falling time interval information from the detected edge;
Sequentially storing the extracted edge information directly in a memory without passing through the main processor; And
When the number of edge information stored in the memory reaches the reference value N, reading the N edge information to extract the time interval information and analyze the pattern
Pattern recognition method of a general-purpose receiving device comprising a. The method of claim 6,
Determining whether the pattern matches by comparing the extracted edge information with a reference pattern previously stored in the M programmable registers regardless of the number of edge information stored in the memory;
Pattern recognition method of a general-purpose receiving device further comprising. A computer-readable recording medium in which a program for executing the method of any one of claims 6 and 7 is recorded.

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