KR101087429B1 - Platform power management based on latency guidance - Google Patents

Abstract

The present invention deploys a power management policy that receives power management guidelines from a first plurality of components of a system and manages one or more of the second plurality of components of the system based at least in part on the received power management guidelines. An embodiment of a system is described. Other embodiments are also described.

Description

Power management method and device {PLATFORM POWER MANAGEMENT BASED ON LATENCY GUIDANCE}

Embodiments of the present invention relate to the field of power management, and in particular, to a method and apparatus for managing platform power based on various latency guidelines.

In today's technology world, the performance of electronic devices is improving rapidly with the rapid increase in their computing power. This increase causes devices to crave power, ie consume more power. To save power, a processor in the device may enter a sleep mode (eg, a low power state) for a short period of inactivity.

For example, the Advanced Configuration and Power Interface (ACPI) specification jointly developed by Hwelett-Packard®, Intel®, Phoenix®, and Toshiba® (for example, version 3.0a, published December 30, 2005). Defines various power states (eg, processor power states C0-C3 during normal G0 / S0 operating states of the device) in an ACPI-enabled system. According to the ACPI specification, the C0 state may be a normal running state of the processor. However, in the C1 state during a short period of inactivity, the processor may not execute the instructions, but may return to the running state at about the same time, while the C3 state (deeper sleep compared to C1 and saves more power than C1). In this case, the processor's cache can maintain state but ignore any snoops. The processor may spend more time returning from the C3 state to the normal execution state C0 than returning from the C1 state. The amount of time it takes for the processor to sleep (ie, the processor's ability to be disabled to save power) and how long it takes to wake up, including the C3 state (for example, deep sleep, deeper sleep, and so on). Modifications to each state that may be different are also possible.

Conventional power management, including those defined by the ACPI standard, can be performed based on heuristics collected on the processor and guidelines given by the operating system, and power management algorithms can be used to predict future behavior. Consider processor operation. For example, the operating system may consider using a central processing unit to provide this guideline. Based on these factors, the processor may enter one of a number of sleep states. The processor may enter the low power state intermittently, but other platform components with longer start up times may not normally enter this low power state to ensure better performance.

1 illustrates the total power consumption of a platform of a conventional computing system (line A) and the power consumption of its conventional processor (line B) over a workload consisting of an active period and an inactive state (idle state) during the execution of an application. It is a graph shown as an illustration. Referring to FIG. 1, the processor can adjust its power to 20 watts (W) during short active periods and to about 1 W when idle. While the processor is idle, the platform may maintain an idle power limit of ~ 9W, of which less than 1W may be due to the processor. In other words, the rest of the platform components in the computing system may not be adjusted down like the processor during the idle state. In the idle state, the platform of this exemplary computing device can still consume about 8-10 W of power because the processor can intermittently enter an appropriate sleep state during idle periods, but with longer latency This is because a large portion of the system resources (which takes longer to wake up from sleep) remain active for better performance.

In accordance with the present invention, a power management policy for receiving power management guidelines from a first plurality of components of a system and for managing one or more of the second plurality of components of the system based at least in part on the received power management guidelines. By deploying, it is possible to save power in the system.

Embodiments of the present invention will be described through the exemplary embodiments illustrated in the accompanying drawings in which like reference numerals refer to like elements, but are not limited to these exemplary embodiments.

Example embodiments include, but are not limited to, methods and apparatus for platform power management based on latency guidance.

Various aspects of the exemplary embodiments will be described using terms commonly used by those skilled in the art to convey the substance of their work to others skilled in the art. However, it will be apparent to those skilled in the art that other embodiments may be practiced with only some of the described aspects. For purposes of explanation, specific numbers, materials, and configurations have been set forth to provide a thorough understanding of the exemplary embodiments. However, it will be apparent to one skilled in the art that other embodiments may be practiced without these specific details. In other instances, well-known exemplary embodiments have been omitted or simplified in order not to unnecessarily obscure them.

In addition, although various operations will be described as a plurality of individual operations in a manner that facilitates an understanding of the exemplary embodiment, they should not be construed as meaning that these operations must be in the order of description. In particular, these operations need not be performed in the order disclosed.

The phrases “in some embodiments” and “in various embodiments” have been used repeatedly. Such phrases generally do not refer to the same embodiment, but may refer to the same embodiment. Terms such as "comprising", "having" and "including" have the same meaning unless the context indicates otherwise. The phrase "A and / or B" means "(A), (B), or (A and B)". The phrase "A / B" is equivalent to "A and / or B" as "(A), (B), or (A and B)". The phrase "at least one of A, B and C" means "(A), (B), (C), (A and B), (A and C), (B and C) or (A, B and C). ) ". The phrase "(A) B" means "(B) or (A B)", that is, A is optional.

2 is a block diagram of a power management system 10 according to various embodiments. In various embodiments, power management system 10 may be used, for example, in a laptop, cell phone, personal computer, PDA, palmtop, set top box, or any other suitable type of computing device. In various embodiments, power management system 10 may also be used in mobile computing devices.

The power management system 10 may include a power management controller (PMC) 15. The PMC 15 may be connected to the first plurality of components 20, 22, 26 and may be configured to receive power management guidelines 30, 32, 36 from the components 20, 22, 26, respectively. Can be. In various embodiments, the PMC controller may also receive information 40 as described below. In response at least in part to the received power management guidelines 30, 32, 36 and / or information 40, the PMC 15 may generate a source 60, 62 associated with the second plurality of components and / or computing devices. 66 may be configured to generate a power management policy (PM policy) 50 that manages power.

In various embodiments, the first plurality of components 20, 22, 26 may include more than one hardware / software associated with the computing device. In various embodiments, components 20, 22, and 26 may include, for example, external devices connected to the computing device and / or devices / hardware within the computing device, which may be Universal Serial Bus (USB) devices (e.g., (Including devices compatible with various versions of the USB standard, such as USB 2.0, 3.0), peripheral component interconnect (PCI) devices, PCI Express (PCIe) devices, network interface cards, peripherals, printers, scanners, disks Drives, cameras, network adapters, serial advanced technology attachments (SATA), parallel advanced technology attachments (PATA), and the like. In various embodiments, components 20, 22, and 26 may include one or more controllers configured to control one or more devices / functions within the computing device, which may include USB host controllers, memory controllers, Ethernet controllers, graphics controllers, Hard disk controllers (HDDs), audio controllers, advanced host controller interfaces (AHCI), and the like, but are not limited to these. In various embodiments, components 20, 22, 26 may also include one or more software applications running on a computing device, one or more device drivers, an operating system, or the like.

In various embodiments, each component 20, 22, 26 may dynamically transmit power management guidelines 30, 32, 36 to the PMC 15, respectively. The power management guidelines may include one or more latency parameters of each component. For example, power management guidelines may include latency tolerances of components. In various embodiments, the latency tolerance may be based at least in part on the maximum latency that a component can tolerate without negatively affecting its performance. For example, latency tolerance of component 20 may occur as one or more components of the computing device are in sleep mode and as a first instruction associated with component 20 enters a normal / executive state (eg, C0). While executed, component 20 may be based at least in part on the maximum latency that can be tolerated from the occurrence of a processor failure situation (eg, hardware (HW) interrupt). In various embodiments, when a component of the system and / or other components transition from sleep mode to normal / running state, the latency tolerance of the component may be tolerated without the component having a negative impact on its performance. The delay may be based at least in part.

In various embodiments, a component's PM guidelines may include quality of service (QoS) parameters of the component, internal heuristics such as interrupt frequency, input / output (I / O) traffic patterns, idle On components that may be useful for PMC 15 to generate a duration (ie, if the component knows the time to the next scheduled timer interrupt), workload estimates, and / or PM policy 50. It may include, but is not limited to, one or more other elements including any other suitable information relating thereto. In various embodiments, one or more components 20, 22, 26 may include memory access latency of the components within their PM guidelines.

In various embodiments, for example, one of the components 20, 22, 26 may be an audio playback software application. This audio playback application cannot tolerate any latency while actively playing audio files. However, when idle, i.e. when not receiving / playing any audio file, the audio playback application may allow for greater latency, which at least partially initiates the application receiving the audio file. It can be based on the difference in time and the time that the application must start playing the audio file to prevent the loss of any data. It will be apparent to some skilled in the art that the latency tolerance of the application may be based in part on its buffering capabilities. In various embodiments, the application may dynamically transmit latency tolerances to PMC 15 as part of power management guidelines. Thus, during audio file playback, the audio playback application may send zero or minimal latency tolerance to the PMC 15, while the application may transmit a greater latency tolerance during the idle state.

In various embodiments, a component may be doze in active intervals. For example, a wide area network (WLAN) client may enter a sleep (sleep) state whenever idle, as defined by the IEEE 802.11 standard (eg, 802.11e-2005 modification). The WLAN client may turn off the radio for a period of time, for example, defined by the WiFi Multimedia (WMM) power saving mode of the IEEE 802.11 standard, during which the access point (AP) may buffer data for the client. This mantissa period may be on the order of several milliseconds. The WLAN network interface card (NIC) may know when to turn on the radio, when to wake up the WLAN client and when to initiate communication. 5 is a block diagram of a latency tolerance reporting system in WMM power saving mode according to various embodiments of the present invention. As shown in FIG. 5, when a WLAN client is launched, the client may allow a small latency of, for example, 100 microseconds. However, during the mantissa, the client may allow for greater latency, such as approximately 1 millisecond. In various embodiments, the NIC may thus transmit a latency tolerance of PMC 15 (FIG. 1) DP 10 microseconds as part of the PM guidelines during the client wake-up state, however, while the client is in the sleep state, the NIC may One millisecond latency tolerance can be transmitted to the PMC 15.

Referring to FIG. 2, in various embodiments, PMC 15 may receive information 40 that may be used to generate power management policy 50. For example, in various embodiments, information 40 may include heuristics about traffic and behavioral patterns of computing devices and / or components thereof, including their processors. In various embodiments, information 40 may include additional information known to those skilled in the art, such as information needed to control a power source in a conventional ACPI compatible system or other conventional power control system. In various embodiments, the OS and / or processor of the computing device may generate information 40.

In response at least in part to the received power management guidelines 30, 32, 36 and information 40, the PMC 15 may generate a second plurality of components and / or resources 60, 62, associated with the computing device. 66 may be configured to generate a PM policy 50 that manages the power of the device. In various embodiments, the second plurality of components and / or resources 60, 62, 66 may include various core components such as computing devices, such as processors, power regulators, display panels, clock generators, phase locked loops, and the like. It may include platform components. In various embodiments, the first plurality of components 20, 22, 26 and the second plurality of components and / or resources 60, 62, 66 may have one or more components. For example, in various embodiments, PMC 15 may receive PM guidelines from a USB host controller and may generate PM policy 50 for the host controller.

In various embodiments, PM policy 50 may designate one or more of components 60 and 62 to enter one of a plurality of sleep levels. For example, if all of the components 20, 22, 26 have a specified latency tolerance of at least 1 msec of each PM guideline, the PMC 15 may generate a second plurality of components and / or resources 60,62. 66) instruct one or more of the plurality of sleep levels to enter one of the plurality of sleep levels such that it takes less than 1 msec for one or more components to wake up from each sleep level in response to an outage, such as a processor failure event, a HW outage, or the like. do. Similarly, if the specified maximum latency tolerance of all components 20, 22, 26 is, for example, at least 5 msec, the PM policy 50 may generate a second plurality of components and / or resources 60, 62, 66) directs one or more of the deeper sleep levels to take this component to less than 5 msec to wake up. In various embodiments, the plurality of possible sleep levels may be similar to the C-states specified in the ACPI specification and / or other sleep levels contemplated by those skilled in the art. That is, by recognizing the latency tolerances and other information of the PM guidelines of the components 20, 22, 26, the PM policy 50 causes one or more of the components 60, 62, 66 to have a sufficiently high latency tolerance. By allowing the user to enter a suitable sleep mode each time, power can be saved without negatively impacting the performance of the components 20, 22, and 26.

In various embodiments, various other factors may also be considered while developing the PM policy 50. For example, if one of the components 20, 22, 26 specifies a high QoS parameter and a latency tolerance of 100 μsec, for example, of the PM guidelines, the PMC 15 may be configured with the components 60, 62, Determining the sleep level for 66) allows the component to wake up well before 100 μsec, satisfying high QoS parameters.

In various embodiments, PMC 15 instructs less than all of components 60, 62, and 66 to enter sleep mode while not allowing one or more other components to enter sleep mode (or Enter another sleep mode). For example, if the voltage regulator and the clock generator are two of the components 60, 62, 66, and the voltage regulator wakes up longer than the clock generator, the PMC 15 may use the components 20,22, Compared to the deeper sleep level for the clock generator for a given latency tolerance received from 26) it may direct the voltage regulator to enter a shallower sleep level. However, if the latency tolerances received from components 20, 22, and 26 are sufficiently high, then both the voltage regulator and the clock generator may enter a deeper sleep level based on the PM policy 50.

In various embodiments, the deeper the sleep level, the more functional the component will be disabled, and the more power saved, the longer the component will return to normal execution (ie, the time to wake up).

In various embodiments, portions of the second plurality of components and / or resources 60, 62, 66, such as clock generators, voltage regulators, and portions of the PLL, may only be switched on and off. That is, for some of these components, there may be only one sleep level (eg, low power mode), which means that the power of these components will be reduced if the latency of components 20, 22, 26 is sufficiently high. You can temporarily block it. Thus, the PM policy 50 may control on / off switching of some / all of these components.

In various embodiments, components 20, 22, and 26 may send each PM guideline to PMC 15 continuously. Alternatively, components 20, 22, and 26 may transmit each PM guideline at regular intervals. Various other scenarios are possible, with each PM guideline being transmitted at regular intervals while some of the components transmit continuously. In various embodiments, the component may send PM guidelines at the beginning and may only resend PM guidelines when there is a change in the PM guidelines.

3 is a block diagram of a power management system 100 according to various embodiments of the present disclosure. In various embodiments, system 100 may include a processor composite power management controller (PCPMC) 105 coupled to an input / output (I / O) composite power management controller (IOPMC) 110. In various embodiments, PCPMC 105 may be located in a central processing complex of a computing device and IOPMC 110 may be located in an I / O complex of a computing device.

As will be readily appreciated by those skilled in the art, FIG. 3 illustrates only two power management controllers (PCPMC 105 and IOPMC 110), but in various embodiments, there may be more than one power management controller. For example, in a multi-processor environment, each processing complex may have an associated processor complex power management controller. In various embodiments, a single processing complex may include one or more processor complex power management controllers. In various embodiments, the power management controller may be located in various other areas of the computing device, but is not shown in FIG. 3.

In various embodiments, PCPMC 105 may receive PM guidelines from multiple software (SW) applications, device drivers, and / or operating system (OS) 150. Although shown as a single block 150, it will be apparent to one of ordinary skill in the art that many of the components may be represented. In various embodiments, SW / OS PM guidelines including latency tolerances may be communicated to the PCPMC 105 via a register interface and / or through an extension to, for example, an ACPI compatible C state interface. The PM guideline may include a maximum latency tolerance and OS awareness may be allowed from the occurrence of a processor shutdown event while executing in the sleep state and the first instruction, when entering the normal / running state.

Referring to FIG. 3, IOPMC 110 may include multiple devices 112, 114, 116, 118, multiple links 122, 124, 126, 128, and / or multiple subsystems 132, 134, and 136. PM guideline) can be received. Links and / or subsystems may be used to couple one or more devices to a computing device. For example, device 112 may be a USB device, corresponding subsystem 132 may be a USB controller, link 122 may be a USB link, and each may have its own latency constraint. have. In various embodiments, multiple devices (eg, 116 and 118) may be combined in a single subsystem. In various embodiments, subsystems 132, 134, and / or 136 may include, but are not limited to, a USB host controller, memory controller, Ethernet controller, or graphics controller. In various embodiments, each of the devices 112,... 118 may transmit power management guidelines to their respective links. In various embodiments, one or more of links 122,..., 128 may extend the device power management guidelines to link power management guidelines and transmit to one of subsystems 132, 134, and 136. have.

Subsystems 132, 134, and 136 may consider the device for generating PM guidelines and / or subsystem PM guidelines received from each link and transmit them to IOPMC 110. For example, if USB device 112 has an associated USB controller (subsystem 132) with latency tolerances of 1 msec and 800 μsec, respectively, then the USB controller is a subsystem PM guideline, the lower of the two latency tolerances, i.e. 800 μsec, which may be transmitted to the IOPMC 110.

In various embodiments, if devices 116, 118, links 126, 128, and / or subsystem 136 have different PM guidelines (including different latency tolerances), subsystem 136 may ( Each of the received PM guidelines (along with its own PM guidelines) may simply be resent to IOPMC 110. Alternatively, in various embodiments, subsystem 136 may develop a unified subsystem PM guideline in view of all received PM guidelines. For example, subsystem 136 may transmit the least of devices 116, 118, links 126, 128, and / or subsystem 136 to IOPMC 110.

Devices 112, ..., 118, links 122, ..., 128, and / or subsystems 132, ..., 136 and / or applications are device drivers, and OS 150 transmits The PM guidelines may include additional information. For example, in various embodiments, the PM guidelines may specify QoS parameters, heuristics such as interrupt frequency, I / O traffic patterns, idle duration times (i.e., time for the next scheduled timer interrupt by the device / subsystem). If known), workload estimates, and / or other suitable information that may be useful for the power management controller. In various embodiments, one or more devices / subsystems may also include respective memory access latency in their PM guidelines. In various embodiments, the PM controller may consider memory access latency, along with latency tolerance, to generate appropriate PM guidelines. In various embodiments, the latency tolerance may be based at least in part on the associated memory access latency.

Once PCPMC 105 and IOPMC 110 receive power management guidelines from an application, device driver, OS, device, link, and / or subsystem, PCPMC 105 and IOPMC 110 exchange guidelines. And / or various core components and platform components of a computing device, including but not limited to, a computing device, such as, but not limited to, a processor, a voltage regulator, a display panel, a clock generator, and / or a phase locked loop. Dynamic power management policy can be jointly formulated for multiple components associated with. In various embodiments, the developed power management policy may be similar to the PM policy 50 of FIG. 2.

In various embodiments, PCPMC 105 and IOPMC 110 may consider other factors while developing a PM policy. For example, if the computing device includes a direct media interface (DMI), the latency of the DMI may also be considered while developing a PM policy.

In various embodiments, applications, drivers, and / or OS 150, devices 112,... 118, links 122,..., 128, and / or subsystems 132,... 136 may include performance advice in each of these PM guidelines, which may include current performance levels and predicted future performance levels, if available among these components. In various embodiments, the power management controller may calculate latency tolerances of these components from the received performance advice. Alternatively, the transmitted performance advice may include latency tolerance.

Although devices 112,... 118 and subsystems 132,... 136 are shown in FIG. 3 connected to IOPMC 110, in various embodiments, some of these devices and subsystems are shown. May be connected to PCPMC 105 instead of (or optionally, in addition to) IOPMC 110. For example, an external bus and / or graphics card on a PCIe graphics (PEG) port may be connected to the PCPMC 105 to provide each PM guideline to the PCPMC 105.

4 is a flowchart of a power management method 200 suitable for the power management system of FIGS. 2 and 3, in accordance with various embodiments. 2 and 3, in step 210 the PCPMC 105 and the IOPMC 110 may include one or more of an application, a device driver, and an OS 150, devices 112,... 118, links 122,. ... 128 and / or subsystems 132,... 136 may receive power management guidelines from a first plurality of components. In step 220, PCPMC 105 and IOPMC 110 together comprise one or more core components and platform components of a computing device such as, for example, a processor, voltage regulator, display panel, clock generator and / or phase lock loop. The PM policies for the second plurality of devices are jointly developed.

In step 230, based at least in part on this deployed PM policy, determine whether one or more of the second plurality of components and / or resources enter a sleep mode (eg, a low power mode). If no component enters the sleep mode, in step 210 the PCPMC 105 and IOPMC 110 may continue to receive power management guidelines from the first plurality of components.

In step 230, if the deployed PM policy indicates that one or more of the second plurality of components and / or resources enter a sleep mode, then the indicated component is based at least in part on this deployed PM policy in step 240. Thus, an appropriate sleep mode can be entered. In the absence of an interrupt, such as, for example, a processor shutdown event, an HW interrupt, or other suitable interrupt known to those skilled in the art, the component may remain in sleep mode. Upon detecting such an interrupt in step 250, in step 260, the component exits the sleep mode and enters a normal run state, and in step 210, the PCPMC 105 and IOPMC 110 perform power management guidelines from the first plurality of components. Keep receiving.

6 illustrates an example computer system 500 suitable for implementing some of the embodiments, including a system that receives power management guidelines and deploys a power management policy based at least in part on the received power management guidelines. Shows a block diagram of. In some embodiments, computer system 500 may include a communications mechanism or bus 511 to communicate information, and integrated circuit components such as a processor 512 coupled to bus 511 to process information. .

Computer system 500 is connected to bus 511 to store a random accesss memory (RAM) or other dynamic storage device 504 (called main memory) that stores information and instructions for processor 512 to perform. It includes more. Main memory 504 may also be used to store temporary variables or other intermediate information while processor 512 performs instructions.

The firmware 503 may be a combination of software and hardware, such as an EPROM (Electronically Programmable Read-Only Memory) having an operation on a path recorded therein. The firmware 503 may be embedded foundation code, basic input / output system (BIOS) code, or other similar code. The firmware 500 allows the computer 500 to boot itself.

Computer system 500 may include a read-only memory (ROM) and / or other static storage device 506, coupled to bus 511, that stores static information and instructions for processor 512. . The static storage device 506 can store software at the OS level and at the application level.

Computer system 500 may be coupled to bus 511 and to a display device 521 such as a cathode ray tube (CRT) or liquid crystal display (LCD) that displays information to a computer user. A chipset, such as chipset 536, may interface with display device 521.

In order to communicate information and command selections to the processor 512, a keyboard input device (keyboard) 522 that includes letters and numbers and other keys may be coupled to the bus 511. Additional user input devices include a mouse, trackball, trackpad, stylus, connected to the bus 511 to communicate direction information and command selections to the processor 512 and to control cursor movement on the display device 521. Or a cursor control device 523, such as a cursor navigation key. A chipset, such as chipset 536, may interface with the input / output device.

Another device that may be connected to the bus 511 is a hardcopy device 524 that can be used to print instructions, data or other information on a medium such as paper, film, or similar type of medium. In addition, recording and playback devices such as speakers and / or microphones (not shown) may optionally be connected to the bus 511 for audio interface connection with the computer system 500. Another device that may be connected to the bus 511 is a wired / wireless communication device 525.

The communication system 500 includes a power source 528, such as a battery, an AC power plug connection, a rectifier, and the like, as those skilled in the art will understand at least based on the teachings provided herein.

In various embodiments, a power management controller (not shown in FIG. 6) similar to the PMC 15 of FIG. 2 and / or the PCPMC 105 / IOPMC 110 of FIG. 3 is incorporated into the computer system 500 of FIG. 6. May be included. In various embodiments, the power management controller may be connected to the bus 511 and one or more applications, computer system 500 configured to be executed by a number of components of computer system 500, such as processor 512. OS, one or more device drivers of computer system 500, firmware 503, chip set 536, one or more controllers of computer system 500 (e.g., USB host controller, memory controller not shown in the figure) , Ethernet controller, graphics controller, etc.), one or more devices (display device 521, keyboard 522, cursor control device 523, hardcopy device 524, communication interface 525) connected to computer system 500. Power management guidelines), including, but not limited to, and the like. In various embodiments, the power management controller may include a number of components of computer system 500, such as one or more platform components of computer system 500, processor 512, chip set 536, computer system ( Power management guidelines may be developed for one or more voltage regulators and clock generators, phase locked loops, display panels (eg, display device 521, etc.) included in 500. In various embodiments, the processor 512 may It may be configured to execute a number of tasks to provide operating system services, device driver services, and / or one or more application functions In various embodiments, the power management controller, as discussed previously, may include a processor 512. Power management guidelines and performance advice may be received from one or more of the tasks executed by.

In various embodiments, processor 512 and power management controller may be co-located on integrated circuits. If the power management controller includes a PCPMC and an IOPMC (similar to FIG. 3), in various embodiments, the processor 512 and the PCPMC may be co-located on an integrated chip, and in various embodiments, the IOPMC may be a computer system ( 500) may be disposed within an I / O composite (not shown). In various embodiments, the processor 512 may be configured to operate as one or more of the power management controllers discussed previously. In various embodiments, computer system 500 including processor 512, various hardware components, and / or power management controllers may have dimensions or shapes configured to facilitate computer system 500 for mobile computing. Can be. In various embodiments, computer system 500 may be used as a mobile phone, laptop, PDA, palmtop, MP3 player, PC, set-top box, or other computing device of the appropriate type. In various embodiments, computer system 500 may be used as a mobile computing device. In various embodiments, processor 512 and various components of computer system 500 may be housed in a body having a dimension or shape that is configured to facilitate computer system use in mobile computing.

While specific embodiments have been illustrated and described herein, those skilled in the art will appreciate that a wide variety of alternatives and / or equivalent implementations may be substituted for the specific embodiments shown and described without departing from the scope of the embodiments of the invention. . This application is intended to cover any adaptations or variations of the embodiments discussed herein. Accordingly, embodiments of the invention are expressly intended to be limited only by the claims and the equivalents thereof.

1 is an exemplary graphical representation of total power consumption of a platform of an exemplary computing system and power consumption of its processor;

2 is a block diagram of a power management system according to various embodiments of the present disclosure;

3 is another block diagram of a power management system according to various embodiments;

4 is a flowchart of a power management method according to various embodiments of the present disclosure;

5 is an exemplary flowchart of a latency tolerance reporting system in a Wi-Fi multimedia (WMM) power saving mode, in accordance with various embodiments;

6 is a black diagram of an example computer system suitable for practicing some embodiments.

Claims (14)

Receiving, by a platform's power management controller, power management guidelines from a first plurality of components associated with a system hosting the platform; Developing, by the power management controller, a power management policy for managing one or more of the second plurality of components of the system based at least in part on the received power management guidelines Including but not limited to: The receiving step includes receiving, by the power management controller, latency tolerances of one or more of the first plurality of components from one or more of the first plurality of components. Way. The method of claim 1, The deploying includes determining, by the power management controller, a sleep level for at least one of the second plurality of components. Way. delete The method of claim 1, The deploying step includes the time taken by the power management controller to wake up one or more of the second plurality of components from a sleep level determined with respect to the component. Determining a plurality of sleep levels for one or more of the second plurality of components such that the component is less than the latency tolerance of the component. Way. The method of claim 1, The receiving may include receiving, by the power management controller, a workload expectation, a quality of service parameter and / or a latency tolerance of at least one of the first plurality of components. Containing Way. The method of claim 1, The deploying includes deploying, by the power management controller, the power management policy based at least in part on heuristics collected for traffic and / or activity patterns of the system. Way. The method of claim 1, The receiving step is performed by the power management controller from a component selected from the group consisting of a software application, a device driver, an external device coupled to the system, a link coupling the external device to the system, a controller and an operating system. Receiving power management guidelines Way. The method of claim 1, The deploying includes deploying, by the power management controller, a power management policy comprising temporarily shutting off power supply to one or more of the second plurality of components. Way. Power to receive latency parameters of one or more of the first plurality of components from a first plurality of components and to manage power consumption of the second plurality of components based at least in part on the received latency parameters; A power management controller configured to determine a management policy, The received latency parameters of one or more of the first plurality of components include respective latency tolerances. Device. The method of claim 9, The power management controller, A processor power management controller disposed in a central processing complex of the platform and configured to receive latency parameters of a first of the first plurality of components; An input / output (I / O) power management controller disposed in the I / O processing complex of the platform and configured to receive latency parameters of a second of the first plurality of components, The processor power management controller and the I / O power management controller are further configured to exchange the received latency parameters and to jointly determine the power management policy for the second plurality of components. Device. The method of claim 9, The second plurality of components includes a component selected from the group consisting of a processor, a voltage regulator, a display panel, a clock generator, and a phase locked loop. Device. The method of claim 9, The power management controller also has a time for one or more of the second plurality of components to wake up from a sleep level determined with respect to the component is less than the latency tolerance of one or more of the first plurality of components. And determine the power management policy by determining a plurality of sleep levels for one or more of the second plurality of components. Device. 11. The method of claim 10, The first component is selected from the group consisting of a software application, a device driver and an operating system, The second component is selected from the group consisting of an external device coupled to the apparatus, a subsystem within the apparatus to which the device is coupled, and a controller controlling the functionality of the apparatus. Device. The method of claim 9, The apparatus is a platform configured to be deployed on a computing device configured for mobile computing. Device.

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