KR101056961B1 - Gray reference voltage supply circuit and driving circuit for flat panel display device using the same - Google Patents

Abstract

The gradation reference voltage supply circuit according to the present invention includes: a buck stage and a boost stage for stepping down and outputting an input voltage, respectively; A first inductor having both ends connected to an input terminal of the buck end and an output terminal of the boost end; And a P-type transistor connected to the output terminal of the boost terminal.

Description

Circuit For Supplying Gray Level Source Voltage And Driving Circuit For Flat Panel Display Using The Same}             

1 is a schematic block diagram of a flat panel display device;

2 is a block diagram illustrating a gray scale reference voltage supply unit of a conventional flat panel display device.

3 is a diagram illustrating an output of a gray scale reference voltage supply unit of a conventional flat panel display.

4 is a block diagram illustrating a gray reference voltage supply unit of a flat panel display device according to an exemplary embodiment of the present invention.

5 is a diagram showing the output of the gray scale reference voltage supply unit of the flat panel display of the present invention.

<Brief description of the main parts of the drawing>

250: gradation reference voltage supply unit 252: pulse width modulation integrated circuit (PWM IC)

254: Buck stage 254a: first load current measuring unit

254b: first driving unit 256: boost stage

256a: second load current measuring unit 256b: second driving unit                 

L ₁ , L ₂ : first and second inductors D ₁ , D ₂ :, first and second diodes

C ₁ , C ₂ : first and second capacitors R ₁ , R ₂ : first and second resistors

T _P : P-type transistor

T ₁ , T ₂ : first and second transistors

V _IN : Input terminal V _OUT1 , V _OUT2 : First and 2 output terminals

DPM: Stabilization Signal SHDN: Shutdown Signal

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a flat panel display (FPD), and more particularly, to a flat panel display using a driving circuit including a pulse width modulation (PWM) control circuit.

Cathode Ray Tubes (CRTs) are mainly used in display devices such as televisions and monitors, but they have disadvantages such as high weight, high volume, and high driving voltage.

Accordingly, there is a need for a flat panel display (FPD) having excellent characteristics such as light weight and low power consumption, and a liquid crystal display (LCD device) or an electroluminescent device (ELD) has been developed.

Among them, a liquid crystal display device is a non-light emitting device that implements an image by using a refractive index difference using optical anisotropy of a liquid crystal layer interposed between an array and a color filter substrate.

On the other hand, an electroluminescent device is a display device using an electroluminescence (EL) phenomenon in which light is generated when a predetermined electric field is applied to a phosphor, and according to a source that causes excitation of carriers. ) May be classified into an electroluminescent device or an organic electroluminescent device.

Such a flat panel display device includes a driving circuit unit for converting RGB data and various control signals transmitted from an external driving system into an appropriate electrical signal, and a display panel displaying an image to a user through the same.

1 is a schematic block diagram of a flat panel display device.

As illustrated, the flat panel display device 10 includes a display panel 20 and a driving circuit unit 30 for driving the display panel 20.

The display panel 20 includes a gate wiring 22, a data wiring 24 intersecting the gate wiring 22, a switching element S connected to the gate wiring 22, and the data wiring 24.

The driving circuit unit 30 is a portion for processing the RGB data and various control signals transmitted from an external driving system (not shown) and supplying them to the liquid crystal panel 20. The timing controller 36, the voltage supply unit 50, And a gate driver 32 and a data driver 34.

The gate driver 32 is connected to the gate wiring 24 of the liquid crystal panel 20 to input a gate signal, and the data driver 34 is connected to the data wiring 24 to input a data signal.

The timing controller 36 processes RGB data and various control signals transmitted from an external driving system to output a gate control signal and a data control signal. At this time, the control signal includes a vertical synchronization signal as a frame discrimination signal, a horizontal synchronization signal as a line discrimination signal, a data enable signal indicating a time point at which data is input, a main clock, and the like as the timing synchronization signal.

The timing controller 36 rearranges the RGB data and starts inputting data control signals for driving the display panel in response to the timing synchronization signal, that is, RGB digital data, horizontal synchronization signal, and the RGB digital data to the data driver 34. A horizontal line start signal for commanding a signal, and a source pulse clock for data shift in the data driver 34 are output to the data driver 34.

In addition, the timing controller 36 sequentially processes the gate control signal, that is, the vertical synchronization signal, the vertical line start signal for instructing the gate driver 32 to start inputting the gate-on signal, and the gate signal to each gate line 22. A gate clock and the like for inputting are output to the gate driver 32.

The gamma power supply unit 38 generates an appropriate gray scale voltage according to the number of RGB data bits through the gray reference voltage transmitted from the outside, and outputs it to the data driver 34.                         

In addition, the voltage supply unit 50 modulates and outputs a DC voltage capable of driving each element of the display panel 20 and the driving circuit unit 30. The gray level reference voltage supply unit supplying the gray level reference voltage of the gamma power supply unit 38 ( Not shown).

The gray scale reference voltage supply unit of the power supply unit 50 may be formed of a pulse width modulation (PWM) control circuit.

The pulse width modulation control circuit is a circuit for controlling the output driving voltage by modulating the width of the input square wave.

This can be applied to a converter and used for power supply, which is generally integrated circuit (IC).

A case in which the pulse width modulation control circuit is applied to the gradation reference voltage supply unit of the flat panel display device will be described with reference to the drawings.

2 is a block diagram illustrating a gray scale reference voltage supply unit of a conventional flat panel display device.

As shown in FIG. 2, the gradation reference voltage supply unit 150 of the flat panel display device is connected to a buck stage 154, a boost stage 156, and the buck and boost stages 154 and 156. The first and second inductors L ₁ and L ₂ , the first and second diodes D ₁ and D ₂ , the first and second capacitors C ₁ and C ₂ , and the first and second resistors R ₁ and R. ₂ ).

The buck end 154 serves as a step-down stage for outputting a voltage lower than the input voltage, and the boost stage 156 serves as a boost stage for outputting a voltage higher than the input voltage.

The buck end 154 may control the output voltage by modulating the pulse width of the input wave by using the first load current measuring unit 154a for measuring the current flowing through the load connected to its output terminal and the measured load current. The first transistor T ₁ is connected to the driving unit 154b, the first load current measuring unit 154a, and the first driving unit 154b to serve as a switch.

The boost stage 156 is configured to control the output voltage by modulating the pulse width of the input wave by using the second load current measuring unit 156a for measuring the current flowing through the load connected to its output terminal and the measured load current. A second transistor T ₂ is connected to the second driver 156b, the second load current measuring unit 156a, and the second driver 156b to serve as a switch.

The source electrode of the first transistor T ₁ , which is the output terminal of the buck end 154, is connected to the first diode D ₁ , the first inductor L ₁ , and the first capacitor C ₁ in order. It is connected to the first output terminal V _OUT1 .

The input terminal V _IN connected to the buck end 154 includes a second inductor L ₂ , a second diode D ₂ , a second capacitor C ₂ , and first and second resistors R ₁ and R ₂ . Are connected in turn, and are finally connected to the second output terminal V _OUT2 .

The first and second resistors R ₁ and R ₂ connected in series form a feedback terminal FB, and the feedback signal output to the feedback terminal FB is the first load current measuring unit 154a of the buck end 154. And a first driving unit 154b and a second driving unit 156b that are input to the second load current measuring unit 156a of the boost terminal 156 to output the first output terminal V _OUT1 and the second output terminal V _OUT2. It is used to control the output voltage.

The drain electrode of the second transistor T ₂ , which is an output terminal of the boost terminal 156, is connected between the second inductor L ₂ and the second diode D ₂ , and the source electrode of the second transistor T ₂ is connected. Is grounded.

Here, the buck end 154 and the boost end 156 are composed of one pulse width modulation integrated circuit (PWM IC) 152.

The gradation reference voltage supply unit 150 applies the gradation reference voltage to the gamma power supply unit (38 in FIG. 1) of the driving circuit unit (30 in FIG. 1) of the flat panel display device through the first and second output terminals V _OUT1 and V _OUT2 . We will look at the behavior.

When the flat panel display (10 in FIG. 1) is turned on, the timing controller (36 in FIG. 1) is operated to transmit a drive signal (DPM) to the pulse width modulation integrated circuit 152 after the stabilization time. do.

During this stabilization time, the logic of the driving circuit section 30 of FIG. 1 does not operate normally. When a high voltage is supplied to the gamma power supply section 38 of this stabilization time, an unwanted image is displayed. Since the gamma power supply unit 38 of FIG. 1 may receive a low voltage during an initial stabilization time, a high voltage may be input after the stabilization time.

That is, until the logic of the driving circuit unit 30 of FIG. 1 operates normally, a low voltage is supplied to the gamma power supply unit 38 of FIG. 1 so that an unwanted image is not displayed, and then the driving circuit unit (FIG. 1). If the logic of Fig. 30 is normally operated, a high voltage is supplied to the gamma power supply unit (38 in Fig. 1) to display a desired image.

To this end, the timing controller (36 in FIG. 1) transmits the stabilization signal (DPM) to the pulse width modulation integrated circuit 152, and the pulse width modulation integrated circuit 152 shuts down the operation of the boost stage 156. The boost stage 156 is not operated until the signal SHDN is turned on and the stabilization signal DPM is input.

Thereafter, when the stabilization signal DPM is input to the pulse width modulation integrated circuit 152, the shutdown signal SHDN is turned off, and the boost terminal 156 starts operation, and the gray reference voltage supply unit 150 is input. A gray reference voltage is generated using the voltage input to the terminal V _IN and output to the gamma power supply unit 38 of FIG. 1 through the second output terminal V _OUT2 .

When the voltage input to the input terminal V _IN of the gradation reference voltage supply unit 150 is about 12 V, the voltage output to the first output terminal V _OUT1 is about 3.3 V, and the boost terminal 156 operates. In this case, the voltage output to the second output terminal V _OUT2 is about 15V.

Here, the gray scale reference voltage supply unit 150 is the input terminal (V _IN ) to the second output terminal (V _OUT2 ) even when the shutdown signal (SHDN) is ON, that is, even when the boost terminal 156 does not operate. Output the input voltage of as it is.

That is, since the boost terminal 156 does not operate as the shutdown signal SHDN is turned on, but the second output terminal V _{OUT2 is} connected to the input terminal V _IN , the second output terminal V _OUT2. ) Does not output 0V but outputs the voltage input to the input terminal (V _IN ).

Therefore, even during the stabilization time before the logic of the driving circuit unit 30 of FIG. 1 operates normally, the gamma power supply unit 38 of FIG. 1 is supplied with a high voltage of about 12 V instead of a low voltage to display an unwanted image. Display).

3 is a diagram illustrating an output of a gray scale reference voltage supply unit of a conventional flat panel display, and Table 1 shows a relationship between a shutdown signal SHDN and a voltage value of a second output terminal V _OUT2 .

TABLE 1

As shown in FIG. 3 and Table 1, when the flat panel display (10 in FIG. 1) is turned ON, the stabilization signal DPM is supplied from the timing controller (36 in FIG. 1) to the gray scale reference voltage supply unit (150 in FIG. 2). During the first period A, which is a stabilization time to be input to the), the shutdown signal SHDN is turned on so that the boost terminal 156 of FIG. 2 does not operate, and at this time, the second output terminal V _OUT2. ) Outputs about 12V which is the voltage input to the input terminal (V _IN ).

After that, the shutdown signal SHDN is turned off so that the second output terminal V _OUT2 outputs about 15V in the second section B in which the boost terminal 156 of FIG. 2 operates.

In the first section A, the voltage value output to the second output terminal V _OUT2 should be 0V. Otherwise, since the input voltage value is output about 12V, the gray scale reference voltage supply unit 150 is a driving circuit unit (FIG. 1). This causes a problem in which an unwanted image is displayed during the first section A before the logic of 30) operates normally. (Abnormal Display)

In order to solve this problem, the present invention provides a gradation reference voltage supply unit in which a P-type transistor is added between a pulse width modulation integrated circuit and a second output terminal, and a driving circuit including the same. The purpose.

The gradation reference voltage supply unit may prevent the unwanted image from being displayed by outputting a low voltage to the second output terminal in a section in which the boost terminal is not operated.

In order to achieve the above object, the present invention, the buck stage (Boost Stage) and boost stage (Boost Stage) for stepping down and outputting the input voltage, respectively; A first inductor having both ends connected to an input terminal of the buck terminal and an output terminal of the boost terminal; A gray reference voltage supply circuit including a P-type transistor connected to an output terminal of the boost stage is provided.

The gate electrode of the P-type transistor is connected to the input terminal of the buck end, and the source electrode is connected to the output terminal of the boost end.

When the boost stage is not operated, the P-type transistor is turned off, and when the boost stage is operated, the P-type transistor is turned on.

The gray reference voltage supply circuit includes a first diode connected between the first inductor and a source electrode of the P-type transistor, a first capacitor and a first resistor connected to the drain electrode of the P-type transistor, and the first resistor. And a second resistor connected in series to a first resistor, a second inductor connected to the output terminal of the buck end, and a second diode and a second capacitor connected to both ends of the second inductor, respectively.

About 12V is applied to the buck input terminal, about 3.3V is output to the first output terminal connecting the second inductor and the second capacitor, and the second output terminal, which is the drain electrode of the P-type transistor, 0V is output when the boost stage is not operating and about 15V when the boost stage is not operating.

The buck end and the boost end may be a pulse width modulation integrated circuit (PWM IC), and the buck end may include a buck load current measuring unit measuring load current and a buck driving unit controlling an output voltage using the measured load current. The boost stage may include a boost load current measuring unit measuring a load current and a boost driving unit controlling an output voltage using the measured load current.

On the other hand, the present invention includes a timing controller for outputting a gate control signal, a data control signal and a stabilization signal (DPM); A gradation reference voltage supply unit for receiving the stabilization signal and the power supply voltage and outputting a gradation reference voltage, the a) a buck stage and a boost stage for respectively stepping down and increasing the input voltage; B) a first inductor having both ends connected to an input terminal of the buck end and an output terminal of the boost end; A gray level reference voltage supply unit including a P-type transistor connected to an output terminal of the boost terminal; A gamma power supply unit receiving the gray reference voltage and outputting a gray voltage; A gate driver configured to receive the gate control signal and output a gate signal; Provided is a driving circuit for a flat panel display device including a data driver for receiving the data control signal and the gray voltage and outputting a data signal.

The gradation reference voltage supply part does not output a voltage because the boost stage does not operate before the stabilization signal is input, the P-type transistor is turned off, and the boost is performed after the stabilization signal is input. A stage is operated and the P-type transistor is turned on to output an output voltage of the boost stage.

The gamma power supply unit receives the output of the buck end as the gray reference voltage before the stabilization signal is input to the gray reference voltage supply unit, and outputs the boost stage after the stabilization signal is input to the gray reference voltage supply unit. Is input as the gray scale voltage.                     

Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings.

Example

4 is a block diagram illustrating a gray reference voltage supply unit of a flat panel display according to an exemplary embodiment of the present invention.

As shown in FIG. 4, the gradation reference voltage supply unit 250 of the flat panel display device is connected to a buck stage 254, a boost stage 256, and the buck and boost stages 254 and 256. The first and second inductors L ₁ and L ₂ , the first and second diodes D ₁ and D ₂ , the first and second capacitors C ₁ and C ₂ , and the first and second resistors R ₁ and R. ₂ ) and a P-type transistor T _P between the second diode D ₂ and the second capacitor C ₂ .

The buck end 254 serves as a step-down stage for outputting a voltage lower than the input voltage, and the boost stage 256 serves as a boost stage for outputting a voltage higher than the input voltage.

The buck end 254 is a first load current measuring unit 254a for measuring a current flowing through a load connected to its output terminal, and a first voltage for controlling an output voltage by modulating a pulse width of an input wave using the measured load current. The first transistor T ₁ is connected to the driving unit 254b, the first load current measuring unit 254a, and the first driving unit 254b to serve as a switch.

The boost stage 256 controls the output voltage by modulating the pulse width of the input wave by using the second load current measuring unit 256a for measuring the current flowing through the load connected to its output stage and the measured load current. 2 drive is connected with (256b) and a second load current measuring part (256a) and the second driving unit (256b) comprises a second transistor (T ₂₎ of the switch.

The source electrode of the first transistor T ₁ , the output terminal of the buck end 254, is connected to the first diode D ₁ , the first inductor L ₁ , and the first capacitor C ₁ in order. It is connected to the first output terminal V _OUT1 .

The input terminal V _IN connected to the buck end 254 may include a second inductor L ₂ , a second diode D ₂ , a P-type transistor T _P , a second capacitor C ₂ , first and 2 are connected to the resistors R ₁ and R ₂ in order and finally to the second output terminal V _OUT2 .

In the P-type transistor T _P , a gate electrode is connected to an input terminal V _IN , and a source electrode and a drain electrode are connected to a second diode D ₂ and a second capacitor C ₂ , respectively. .

The first and second resistors R ₁ and R ₂ connected in series form a feedback terminal FB, and the feedback signal output to the feedback terminal FB is the first load current measuring unit 254a of the buck end 254. And a first driving unit 254b and a second driving unit 256b are inputted to the second load current measuring unit 256a of the boost stage 256, and the first output terminal V _OUT1 and the second output terminal V _OUT2. It is used to control the output voltage.

The drain electrode of the second transistor T ₂ of the boost stage 256 is connected between the second inductor L ₂ and the second diode D ₂ , and the source electrode of the second transistor T ₂ is grounded. .

Here, the buck end 254 and the boost end 256 may be composed of one pulse width modulation integrated circuit (PWM IC) 252.

The gray reference voltage supply unit 250 supplies a gray reference voltage to the gamma power supply unit of the driving circuit of the flat panel display device through the first and second output terminals V _OUT1 and V _OUT2 , and an operation thereof will be described.

When the flat panel display device is turned on, the timing controller operates and transmits a stabilization signal (Drive Power Manager; DPM) to the pulse width modulation integrated circuit 252 after the stabilization time passes.

Since the logic of the driving circuit part does not operate normally during this stabilization time, when a high voltage is supplied to the gamma power supply part during this stabilization time, an unwanted image may be displayed. After the settling time, a high voltage must be input.

That is, until the logic of the driving circuit unit operates normally, a low voltage is supplied to the gamma power supply unit so that an unwanted image is not displayed. After that, if the logic of the driving circuit unit operates normally, a high voltage is supplied to the gamma power supply unit. To display the desired image.

To this end, the timing controller transmits a stabilization signal DPM to the pulse width modulation integrated circuit 252, and the pulse width modulation integrated circuit 252 turns on the shutdown signal SHDN to prevent the boost stage 256 from operating. The boost stage 256 is not operated until it is turned on and the stabilization signal DPM is input.

Thereafter, when the stabilization signal DPM is input to the pulse width modulation integrated circuit 252, the shutdown signal SHDN is turned off, and the boost stage 256 starts to operate, and the gradation reference voltage supply unit 250 is input. A gray reference voltage is generated using the voltage input to the terminal V _IN , and output to the gamma power supply unit through the second output terminal V _OUT2 .

When the voltage input to the input terminal V _IN of the gradation reference voltage supply unit 250 is about 12V, the voltage output to the first output terminal V _OUT1 is about 3.3V, and the boost terminal 256b is operated. In this case, the voltage output to the second output terminal V _OUT2 is about 15V.

Here, since the boost terminal 256 of the gray reference voltage supply unit 250 does not output a signal to the second diode D ₂ when the shutdown signal SHDN is turned on, the P-type transistor T _P. The input voltage of the input terminal V _IN is directly applied to the source electrode of.

Since the gate electrode of the _P -type transistor T _P is connected to the input terminal V _IN , the same input voltage, that is, about 12 V is applied to the gate electrode and the source electrode of the _P -type transistor T _P. This means that the P-type transistor T _P is turned off.

Therefore, the voltage of the input terminal (V _IN) has a second output terminal is not applied to (V _OUT2), which shut down signal when (SHDN) is to be turned on (ON), the second output terminal 0V is output (V _OUT2) It means.

Thereafter, when the shutdown signal SHDN is turned off, the boost terminal 256 operates to output a signal of about 15V to the second diode D ₂ , so that the source electrode of the _P -type transistor T _P 15V is applied.

In this case, since the gate electrode of the _P -type transistor T _P is connected to the input terminal V _IN and about 12 V is applied, the potential of the gate electrode of the _P -type transistor T _P is lower than that of the source electrode. (low), which means that the P-type transistor T _P is turned on.

Therefore, the output signal of the boost terminal 256 passes through the _P -type transistor T _P , and about 15 V of the voltage is output to the second output terminal V _OUT2 .

FIG. 5 is a diagram illustrating an output of the gray scale reference voltage supply unit of the flat panel display device, and Table 2 shows a relationship between the shutdown signal SHDN and the voltage of the second output terminal V _OUT2 .

TABLE 2

As shown in FIG. 5 and Table 2, when the flat panel display device is turned on, the first output terminal V _OUT1 outputs a voltage of about 3.3V.

On the other hand, the shutdown signal SHDN is turned on during the initial first section A until the stabilization signal DPM is input to the gradation reference voltage supply part, so that the boost stage (256 in FIG. 4) does not operate. At this time, the P-type transistor T _P is turned off and the voltage inputted to the input terminal V _IN is transferred to the second output terminal V _OUT2 through the _P -type transistor T _P. Since it is not transmitted to, the second output terminal V _OUT2 outputs 0V.

After that, in the second section B in which the stabilization signal DPM is input from the timing controller, the shutdown signal SHDN is turned off. Accordingly, the boost stage (256 in FIG. 4) operates to generate a signal of about 15V. Outputs

Since the P-type transistor T _P is turned on as the boost stage 256 in FIG. 4 operates, the output signal of the boost stage 256 in FIG. 4 is turned on in the second section B. FIG. is P-type traffic register is transmitted to the second output terminal (V _OUT2) via the (T _P), the second output terminal (V _OUT2) is outputted to about 15V.

That is, the second output terminal V _OUT2 of the gray reference voltage supply unit 250 of FIG. 4 outputs 0V in the first section A and about 15V in the second section B. As shown in FIG.

Therefore, the low voltage is output to the gamma power supply unit during the first section A before the logic of the driving circuit unit normally operates, and the high voltage is applied during the second section B during which the logic of the driving circuit unit normally operates. By outputting to the gamma power supply, unwanted images are not displayed and only desired images can be displayed.

The gradation reference voltage supply unit and the driving circuit for a flat panel display device using the same according to the present invention are not limited to the above embodiments, and should be provided to those skilled in the art without departing from the spirit of the present invention. It is apparent that various changes and modifications are possible, and it is understood that such changes and modifications belong to the present invention through the appended claims.

In the gradation reference voltage supply unit and the flat panel display driving circuit using the same according to an embodiment of the present invention, one transistor is added to the outside of a pulse width modulation integrated circuit (PWM IC) including a buck end and a boost end. By switching the output of the gradation reference voltage supply unit during the stabilization time before the logic of the normal operation, the high voltage is prevented from being input to the gamma power supply during the stabilization time, thereby preventing the unwanted image from being displayed. You can prevent it.

In particular, since only one transistor needs to be added, image quality can be improved by preventing unwanted images from being displayed without a drastic increase in manufacturing cost and manufacturing time.

Claims (10)

A buck stage and a boost stage for stepping down and outputting an input voltage, respectively; A first inductor having one end connected to the input terminal of the buck end and the other end connected to the output terminal of the boost end; A P-type transistor having a gate electrode connected to an input terminal of the buck end and a source electrode connected to an output terminal of the boost end, And an output terminal of the boost terminal is connected between the other end of the first inductor and the source electrode of the P-type transistor. delete The method of claim 1, When the boost stage is not operated, the P-type transistor is turned off, and when the boost stage is operated, the gray scale reference at which the P-type transistor is turned on. Voltage supply circuit. The method of claim 3, wherein A first diode connected between the first inductor and a source electrode of the P-type transistor, a first capacitor connected between the drain electrode and the first resistor of the P-type transistor, and connected in series with the first resistor A second resistor, a second inductor having one end connected to the output end of the buck end, a second diode connected between one end of the second inductor and the output end of the buck end, and a second connected to the other end of the second inductor. Gray reference voltage supply circuit further comprising a capacitor. The method of claim 4, wherein 12V is applied to the input terminal of the buck end, 3.3V is output to the first output terminal, which is a connection portion of the second inductor and the second capacitor, and a boost terminal is provided to the second output terminal, which is the drain electrode of the P-type transistor. A gradation reference voltage supply circuit that outputs 0V when it is not in operation and 15V when the boost stage is in operation. The method of claim 1, And the buck end and the boost end are pulse width modulation integrated circuits (PWM ICs). The method of claim 6, The buck end is composed of a buck load current measuring unit for measuring the load current and a buck driving unit for controlling the output voltage using the measured load current, the boost stage is a boost load current measuring unit for measuring the load current and the measurement A gradation reference voltage supply circuit comprising a boost driver for controlling the output voltage using the loaded load current. A timing controller for outputting a gate control signal, a data control signal, and a stabilization signal (DPM); A gray reference voltage supply unit which receives the stabilization signal and the power supply voltage and outputs a gray reference voltage. A) a buck stage and a boost stage for stepping down and outputting an input voltage, respectively; B) a first inductor having one end connected to the input terminal of the buck end and the other end connected to the output terminal of the boost end; C) a P-type transistor having a gate electrode connected to an input terminal of the buck end and a source electrode connected to an output terminal of the boost end; A gray level reference voltage supply unit connected between the other end of the first inductor and a source electrode of the P-type transistor; A gamma power supply unit receiving the gray reference voltage and outputting a gray voltage; A gate driver configured to receive the gate control signal and output a gate signal; A data driver which receives the data control signal and the gray voltage and outputs a data signal Driving circuit for a flat panel display device comprising a. The method of claim 8, The gradation reference voltage supply part does not output a voltage because the boost stage does not operate before the stabilization signal is input, the P-type transistor is turned off, and the boost is performed after the stabilization signal is input. And a stage operating and the P-type transistor is turned on to output the output voltage of the boost stage. The method of claim 8, The gamma power supply unit receives the output of the buck end as the gray reference voltage before the stabilization signal is input to the gray reference voltage supply unit, and outputs the boost stage after the stabilization signal is input to the gray reference voltage supply unit. A driving circuit for a flat panel display device receiving the input as the gray scale voltage.

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