KR101015716B1 - Receiving device and signal receiving method of mobile terminal in mobile communication system - Google Patents

Abstract

According to an aspect of the present invention, there is provided a receiver of a mobile terminal, comprising: a radio signal (RF) processor for amplifying a transmitted radio signal by a specific gain, removing noise from the amplified radio signal, and converting the signal into a baseband signal; A digital signal processor converting the baseband signal output from the RF processor into a digital signal, digitally filtering the digital signal, and amplifying the digital signal output from the digital signal processor according to a specific amplification gain to adjust the gain of the digital signal. And an automatic gain controller to remove the code bits from the digital signal output from the digital signal processor, convert the code bits into a log domain format, and quantize the converted signal to a preset threshold value. It is characterized by adding a sign bit.

Zero-Intermediate Receiver, Digital Continuous Gain Amplifier, Amplified Gain Determinator, Log Domain

Description

Receiving apparatus and signal receiving method of mobile terminal in mobile communication system {Method for receiving signal and receiver of mobile station in communication system}             

1 is a block diagram showing the structure of a typical heterodyne receiver;

2 is a block diagram showing the structure of a receiver according to an embodiment of the present invention;

3 is a diagram showing the structure of a digital continuous gain amplifier according to an embodiment of the present invention;

4A to 4B illustrate operation and threshold conversion of a quantizer according to an embodiment of the present invention;

5 is a flowchart illustrating operation of a digital continuous gain amplifier according to an embodiment of the present invention.

The present invention relates to a receiving apparatus and a wireless signal receiving method of a mobile communication system, and more particularly to a receiving apparatus and a signal receiving method of a mobile terminal for receiving a high frequency signal transmitted from a base station in a code division multiple access system.

 Data to be transmitted in a code division multiple access (CDMA) system is modulated into a radio frequency (RF) signal, and the modulated signal is transmitted to a CDMA system through a wireless channel. Transmitted to multiple terminals. The RF signal transmitted to the mobile terminal has a dynamic range of 100 dB or more power level under the influence of various wireless environments such as fading and multipath propagation.

In general, CDMA cellular and PCS terminal receivers down-convert the received RF modulated signal to baseband signals using a heterodyne reception scheme through several steps. The heterodyne reception method uses a specific intermediate frequency (hereinafter, referred to as IF) rather than an RF or baseband signal used in actual wireless communication. Therefore, the heterodyne reception method can perform amplification and filtering at a fixed center frequency regardless of the received frequency.

The heterodyne method adjusts a wide dynamic range by using a low noise amplifier (LNA) of the RF stage and an automatic gain controller (AGC) of the IF stage, and analogly removes the DC offset. After such RF processing, the receiver of the mobile terminal using the heterodyne method performs digital processing using a signal that has passed through an analog-to-digital converter.

Such a heterodyne receiver can use various filters and a variable gain amplifier (VGA) in the RF and IF stages to properly filter and amplify the received signal. For example, a heterodyne receiver can be designed to adjust a gain range of 40dB at the RF stage and a gain range of 60dB at the IF stage, thus providing 100dB of amplification range for the received signal. . This heterodyne receiver will be described in detail.

1 is a block diagram showing the structure of a typical heterodyne receiver.

The heterodyne receiver classifies the entire operator band by using a band pass filter 12, ie, an RF SAW filter, which is an element for separating the high frequency signal received from the antenna 11, and converts the received high frequency signal into a low noise amplifier as a band signal. (Low Noise Amplifier: LNA) (13). The input signal is amplified by the low noise amplifier 13 and then removed by the image rejection filter 14 to remove unwanted image frequencies.

The signal from which the image frequency is removed is converted into an intermediate frequency IF by the high frequency downlink mixer 15. Here, the high frequency down mixer 15 multiplies the input signal with the PLL signal in order to set the phase of the periodic signal in the phase locked loop (hereinafter referred to as a PLL) 20 to an exact fixed point which does not shake as desired. Convert to a fixed intermediate frequency (IF). The fixed intermediate frequency (IF) signal output from the high frequency downlink mixer 15 is input to the channel select filter 16. The channel selection filter 16 selects only a desired channel from the input intermediate frequency (IF) signal. Thereafter, the output signal of the channel selection filter 16 is amplified into a signal of constant magnitude through the intermediate frequency amplifier 17. The intermediate frequency amplifier 17 is also referred to as a variable gain amplifier.

The signal amplified by the intermediate frequency amplifier 17 is converted into a baseband signal having a 90 degree phase difference by IF local oscillators 18a and 18b. That is, the in-phase signal and the quadrature-phase signal having a 90 degree phase difference by converting the output frequency of the phase shifter 19 which receives the frequency output from the oscillator (not shown) and the output frequency of the intermediate frequency filter 17 are converted. Is output.

Operators can benefit from the size and manufacturing cost by appropriately designing the receiver in the case of a mobile communication terminal, and in particular, the mobile terminal aims to reduce power consumption. However, since the heterodyne receiver removes an image channel at the IF stage and uses a channel selection filter for receiving only a desired channel, the complexity of the circuit is increased. As a result, power consumption of the mobile terminal is increased.

Recently, a mobile communication system has been oriented toward a multi-mode terminal in which one terminal simultaneously supports various types of standards. However, in the case of supporting different intermediate frequencies (IF) frequencies for each mode, the heterodyne method requires a plurality of intermediate frequencies (IF) stages, so that the manual required for each intermediate frequency (IF) stage is required. The number of devices increases and the chip area also increases.

In addition, the analog automatic gain controller used in the heterodyne receiver varies amplification characteristics according to the ambient environment such as temperature and frequency, so that it is additionally nonlinear using a radio analog subsystem (RAS) RAM table. The property must be compensated. Therefore, the complexity of the structure of the receiver is increased.

Accordingly, an object of the present invention is to provide a receiving apparatus and method for reducing the complexity of a circuit by omitting an intermediate frequency and converting a signal received by an antenna into baseband at one time.

It is another object of the present invention to provide a receiving apparatus and method for compensating the amplification gain of an intermediate frequency stage at baseband to cover the dynamic range of a wide range of received signals.

It is still another object of the present invention to provide a receiving apparatus and method for providing an appropriate amplification gain for a signal passed through an analog-to-digital converter at baseband using a digital continuous gain amplifier.

The apparatus for achieving the above object of the present invention, a receiving device of the mobile terminal, amplifies the transmitted radio signal by a specific gain, removes noise from the amplified radio signal to convert to a baseband signal and outputs a radio signal (RF) processing unit, a digital signal processing unit for converting the baseband signal output from the radio signal (RF) processing unit into a digital signal, digitally filtering and outputting the digital signal output from the digital signal processing unit according to a specific amplification gain And an automatic gain control unit for amplifying and adjusting the gain of the digital signal, wherein the automatic gain control unit removes a code bit from a digital signal output from the digital signal processing unit, converts it into a log domain format, and converts the converted signal in advance. After quantizing to the set threshold, the code bit is added. It is gong.

 In addition, a method for achieving the objects of the present invention, in a mobile terminal receiver of a mobile communication system, a method for adjusting a wide operating range of a radio signal transmitted from a transmitter to receive as a signal having a constant reception power level, Amplifying the wireless signal by a specific gain, removing noise from the amplified wireless signal, and converting the converted baseband signal into a baseband signal; and converting the converted baseband signal into a digital signal and digitally filtering the digital signal; Amplifying a digital signal according to a specific amplification gain to adjust a gain of the digital signal, and adjusting the gain of the digital signal is converted to a log domain format by removing a sign bit from the digital filtered digital signal. And converts the converted signal to a preset threshold. After the magnetization, and in that the feature of adding the sign bit.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the following description of the present invention, detailed description of known functions and configurations incorporated herein will be omitted when it may make the subject matter of the present invention rather unclear.

In order to reduce the structure of the receiver hardware, the present invention described below uses a zero IF receiver that omits an intermediate frequency (hereinafter referred to as IF) and converts a signal received by an antenna into baseband at one time. This zero IF receiver uses a digital continuous gain amplifier (DCGA) to adjust the wide operating range of the received wireless signal. The structure of such a zero IF receiver (hereinafter, abbreviated as a receiver) will be described with reference to the accompanying drawings.                     

2 is a block diagram showing the structure of a receiver according to an embodiment of the present invention.

The receiver 100 includes a high frequency signal processor 110 for converting a radio frequency (RF) signal received through the antenna 101 into a baseband signal, and converts the signal converted into the baseband signal into a digital signal. The digital signal processor 120, a compensation unit 130 for compensating the digitally converted signal, and an automatic gain control (AGC) 140 for amplifying the gain of the compensated signal. The receiver 100 includes an interpolator 151 connected to the automatic gain control unit 140 and inputting an amplified signal to a baseband processing unit (not shown).

The wireless signal processor 110 may include a low noise amplifier 111 for amplifying the received radio signal (hereinafter referred to as an RF signal) by a specific gain, and a radio signal (RF) for removing noise from the amplified RF signal. Filter 112 and a frequency mixer 113 for converting the filtered RF signal into a baseband signal.

The digital signal processor 120 includes an analog digital converter (ADC) 121 for converting the baseband signal converted through the frequency mixer 113 into a digital signal, and a signal converted into a digital signal. And a digital filter 122 for removing noise from the analog-to-digital converter 121. We can use baseband I and Q samples with multiple chip rates for baseband processing.

The compensator 130 adjusts the first compensator 131 for compensating for the signal DC filtered by the digital filter 122 and the gain and phase imbalance in the offset-compensated signal. The second compensator 132 is provided. The compensator 130 includes an offset estimator 133 that estimates a DC offset value based on the signal output from the first compensator 131 and inputs the estimated signal back to the offset compensator 131.

The automatic gain controller 140 is a digital continuous gain amplifier (DCGA) 141 for amplifying a signal output from the second compensator 132, that is, a quadrature signal from which DC offset is removed, and energy and gain in the amplified signal. And an amplification gain determiner 142 to determine. The amplification gain determiner 142 provides various amplification gains to the digital continuous gain amplifier 141 through I and Q data of the amplified signal, and also provides the amplification gains to the low noise amplifier 111 and the frequency mixer 113. to provide.

The amplification gain determiner 142 provides discrete amplification gains according to the strength of the RF signal received at the antenna 101 to the low noise amplifier 111 and the frequency mixer 113 to obtain I, Q data of appropriate amplitude. . The amplification gain determiner 142 is a digital continuous gain amplifier 141 which is used to adjust a signal obtained by a part of the overall amplification gain required by the low noise amplifier 111 and the frequency mixer 113 to a specific signal level. Provide benefits. In particular, the amplification gain provided to the digital continuous gain amplifier 141 is applied in consideration of the delay in which the RF input signal is transmitted. In addition, the amplification gain determiner 142 represents the power of the signal in a log domain (dB) format, and the amplification gain required by the low noise amplifier 111, the frequency mixer 113, and the digital continuous gain amplifier 141 is also included. It is in log domain (dB) format. Thus, the amplification gain determiner 142 typically operates at 1 / T dB resolution to perform fine power measurements. The reason why the log domain is expressed is that the received signal has a wide dynamic range, so that the receiver of the mobile terminal calculates the measured power in dB when measuring the received power. Therefore, the amplification gain of the amplifiers of the receiver of the mobile terminal is also expressed in dB.

The digital continuous gain amplifier 141 provides a gain necessary to adjust a part or the entire part of the operating range of the received signal, and performs a gain adjustment function provided in the IF stage of the existing hetero receiver. A detailed structure of the digital continuous gain amplifier 141 will be described with reference to the accompanying drawings.

3 is a block diagram showing the structure of a digital continuous gain amplifier according to an embodiment of the present invention.

As shown in FIG. 3, the digital continuous gain amplifier 141 converts a sign bit extractor 201 for extracting a sign bit, an absolute value calculator 202 for taking an absolute value, and a log domain format. ROM 203, a quantizer 205 for quantizing by a specific amplification gain, and a code bit inserter 206 for inserting a code bit. An adder 204 is connected between the ROM 203 and the quantizer 206 to add an amplified gain value input from the amplified gain determiner 142 to a signal output in a log domain format.

The sign bit extractor 201 is connected to the sign bit inserter 206 and extracts a sign bit from the I and Q data corrected by the second corrector 132 to the sign bit inserter 206. Enter it.

The absolute value calculator 202 receives the corrected I, Q data and performs absolute value calculation to process the log domain. That is, when the input value is negative, the following operation is performed as shown in Equation 1 below. Note that this is a bit inversion of the two complementary signals.

output = (-1) × input-1

The absolute value calculator 202 removes the most significant bit, that is, the sign bit, after the absolute value is calculated. That is, the bit input signal is output as the (N-1) bit signal.

The ROM 203 converts an input signal into a scale, that is, a log domain (dB) form, of the amplification gain determiner 142 to amplify the digital amplification gain calculated by the amplification gain determiner 142. The ROM 203 is implemented as a look-up table, and outputs the input I and Q data in a log domain (dB) value corresponding to a preset look-up table value. The log-domain format (linear-to-dB) conversion through the lookup table is represented by Equation 2 below.

이며, T는 에너지 측정 및 이득 결정 블록의 신호와 입력 신호간의 해상도를 맞추기 위한 값이다. Where x is

T is a value for matching the resolution between the input signal and the signal of the energy measurement and gain determination block.

와 2

사이에 있을 때에는 양자화기의 레벨이 1이 된다. 로그 도메인에서 로그 도메인으로 변환된 임계값과 비교하여 양자화 레벨을 결정하면, 양자화기(205)는 리니어 도메인(linear domain)에서와 동일한 동작을 보이게 된다.The quantizer 205 quantizes the digital continuous gain amplified signal once more. At this time, when the final output is M bits, the sign bits are appended by the sign inserter 206 so that quantization of M-1 bits except the sign bits is performed. The operation and threshold conversion of the quantizer can be represented as shown in FIGS. 4A and 4B, for example, an input signal is

And 2

When in between, the level of the quantizer is one. When the quantization level is determined by comparing the threshold value converted from the log domain to the log domain, the quantizer 205 exhibits the same operation as that in the linear domain.

)은 끊기(truncation) 규칙에 따라 결정된다.The threshold value T of the quantizer 205 is determined as in Equation 3 below, and DEN_VAL (=

) Is determined by the truncation rule.

Where k is 1, 2, ..., 2 ^M-1 , and M is 4, for example, in a code division multiple access system (CDMA).

In the quantizer 205, the comparison between the threshold value and the input signal is performed by M-1 comparison operation using a binary search algorithm. The output signal of the quantizer 205 is input to the sign bit inserter 206 to add the sign bits extracted by the sign bit extractor 201.                     

The operation of the receiver 100 having such a structure will be described in detail according to a signal flow.

The receiver 100 receives a high frequency modulated signal from the transmitter through the antenna 101 and then inputs the low noise amplifier 111. The low noise amplifier 111 then amplifies the received RF signal by a certain gain. At this time, the low noise amplifier 111 amplifies to a predetermined value at the time of initial amplification, and amplifies according to a specific gain of various stages input from the amplification gain determiner 142 from the next amplification. This amplification gain application is similarly applied not only in the low noise amplifier 111 but also in the frequency mixer 113 and the digital continuous gain amplifier 141.

The signal amplified from the low noise amplifier 111 is input to the high frequency filter 112. The high frequency filter 112 then removes noise and spurious signal components from the amplified signal.

The filtered high frequency signal is input to the frequency mixer 113, and the frequency mixer 113 performs quadrature down conversion to convert the filtered RF signal into a baseband signal. The frequency mixer 113 is here implemented to provide several levels of amplification gain, which is then input from the gain determiner 142.

The down-converted baseband I and Q signals are input to the analog-to-digital converter 121. Accordingly, the analog to digital converter 121 converts the baseband analog signal into a digital signal.                     

The digitally converted I and Q signals are input to the digital filter 122 and low pass filtered by the digital filter 122. The I and Q signals passing through the digital filter 122 are input to the first compensator 131 and the DC offset value is removed by the DC offset value estimated by the offset estimator 133. The I and Q signals from which the DC offset value has been removed from the first compensator 131 are input to the second compensator 132 and the gain and phase imbalances of the I and Q balances are adjusted by the second compensator 132. do. The adjusted I and Q signals are input to the digital continuous gain amplifier 141.

The digital continuous gain amplifier 141 amplifies the input I and Q signals according to the amplification gain determined by the gain determiner 142. Detailed operations of the digital continuous gain amplifier 141 will be described with reference to the accompanying drawings.

5 is a flowchart illustrating the operation of a digital continuous gain amplifier according to an embodiment of the present invention.

In step 510, the digital continuous gain amplifier 141 receives the compensated input signal, that is, the I. Q data from the second compensator 132, and in step 511, the sign bit is extracted from the input signal through the sign bit extractor 201. Extract. In step 512, the digital continuous gain amplifier 141 checks whether the sign bit of the input signal is negative. If the sign bit is negative (-), the process proceeds to step 514. If the sign bit is negative, the absolute value calculator 202 applies the equation (1) to take an absolute value in step 513. do. Here, the absolute value calculator 202 performs absolute value calculation even if the sign bit is positive. However, it should be noted that since the input signal does not change even when the absolute signal is taken as the absolute value, only the negative signal is referred to in steps 512 to 513.

In step 514, the digital continuous gain amplifier 141 is input to the absolute value calculator 202 to remove the sign bit of the absolute value input signal.

In step 515, the digital continuous gain amplifier 141 converts the value corresponding to the input signal from which the code bit is removed to the log domain format by corresponding to the value set in the lookup table of the ROM 203. In step 516, the digital continuous gain amplifier 141 adds the amplified gain input from the amplifying gain determiner 142 to the signal converted into the log domain.

In step 517, the digital continuous gain amplifier 141 quantizes the signal to which the amplification gain is added in the quantizer 205 to a preset threshold value T, and in step 518, by the code bit extractor 201 in step 511. The extracted sign bit is pasted again and output to the interpolator 251 as an output signal of the digital continuous gain amplifier.

Then, the interpolator 251 inputs the signal output from the digital continuous gain amplifier 141, that is, the amplified I and Q data, to the baseband processing unit.

Meanwhile, in the detailed description of the present invention, specific embodiments have been described, but various modifications are possible without departing from the scope of the present invention. Therefore, the scope of the present invention should not be limited to the described embodiments, but should be defined not only by the scope of the following claims, but also by the equivalents of the claims.

 As described above, the present invention performs amplification at the IF stage of a conventional receiver using a zero IF receiver of a mobile terminal by performing amplification at the baseband digital stage without adding a new circuit to the RF amplifier. Can be processed in the digital domain to increase reliability and reduce the complexity of the structure.

Claims (11)

In the reception device of a mobile terminal, A radio signal (RF) processor for amplifying the transmitted radio signal by a specific gain, removing noise from the amplified radio signal, and converting the radio signal into a baseband signal; A digital signal processor converting the baseband signal output from the radio signal (RF) processor into a digital signal and digitally filtering and outputting the digital signal; And an automatic gain controller for amplifying the digital signal output from the digital signal processor according to a specific amplification gain and adjusting the gain of the digital signal. The automatic gain control unit may remove a code bit from a digital signal output from the digital signal processor, convert the code bit into a log domain format, quantize the converted signal to a preset threshold value, and then add the code bit. Receiving device. The method of claim 1, And the specific amplification gain is a value for adjusting a gain determined by the gain-adjusted digital signal. The method of claim 1, wherein the automatic gain control unit, A digital continuous gain amplifier for amplifying the digital signal output from the digital signal processor according to a specific amplification gain and adjusting the gain of the digital signal; And an amplification gain determiner for determining a specific amplification gain for amplifying gain adjustment with a digital signal gain-adjusted and output from the digital continuous gain amplifier. The digital continuous gain amplifier of claim 3, A code bit extractor for extracting the code bit from the digital signal output from the digital signal processor; An absolute value calculator for calculating an absolute value of the digital signal and removing the sign bit; A ROM for converting the digital signal output from the absolute value calculator into the log domain format by applying a preset value; A quantizer for adding an amplification gain value to the signal converted into the log domain format and quantizing the signal to the preset threshold value; And a sign bit adder for adding the sign bits to the quantized signal in the quantizer. In the reception device of a mobile terminal, A radio signal (RF) processor for amplifying the transmitted radio signal by a specific gain, removing noise from the amplified radio signal, and converting the radio signal into a baseband signal; A digital signal processor converting the baseband signal output from the radio signal (RF) processor into a digital signal and digitally filtering and outputting the digital signal; A compensator for compensating a DC offset of the digital signal output from the digital signal processor and adjusting an unbalance of gain and phase of the compensated digital signal; An automatic gain controller for amplifying the digital signal output from the compensator according to a specific amplification gain to adjust the gain of the digital signal, The automatic gain control unit may remove a code bit from a digital signal output from the digital signal processor, convert the code bit into a log domain format, quantize the converted signal to a preset threshold value, and then add the code bit. Receiving device. The method of claim 5, And the specific amplification gain is a value for adjusting a gain determined by the gain-adjusted digital signal. The method of claim 5, wherein the automatic gain control unit, A digital continuous gain amplifier for amplifying the digital signal output from the digital signal processor according to a specific amplification gain and adjusting the gain of the digital signal; And an amplification gain determiner for determining a specific amplification gain for amplifying gain adjustment with a digital signal gain-adjusted and output from the digital continuous gain amplifier. The method of claim 7, wherein the digital continuous gain amplifier, A code bit extractor for extracting the code bit from the digital signal output from the digital signal processor; An absolute value calculator for calculating an absolute value of the digital signal and removing the sign bit; A ROM for converting the digital signal output from the absolute value calculator into the log domain format by applying a preset value; A quantizer for adding an amplification gain value to the signal converted into the log domain format and quantizing the signal to the preset threshold value; And a sign bit adder for adding the sign bits to the quantized signal in the quantizer. In a mobile terminal receiver of a mobile communication system, a method for adjusting a wide range of operation of a radio signal transmitted from a transmitter to receive as a signal having a constant received power level, Amplifying the transmitted radio signal by a specific gain, removing noise from the amplified radio signal, and converting the signal into a baseband signal; Digitally converting the converted baseband signal into a digital signal; Amplifying the digital filtered digital signal according to a specific amplification gain to adjust the gain of the digital signal, The step of adjusting the gain of the digital signal is to remove the code bits from the digitally filtered digital signal, convert them into a log domain format, quantize the converted signal to a preset threshold, and then add the code bits. A reception method characterized by the above-mentioned. 10. The method of claim 9, And determining a specific amplification gain for adjusting amplification gain of the digitally filtered digital signal. The method of claim 9, wherein adjusting the gain of the digital signal comprises: Extracting the code bit from the digital filtered digital signal; Calculating the absolute value of the digital signal to remove the sign bit; Converting the digital signal from which the code bit is removed to the log domain format by applying a preset value; Adding an amplification gain value to the signal converted into the log domain format and quantizing the signal to the predetermined threshold value; Adding the sign bit to the quantized signal.

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