KR101004546B1 - Liquid crystal display and manufacturing method thereof - Google Patents

Abstract

Disclosed are a liquid crystal display device and a method of manufacturing the same, which can maintain a constant cell gap between a color filter substrate and an array substrate.

In the liquid crystal display of the present invention, a color filter substrate in which a red color filter, a green color filter, a blue color filter, and a white color filter are arranged in a quad type, and first to fourth pixel electrodes corresponding to the respective color filters are formed. In order to maintain a constant cell gap between the array substrates provided, the gate insulating layer and the protective layer positioned under the first to third pixel electrodes of the array substrate corresponding to the red color filter, the green color filter, and the blue color filter are removed.

Therefore, according to the present invention, the cell gap is fixed by removing the gate insulating film and the protective film positioned below the first to third pixel electrodes corresponding to the red color filter, the green color filter, and the blue color filter during the manufacturing process of the array substrate. Can be maintained to improve image quality.

LCD, Cell Gap, Quad Type, Flattening Film

Description

Liquid crystal display and manufacturing method thereof             

1 is a cross-sectional view showing a conventional quad type liquid crystal display device.

FIG. 2 is a plan view illustrating the color filter shown in FIG. 1. FIG.

3 is a plan view showing the array substrate shown in FIG.

4 is another cross-sectional view showing a conventional quad type liquid crystal display device.

5 is a cross-sectional view illustrating a quad type liquid crystal display device according to an exemplary embodiment of the present invention.

6A to 6G illustrate an array substrate manufacturing process for maintaining a constant cell gap in a quad type liquid crystal display according to an exemplary embodiment of the present invention.

7 is a cross-sectional view illustrating a quad type liquid crystal display according to another exemplary embodiment of the present invention.

<Name of the code for the main part of the drawing>

10 array substrate 13 gate insulating film

19a, 19d: pixel electrode 30: liquid crystal layer

40: color filter substrate 44, 45: color filter                 

47: planarization film

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device and a method of manufacturing the same, which can maintain a constant cell gap between a color filter substrate and an array substrate.

In general, a liquid crystal display device includes liquid crystal molecules oriented between a pair of translucent glass substrates, and electrically controls the alignment state of the liquid crystal molecules to display an image as light is transmitted or blocked.

That is, a liquid crystal display device includes an array substrate in which pixels are arranged in a matrix, a color filter substrate having a color filter formed to correspond to the pixels, and a liquid crystal formed between liquid crystals injected between the array substrate and the color filter substrate. With layers.

Typically, color filters are formed to be arranged on the color filter substrate in a stripe type. Such a stripe-type color filter (R) color filter, G (green) color filter, B (blue) color filter is arranged in sequence, the light is R, G, B color filter A predetermined image is realized by mixing red, green, and blue that are calculated while transmitting the light.

However, there is a limit in implementing white color using only such a stripe-type color filter. That is, although white may be realized by a combination of R, G, and B color filters, luminance is relatively lowered, so that actual white may not be easily displayed.

The quad type color filter structure is proposed to compensate for this drawback. The quad type color filter further includes a W (white) color filter in addition to the R, G, and B color filters. Practically, there is no W color filter, and only the space corresponding to the W color filter is left as an empty margin, so that light (white) can pass through the empty space as it is.

1 is a cross-sectional view illustrating a conventional quad type liquid crystal display device. FIG. 2 is a plan view illustrating the color filter illustrated in FIG. 1. 3 is a plan view illustrating the array substrate illustrated in FIG. 1. 1 is a cross-sectional view taken along line AA ′ of the color filter substrate of FIG. 2.

1 to 3, the conventional quad type liquid crystal display device includes a color filter substrate 140, an array substrate 100, and a liquid crystal layer 130.

The color filter substrate 140 has a black matrix 142 formed at a predetermined interval on the transparent organic substrate 141, and R, G, B, and W color filters between the black matrix 142. 144, 145, 146, and 148 are formed to be adjacent. At this time, each of the R, G, B, W color filters (144, 145, 146, 148) is made of a square, so that the entire R, G, B, W color filters are also made of square. That is, an R color filter 144 is formed, a G color filter 145 is formed adjacent to the R color filter 144, and a B color filter 146 is adjacent to the G color filter 145. The W color filter 148 is formed adjacent to the R color filter 144 and the B color filter 146.

At this time, the R, G, B color filters 144 to 146 are formed by applying R, G, B color pigments having a predetermined thickness (for example, the thickness of the R, G, B color filters). In contrast, the W color filter 148 is formed by leaving it empty without using a color pigment.

In the array substrate 100, pixel areas are defined by intersections of data lines 111a and gate lines 102a, and thin film transistors (TFTs) are formed at the intersections thereof. A thin electrode 118a is formed and is connected to the thin film transistor 118 in the pixel region defined by the data line 111a and the gate line 102a. To 117d) are arranged in a matrix form. Therefore, each pixel electrode 117a to 117d corresponds to the R, G, B, and W color filters 144, 145, 146, and 148 provided on the color filter substrate 140. For example, the first pixel electrode 117a corresponds to the R color filter 144, the second pixel electrode 117b corresponds to the G color filter 145, and the third color filter 117c corresponds to the B color. The fourth color filter 117d may correspond to the W color filter 148, respectively.

The thin film transistor 118 is connected to the gate electrode 102b connected to the gate line 102a, the source electrode 111b connected to the data line 111a, and the pixel electrodes 117a to 117d. It includes a drain electrode (111c).

The gate line 102a is disposed in parallel to the horizontal direction of the pixel electrodes 117a to 117d, and the data line 111a is disposed perpendicular to the gate line 102a.

An active layer 110 is formed on the gate electrode 102b adjacent to the intersection of the gate line 102a and the data line 111a in the form of a channel, and the data line 111a is formed. Source electrode 111b and drain electrode 111c formed together when forming the data line 111a are replaced so as to overlap the active layer 110 by a predetermined portion to form a thin film transistor 118. Doing.

In the pixel region defined by the gate line 102a and the data line 111a, pixel electrodes 117a to 117d made of a transparent metal such as ITO are disposed, and the pixel electrodes 117a to 117d are formed through contact holes. In addition to being bonded to the drain electrode 111c, the pixel electrode is disposed over the entire pixel area with an interval of about 3 to 5 μm from the data line 111a and the gate line 102a.

The data line 111a supplies the data signal to the source electrode 111b, and the gate line 102a is formed to cross the data line 111a to supply the gate signal to the gate electrode 102b. At this time, the gate signal supplied from the gate line 102a is applied to the gate electrode 102b so that the data signal is supplied to the drain electrode 111c. That is, the gate electrode 102b switches the data signal in response to the gate signal.

In this manner, the data signal supplied to the drain electrode 111c is applied to the pixel electrodes 117a to 117d to control the amount of light transmitted.

Hereinafter, the structure of the thin film transistor will be described in more detail.

The thin film transistor 118 is formed on the transparent glass substrate 101 and has a gate electrode 102b to which a gate signal is applied, an active layer 110 provided to supply a data signal in response to the gate signal, and an active layer. A gate insulator 103 that electrically isolates the gate electrode 102b from the gate electrode 102b, and is formed on both sides of the active layer 110 to apply a data signal to the pixel electrodes 117a to 117d. The protective layer 113 formed to protect the source electrode 111b and the drain electrode 111c, the source electrode 111b and the drain electrode 111c, and the pixel electrodes 117a to 117d connected to the drain electrode 111c. It consists of. In this case, the source electrode 111b and the drain electrode 111c are simultaneously formed when the data line 111a is formed. Herein, an organic film or an inorganic film may be used as the passivation layer 113. In this case, in general, an inorganic film material is used to form a thin thickness of the protective film 113, an organic film material is used to form a thick thickness. In other words, if the thickness of the protective film 113 is made of a thick inorganic material, since the glass substrate 101 may be broken by stress, the inorganic film may be used to form a thin thickness of the protective film 113. do.

The active layer 110 is a semiconductor layer 105 formed by depositing amorphous silicon (a-Si) and n + amorphous doped with impurities such as phosphorus (P) on both sides of the semiconductor layer 105. It is composed of an ohmic contact layer 107 formed by depositing silicon (n + a-Si).

In the quad type liquid crystal display device configured as described above, the R, G, and B color filters 144 to 146 are formed by coating color pigments to have thicknesses of the R, G, and B color filters, whereas the W color filter 148 is It is formed by emptying the color pigments without using them.

Accordingly, a step d1 equal to the thickness of the R, G, and B color filters is generated between the R, G, and B color filters 144 to 146 and the W color filter 148. At this time, the step (d1) is usually about 1 to 3㎛.

In contrast, in the pixel region corresponding to the R, G, B, and W color filters 144, 145, 146, and 148 in the array substrate 100, the pixel electrodes 117a to 117d, the passivation layer 113, and the gate insulating layer ( 103 is formed with a uniform thickness. Therefore, no step occurs on the array substrate 100.

Therefore, a step is not generated in the array substrate 100, whereas a step d1 is generated between the R, G, and B color filters 144 to 146 and the W color filter 148 of the color filter substrate 140. As a result, a difference occurs in the cell gap. That is, the cell gap W2 between the W color filter 148 and the fourth pixel electrode 117d corresponding thereto is the R, G, and B color filters 144 to 146 and the first to third pixel electrodes corresponding thereto. The cell gap W1 between 117a and 117c is larger than the cell gap W1 so that the cell gap is changed for each pixel, thereby changing the transmittance characteristic according to the voltage applied to the pixel.                         

Thus, when the image is displayed as the cell gap is not kept constant, the transmittance difference occurring between the R, G, and B color filters 144 to 146 and the W color filter 148 is R, G, and B color filters. There is a problem that the image quality is degraded by causing color abnormality due to the characteristics of the (144 to 146) and the W color filter 148 is represented by one pixel.

Accordingly, to reduce the step d1 between the R, G, and B color filters 144 to 146 and the W color filter 148, the R, G, B, and W color filters 144, 145, 146, and 148 are disposed on the color filters 144, 145, 146, and 148. A structure in which an overcoat layer 149 is formed on is shown in FIG. 4.

4 is another cross-sectional view of a conventional quad type liquid crystal display device.

As shown in FIG. 4, a transparent planarization film 149 is formed over the entirety of the R, G, B, and W color filters 144, 145, 146, and 148 arranged on the color filter substrate 140.

That is, when the planarization film 149 is applied onto the R, G, B, and W color filters 144, 145, 146, and 148, the planarization having a predetermined thickness on the R, G, B, and W color filters is performed. A film 149 is formed. In this case, since the W color filter 148 is present as an empty space, the planarization film fills the empty space. Therefore, a step is generated between the planarization film formed on the R, G, and B color filters 144, 145, and 146 and the planarization film formed on the W color filter 148.

Accordingly, the level difference d2 between the planarization film formed on the R, G, and B color filters 144, 145, and 146 and the planarization film formed on the W color filter 148 forms a planarization film as illustrated in FIG. 1. It can be reduced much more than the step (d1) without doing it. At this time, the step (d2) has a thickness of about several thousand kPa ~ 1㎛.

However, even if the planarization film is formed on the R, G, B, and W color filters in this way, a predetermined step (thousands of micrometers to 1 μm) still exists, and accordingly, a cell gap difference exists in units of pixels (W3 ≠ W4). ) There is a possibility of occurrence of deterioration in image quality.

Accordingly, the present invention has been made to solve the above problems, and the liquid crystal display which can improve the image quality by changing the structure of each pixel area corresponding to the R, G, B color filters to maintain a constant cell gap It is an object of the present invention to provide an apparatus and a method of manufacturing the same.

According to a first preferred embodiment of the present invention for achieving the above object, a liquid crystal display device is composed of a color filter substrate, an array substrate and a liquid crystal layer, the color filter substrate on a first glass substrate formed with a black matrix And a red color filter, a green color filter, a blue color filter, and a white color filter arranged adjacent to each other in a quad type. The array substrate includes: the red color filter on a second glass substrate having a gate insulating film and a protective film; First to fourth pixel electrodes formed to correspond to the green color filter, the blue color filter, and the white color filter, respectively; A thin film transistor connected to the pixel electrode; And a gate line and a data line connected to the thin film transistor so as to vertically intersect in a first direction and a second direction, and between the red color filter, the green color filter, and the blue color filter and the white color filter. The gate insulating layer and the protective layer under the first to third pixel electrodes respectively corresponding to the red color filter, the green color filter, and the blue color filter may be removed to compensate for the step difference.

According to the liquid crystal display, the color filter substrate includes the red color filter, the green color filter, the blue color filter, and the white color to reduce the step between the red color filter, the green color filter, and the blue color filter and the white color filter. A planarization film formed on the filter may be further provided.

According to a second preferred embodiment of the present invention, a color filter substrate, an array substrate, and a liquid crystal layer are formed, and in the color filter substrate, a red color filter, a green color filter, a blue color filter, and a white color filter are arranged adjacently in a quad type. A color filter is provided, and a liquid crystal display for maintaining a constant cell gap between the color filter substrate and the array substrate when a step occurs between the red color filter, the green color filter, and the blue color filter and the white color filter. A method of manufacturing a device includes depositing and etching a metal film on a glass substrate to form a gate line, a gate electrode, and a gate pad; Forming a active layer by coating a gate insulating film on the glass substrate on which the gate line, the gate electrode, and the gate pad are formed, and then applying and etching an amorphous silicon film and a doped amorphous silicon film; Depositing and etching a source / drain metal layer on the glass substrate on which the active layer is formed to form a source / drain electrode and a data line; Forming a contact hole on the drain electrode by coating and etching a protective film on the glass substrate on which the source / drain electrode, the data line, and the data pad are formed, and corresponding to the red color filter, the green color filter, and the blue color filter. Removing the gate insulating film and the protective film at the position; And depositing and etching a transparent metal layer on the glass substrate on which the passivation layer is formed to form first to fourth pixel electrodes to correspond to the red color filter, the green color filter, the blue color filter, and the white color filter.

Hereinafter, with reference to the accompanying drawings will be described an embodiment of the present invention.

5 is a cross-sectional view illustrating a quad type liquid crystal display according to an exemplary embodiment of the present invention.

Referring to FIG. 5, the quad type liquid crystal display device of the present invention includes a color filter substrate 40, an array substrate 10, and a liquid crystal layer 30.

The color filter substrate 40 has black matrices 42 formed on the transparent organic substrate 41 at predetermined intervals, and R, G, B, and W color filters 44 and 45 are formed between the black matrices 42. Is formed to be adjacent. At this time, each of the R, G, B, W color filters (44, 45) is made of a square, so that the entire R, G, B, W color filters are also made of a square. That is, an R color filter 44 is formed, a G color filter is formed adjacent to the R color filter 44, a B color filter is formed adjacent to the G color filter, and the R color filter 44 is formed. And a W color filter 45 adjacent to the B color filter. Here, although the G and B color filters are not shown because FIG. 5 is shown in a cross-sectional view, since the G and B color filters have a predetermined thickness like the R color filters, for convenience, all of them are incorporated into reference numeral 44. It will not greatly compromise the present invention.

In this case, the R, G, B color filters 44 are formed by applying R, G, B color pigments so as to have the thickness of the R, G, B color filters, respectively, W color filter 45 It is formed by emptying the color pigments without using them.

Therefore, a step d1 equal to the thickness of the R, G, and B color filters occurs between the R, G, and B color filters 44 and the W color filter 45. At this time, the step (d1) is usually about 1 to 3㎛.

In the array substrate 10, a pixel area is defined by an intersection of a data line and a gate line, and a thin film transistor is formed at an intersection thereof, and the array substrate 10 is defined by the data line and the gate line. In the pixel region, pixel electrodes 19a and 19d connected to the thin film transistor are arranged in a matrix form. Accordingly, each of the pixel electrodes 19a and 19d may be formed of first to fourth pixel electrodes corresponding to the R, G, B, and W color filters 44 and 45 provided on the color filter substrate 40. have. Here, the first to third pixel electrodes are denoted by reference numeral 19a, and the fourth pixel electrode is denoted by reference numeral 19d.

The thin film transistor includes a gate electrode 12 connected to a gate line, a source electrode 17b connected to a data line, and a drain electrode 17c connected to the pixel electrodes 19a and 19d.

An active layer 16 is formed in the form of a channel on the gate electrode 12 adjacent to the intersection of the gate line and the data line, and together with the source electrode 17b drawn out from the data line when the data line is formed. The formed drain electrode 17c is replaced with the active layer 16 so as to overlap a predetermined portion to form a thin film transistor.

In the pixel region defined by the gate line and the data line, pixel electrodes 19a and 19d made of a transparent metal such as ITO are disposed, and the pixel electrodes 19a and 19d are connected to the drain electrode 17c through a contact hole. As well as being bonded, they are disposed over the entire pixel area at intervals of about 3 to 5 탆 from the data lines and the gate lines.

In this case, the first pixel electrode 19a corresponding to the R color filter 44 is formed on the transparent glass substrate 11, and the fourth pixel electrode 19d corresponding to the W color filter 45 is formed of the glass. The gate insulating layer 13 and the passivation layer 18 formed on the substrate 11 are formed on the substrate 11. Here, the protective film 18 is preferably formed of an organic film material. That is, between the R, G, B color filter 44 and the W color filter 45, a large step d1 is generated, which is as large as the thickness of the R, G, B color filter, which is about 1 to 3 μm. In order to compensate for a large step, it is preferable that the protective film 18 is formed using an organic film material that can be formed thick. Accordingly, the gate insulating film 13 and the passivation layer having a width substantially equal to the step d1 that is as large as the R, G, and B color filter thicknesses formed under the first pixel electrode 19a corresponding to the R color filter 44. By removing (18), the cell gap can be kept constant.

Although not shown in FIG. 5, second and third pixel electrodes corresponding to G and B color filters are also formed on the glass substrate 11.                     

The manufacturing method for this will be described later in detail.

The first to third pixel electrodes 19a are directly formed on the glass substrate 11, whereas the four pixel electrodes 19d are formed on the glass substrate 11 and the gate insulating layer 13 and the passivation layer 18. Is formed on the upper side of the top surface), a level difference between the gate insulating film 13 and the passivation film 18 is generated between them. That is, the fourth pixel electrode 19d is formed higher than the first to third pixel electrodes 19a by the thickness of the gate insulating film 13 and the passivation film 18.

At this time, the thickness of the gate insulating film 13 and the passivation film 18 is preferably the same as the thickness of the R, G, B color filters 44 as possible.

Accordingly, in the color filter substrate 40, the R, G, and B color filters 44 are formed to be higher than the W color filters 45 by the thickness of the R, G, and B color filters, whereas the array substrate 10 ), The first to third pixel electrodes 19a corresponding to the R, G, and B color filters 44 have the thickness of the gate insulating layer 13 and the passivation layer 18 compared to the fourth pixel electrode 19d. It is formed lower.

Therefore, the cell gap W1 between the R, G, and B color filters 44 and the first to third pixel electrodes 19a corresponding thereto, and the fourth pixel electrode corresponding to the W color filter 45 and the corresponding W color filters 45 ( Since the cell gaps W2 between 19d are substantially the same, a constant cell gap can be maintained to improve image quality.

Here, reference numeral 14 denotes a semiconductor layer formed by depositing amorphous silicon (a-Si), and reference numeral 15 denotes n + amorphous silicon doped with impurities such as phosphorus (P) on both sides of the semiconductor layer. An ohmic contact layer formed by depositing (n + a-Si) is shown.

6A to 6G illustrate an array substrate manufacturing process for maintaining a constant cell gap in a quad type liquid crystal display according to an exemplary embodiment of the present invention.

First, as shown in FIG. 6A, a Mo / AlNd metal is deposited on a transparent glass substrate 11 and etched to form a gate line, a gate electrode 12, and a gate pad simultaneously.

After the gate line, the gate electrode 12 and the gate pad are formed, as shown in FIG. 6B, the gate insulating film 13 is applied over the entire area of the glass substrate 11.

6C, an amorphous silicon film and a doped amorphous silicon film are sequentially applied over the entire area of the glass substrate 11 to which the gate insulating film 13 is coated, and then etched to etch the active layer 16. To form.

As shown in FIG. 6D, a source / drain metal film is deposited over the entire area of the glass substrate 11 on which the active layer 16 is formed, and then etched so as to source / drain electrodes 17b and 17c and data. Lines and data pads are formed. Thereafter, the doped amorphous silicon film is etched using the source / drain electrodes as a mask to form a thin film transistor.

As shown in Fig. 6E, the protective film 18 is applied over the entire area of the glass substrate 11 on which the source / drain electrodes 17b and 17c, the data line, and the data pad are formed.

Next, as shown in FIG. 6F, the protective film 18 is etched to form a contact hole 20 on the drain electrode 17c, the gate pad, and the data pad. As a result, the gate pad and the data pad are in the pad open so as to be in contact with the ITO metal film. In this case, since the protective film 18 is generally formed through a coating process using an organic film material, the protective film 18 is formed thicker than an inorganic film material deposited by using a sputter or CVD, and has a flow characteristic. It has the effect of reducing the lower shortwave.

At the same time as the contact hole 20 is formed, the protective layer 18 corresponding to the R, G, and B color filters arranged on the color filter substrate is etched and removed. In addition, the gate insulating layer 13 corresponding to the R, G, and B color filters arranged on the color filter substrate is removed once more by etching. At this time, the gate insulating film 13 and the protective film 18 corresponding to the W color filter are not removed.

Therefore, the gate insulating film 13 and the protective film 18 corresponding to the R, G, and B color filters are removed.

Finally, as shown in FIG. 6G, an ITO metal film is deposited over the entire region of the glass substrate 11 on which the source / drain electrodes 17b and 17c are formed, and then etched to form the R, G, B, and W colors. First to fourth pixel electrodes 19a and 19d corresponding to the filter are formed. In this case, the first to fourth pixel electrodes 19a and 19d are electrically contacted with the drain electrode 17c through the contact hole 20 formed on the drain electrode 17c, and the pad of the gate pad and the data pad is opened. Contact pads made of an ITO metal film are formed in the insulated regions, and are in electrical contact with the gate pad and the data pad, respectively.

In this case, the first to third pixel electrodes 19a are formed on the glass substrate 11 as the gate insulating layer 13 and the passivation layer 18 are removed, and the fourth pixel electrode 19d is formed on the gate insulating layer. (13) and the protective film 18 are formed on the protective film 18 as they are present without being removed.

As such, the gate insulating layers 13 and 18 and the passivation layer 18 corresponding to the R, G, and B color filters are removed, while the gate insulating layer 13 and the passivation layer 18 corresponding to the W color filter are removed. Therefore, the gate insulating layer 13 and the passivation layer may be disposed between the first to third pixel electrodes 19a corresponding to the R, G, B, and color filters and the fourth pixel electrode 19d corresponding to the W color filter. The step difference by the thickness of (18) occurs.

At this time, the thickness of the gate insulating film and the protective film is preferably the same as the thickness of the R, G, B color filters.

Accordingly, the first color corresponding to the R, G and B color filters in the array substrate is that the R, G and B color filters are formed higher by the thickness of the R, G and B color filters than the W color filters in the color filter substrate. The thickness of the gate insulating layer 13 and the passivation layer 18 is substantially the same as that of the R, G, and B color filters, compared to the fourth pixel electrode 19d corresponding to the W color filter. By forming it as low as possible, the cell gap is compensated, and as a result, the cell gap on the color filter substrate and the array substrate is kept constant so that image quality may be improved.

7 is a cross-sectional view illustrating a quad type liquid crystal display according to another exemplary embodiment of the present invention.

The structure of the liquid crystal display of FIG. 7 is the same as that of the liquid crystal display of FIG. 5 except for the planarization film.

As already described, the R, G, B, W colors to reduce the step (d1) between the R, G, B color filter 44 and the W color filter 45 arranged on the color filter substrate 40 The planarization film 47 is formed over the entire area of the color filter substrate 40 on which the filters 44 and 45 are arranged.

That is, when the planarization film 47 is applied to the R, G, B, and W color filters 44 and 45, the R, G, B, and W color filters 44 and 45 have a predetermined thickness. The planarization film is formed. At this time, since the W color filter 45 is present as an empty space, the planarization film fills the empty space. Therefore, a step is generated between the planarization film formed on the R, G, and B color filters 44 and the planarization film formed on the W color filter 45.

Accordingly, the step d2 between the planarization film formed on the R, G, and B color filters and the planarization film formed on the W color filter is a step d1 between the R, G, B color filters, and the W color filter. Can be much less than At this time, the step (d2) has a thickness of about several thousand kPa ~ 1㎛.

In addition, the gate insulating layer 13 and the protective layer 18 corresponding to the R, G, and B color filters 44 are removed from the array substrate 10, and the gate insulating layer corresponding to the W color filter 45 is removed. 13 and the protective film 18 are formed so as not to be removed, so that the first to third pixel electrodes 19a corresponding to the R, G, B, and color filters 44 and the W color filter 45 are formed. A level difference between the fourth pixel electrode 19d and the gate insulating film 13 and the passivation film 18 is generated. Here, the protective film 18 is preferably formed as thin as possible using an inorganic film material. That is, when the planarization film 47 is formed on the color filter substrate 40, the level difference d2 between the planarization film formed on the R, G, and B color filters and the planarization film formed on the W color filter is approximately several thousand. The thickness of the gate insulating film 13 and the protective film 18 should be adjusted to be very narrow, such that the thickness of the gate insulating film 13 and the protective film 18 is almost the same as the step d2. As thin as possible.

At this time, the thickness of the gate insulating film and the protective film is preferably approximately the same as the step between the planarization film.

Therefore, in order to compensate the step d2 between the planarization film formed on the R, G, and B color filters 44 and the planarization film formed on the W color filter 45 in the color filter substrate 40, By removing the gate insulating layer 13 and the passivation layer 18 under the first to third pixel electrodes 19a corresponding to the B color filter 44, the cell gap is compensated and the color filter substrate 40 is eventually formed. Since the cell gap on the array substrate 10 is kept constant, the image quality may be improved.

In other words, in order to compensate that the planarization film formed on the R, G, and B color filters 44 is formed higher by a step d2 than the planarization film formed on the W color filter 45, the R and G And a fourth layer corresponding to the W color filter 45 by removing the gate insulating layer 13 and the protective layer 18 under the first to third pixel electrodes 19a corresponding to the B color filter 44. The first to third pixel electrodes 19a corresponding to the R, G, and B color filters 44 are formed lower than the pixel electrode 19d by the gate insulating layer and the passivation layer.                     

Accordingly, the cell gap W3 between the R, G, and B color filters 44 and the first to third pixel electrodes 19a corresponding thereto, and the fourth pixel electrode corresponding to the W color filter 45 and the corresponding W color filters 45. Since the cell gaps W4 between 19d are substantially the same, a constant cell gap can be maintained and image quality can be improved.

As a result, when the planarization film is not formed, the thicknesses of the gate insulating film and the protective film are formed to be substantially the same as the level difference between the R, G, and B color filters and the W color filter. Since the gap between the planarization film formed on the R, G, and B color filters and the planarization film formed on the W color filter is almost equal, the cell gap between the array substrate and the color filter substrate can be kept constant. Image quality can be improved.

In the above description, when the leveling occurs largely because no flattening film is formed, a protective film is formed using an organic film material, and when the leveling occurs small because the flattening film is formed, a protective film is formed using an inorganic film material. Done. However, it does not necessarily have to be like this. That is, if necessary, the thickness of the protective film may be adjusted by appropriately combining the organic film material and the inorganic film material.

As described above, the cell gap between the color filter substrate and the array substrate is constantly maintained by removing the gate insulating layer and the protective layer positioned under the first to third pixel electrodes corresponding to the R, G, and B color filters. To improve the picture quality.

Claims (8)

In a liquid crystal display device comprising a color filter substrate, an array substrate, and a liquid crystal layer, The color filter substrate includes a color filter in which a red color filter, a green color filter, a blue color filter, and a white color filter are arranged adjacent to each other in a quad type on a first glass substrate on which a black matrix is formed. The array substrate, A first pixel electrode formed to correspond to the red color filter, a second pixel electrode formed to correspond to the green color filter, and a third pixel electrode formed to correspond to the blue color filter on a second glass substrate having a gate insulating film and a protective film formed thereon And a fourth pixel electrode formed to correspond to the white color filter. A thin film transistor connected to the pixel electrodes; And A gate line and a data line connected to the thin film transistor and arranged to vertically intersect in a first direction and a second direction; The first pixel electrode, the first pixel electrode to compensate for the step between the red color filter, the green color filter, and the blue color filter and the white color filter to maintain a constant cell gap between the color filter substrate and the array substrate. And the gate insulating film and the protective film disposed under the second pixel electrode and the third pixel electrode are removed. The method of claim 1, wherein the step between the red color filter and the white color filter is the thickness of the red color filter, the step between the green color filter and the white color filter is the thickness of the green color filter, the blue And the step between the color filter and the white color filter is the thickness of the blue color filter. The liquid crystal display device of claim 1, wherein the passivation layer is formed of an organic layer material. The color filter substrate of claim 1, wherein the color filter substrate includes the red color filter, the green color filter, the blue color filter, and the white color filter to reduce a step between the red color filter, the green color filter, and the blue color filter and the white color filter. And a flattening film formed on the liquid crystal display device. 5. The liquid crystal display of claim 4, wherein when the planarization layer is further provided, the passivation layer is formed of an inorganic layer material. It consists of a color filter substrate, an array substrate and a liquid crystal layer, The color filter substrate includes a color filter in which a red color filter, a green color filter, a blue color filter, and a white color filter are adjacently arranged in a quad type. A method of manufacturing a liquid crystal display device for maintaining a constant cell gap between the color filter substrate and the array substrate when a step occurs between the red color filter, the green color filter, and the blue color filter and the white color filter. , Depositing and etching a metal film on the glass substrate to form a gate line, a gate electrode, and a gate pad; Forming a active layer by coating a gate insulating film on the glass substrate on which the gate line, the gate electrode, and the gate pad are formed, and then applying and etching an amorphous silicon film and a doped amorphous silicon film; Depositing and etching a source / drain metal layer on the glass substrate on which the active layer is formed to form a source / drain electrode and a data line; A protective layer is coated and etched on the glass substrate on which the source / drain electrodes, the data lines, and the data pads are formed to form a contact hole on the drain electrode, while maintaining a constant cell gap between the color filter substrate and the array substrate. Removing the gate insulating layer and the passivation layer at positions corresponding to the red color filter, the green color filter, and the blue color filter; And Depositing and etching a transparent metal film on the glass substrate on which the passivation layer is formed, a first pixel electrode corresponding to the red color filter, a second pixel electrode corresponding to the green color filter, and a third pixel electrode corresponding to the blue color filter And forming a fourth pixel electrode corresponding to the white color filter. The color filter substrate of claim 6, wherein the color filter substrate includes the red color filter, the green color filter, the blue color filter, and the white color filter to reduce a step between the red color filter, the green color filter, and the blue color filter and the white color filter. A flattening film formed on the substrate is formed. The liquid crystal display of claim 7, wherein the first pixel electrode, the second pixel electrode, and the third pixel electrode are formed on the glass substrate, and the fourth pixel electrode is formed on the passivation layer. Manufacturing method.

Images