KR100997274B1 - 양자 구조에서의 전자 스핀 제어 - Google Patents
양자 구조에서의 전자 스핀 제어 Download PDFInfo
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- KR100997274B1 KR100997274B1 KR1020080083221A KR20080083221A KR100997274B1 KR 100997274 B1 KR100997274 B1 KR 100997274B1 KR 1020080083221 A KR1020080083221 A KR 1020080083221A KR 20080083221 A KR20080083221 A KR 20080083221A KR 100997274 B1 KR100997274 B1 KR 100997274B1
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- quantum
- nanocoil
- electron spin
- magnetic field
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- 238000000034 method Methods 0.000 claims abstract description 23
- 239000002096 quantum dot Substances 0.000 claims description 11
- RPQDHPTXJYYUPQ-UHFFFAOYSA-N indium arsenide Chemical class [In]#[As] RPQDHPTXJYYUPQ-UHFFFAOYSA-N 0.000 claims description 7
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 4
- 229910000673 Indium arsenide Inorganic materials 0.000 claims description 4
- 239000002061 nanopillar Substances 0.000 claims description 3
- 238000002474 experimental method Methods 0.000 description 3
- 230000010365 information processing Effects 0.000 description 3
- 238000011160 research Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 239000013598 vector Substances 0.000 description 2
- 230000005674 electromagnetic induction Effects 0.000 description 1
- 230000001939 inductive effect Effects 0.000 description 1
- 239000000696 magnetic material Substances 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 239000002086 nanomaterial Substances 0.000 description 1
- 230000005233 quantum mechanics related processes and functions Effects 0.000 description 1
- 238000001878 scanning electron micrograph Methods 0.000 description 1
- 230000036962 time dependent Effects 0.000 description 1
- 230000005428 wave function Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66439—Unipolar field-effect transistors with a one- or zero-dimensional channel, e.g. quantum wire FET, in-plane gate transistor [IPG], single electron transistor [SET], striped channel transistor, Coulomb blockade transistor
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82B—NANOSTRUCTURES FORMED BY MANIPULATION OF INDIVIDUAL ATOMS, MOLECULES, OR LIMITED COLLECTIONS OF ATOMS OR MOLECULES AS DISCRETE UNITS; MANUFACTURE OR TREATMENT THEREOF
- B82B3/00—Manufacture or treatment of nanostructures by manipulation of individual atoms or molecules, or limited collections of atoms or molecules as discrete units
- B82B3/0009—Forming specific nanostructures
- B82B3/0038—Manufacturing processes for forming specific nanostructures not provided for in groups B82B3/0014 - B82B3/0033
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06G—ANALOGUE COMPUTERS
- G06G7/00—Devices in which the computing operation is performed by varying electric or magnetic quantities
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/122—Single quantum well structures
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Chemical & Material Sciences (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Nanotechnology (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Crystallography & Structural Chemistry (AREA)
- Mathematical Physics (AREA)
- Hall/Mr Elements (AREA)
Abstract
Description
Claims (15)
- 양자 구조의 전자 스핀을 제어하기 위한 장치로서,하나 이상의 양자 구조;상기 하나 이상의 양자 구조의 둘레에 위치하여 자기장을 형성하는 나노 코일;상기 나노 코일에 전류를 인가하기 위한 회로부를 포함하는 장치.
- 제1항에 있어서,상기 나노 코일에서 발생하는 자기장은 상기 회로부로부터 상기 나노 코일에 인가되는 전류의 크기 및 주파수 중 적어도 하나를 제어함으로써 조절되는 것인 장치.
- 제1항에 있어서,상기 양자 구조는 양자 점(quantum dot)을 포함하는 것인 장치.
- 제1항에 있어서,상기 양자 구조는 게이트 전위로 규정되는 양자 점(gate voltage defined quantum dot)을 포함하는 것인 장치.
- 제1항에 있어서,상기 양자 구조는 GaAs와 InAs를 번갈아 쌓음으로써 InAs 양자 점들을 수직으로 배열하는 적층 구조인 나노 필러(nano pillar) 구조를 포함하는 것인 장치.
- 제1항 내지 제5항 중 어느 한 항에 있어서,상기 양자 구조의 상부에 배치되는 전극을 더 포함하는 장치.
- 제1항 내지 제5항 중 어느 한 항에 있어서,상기 나노 코일은 상기 하나 이상의 양자 구조의 전자 스핀을 독립적으로 제어하도록 배열되는 것인 장치.
- 제1항 내지 제5항 중 어느 한 항에 있어서,상기 나노 코일은 상기 하나 이상의 양자 구조의 전자 스핀을 동시에 제어하도록 배열되는 것인 장치.
- 양자 구조의 전자 스핀을 제어하기 위한 방법으로서, 상기 양자 구조는 하나 이상이고 이 하나 이상의 양자 구조의 둘레에 나노 코일이 위치하며, 상기 방법은,상기 나노 코일에 전류를 인가하는 공정; 및상기 나노 코일에 인가되는 전류의 크기 및 주파수 중 적어도 하나를 제어하 는 공정을 포함하는 방법.
- 제9항에 있어서,상기 양자 구조는 양자 점(quantum dot)을 포함하는 것인 방법.
- 제9항에 있어서,상기 양자 구조는 게이트 전위로 규정되는 양자 점(gate voltage defined quantum dot)을 포함하는 것인 방법.
- 제9항에 있어서,상기 양자 구조는 GaAs와 InAs를 번갈아 쌓음으로써 InAs 양자 점들을 수직으로 배열하는 적층 구조인 나노 필러(nano pillar) 구조를 포함하는 것인 방법.
- 제9항 내지 제12항 중 어느 한 항에 있어서,상기 양자 구조의 상부에는 전극이 배치되는 것인 방법.
- 제9항 내지 제12항 중 어느 한 항에 있어서,상기 나노 코일은 상기 하나 이상의 양자 구조의 전자 스핀을 독립적으로 제어하도록 배열되는 것인 방법.
- 제9항 내지 제12항 중 어느 한 항에 있어서,상기 나노 코일은 상기 하나 이상의 양자 구조의 전자 스핀을 동시에 제어하도록 배열되는 것인 방법.
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KR100997274B1 true KR100997274B1 (ko) | 2010-11-29 |
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Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004247431A (ja) | 2003-02-12 | 2004-09-02 | Fujitsu Ltd | 量子半導体装置及びその製造方法 |
JP2004260078A (ja) | 2003-02-27 | 2004-09-16 | Fujitsu Ltd | 量子半導体装置及びその製造方法 |
KR100621304B1 (ko) | 2003-02-07 | 2006-09-13 | 대한민국(충북대학교 나노과학기술연구소) | 단일전자 스핀제어 나노소자 |
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Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
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KR100621304B1 (ko) | 2003-02-07 | 2006-09-13 | 대한민국(충북대학교 나노과학기술연구소) | 단일전자 스핀제어 나노소자 |
JP2004247431A (ja) | 2003-02-12 | 2004-09-02 | Fujitsu Ltd | 量子半導体装置及びその製造方法 |
JP2004260078A (ja) | 2003-02-27 | 2004-09-16 | Fujitsu Ltd | 量子半導体装置及びその製造方法 |
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