KR100972163B1 - Driving current supplying method - Google Patents

Abstract

PURPOSE: A driving output current supplying method is provided to reduce the generation of EMI(Electromagnetic Interference) while offering fast switching by adjusting the switching property by changing the current supplying capacity of a gate driver. CONSTITUTION: An output terminal(400) of a plurality of output buffers(402, 404, 406, 408) is parallel connected. A driving control part(410) drives each output buffer. One of the plurality of output buffers is driven. The rest of the output buffers are consecutively driven. The output terminal combines the output buffer driven in advance and the driving output current of the output buffer.

Description

Driving current supplying method {Driving current supplying method}

The present invention relates to a driving output current supply method for a switching element. More specifically, by adjusting the switching characteristics without using a separate circuit such as a resistor, the driving output current supply method that can reduce the occurrence of EMI (Electro Magnetic Interference) while at the same time fast switching, and at the same time can reduce the switching loss It is about.

In general, display devices such as a liquid crystal display (LCD) and an organic light emitting diode (OLED) include a display panel in which pixels are arranged in a matrix. In this case, each pixel of the display panel is controlled by a switching device such as a thin film transistor (TFT), a metal oxide semiconductor field effect transistor (MOSFET), and the like, which drives the switching device.

1 is a diagram schematically illustrating a structure of a general gate driver for driving a switching device.

Referring to the drawings, the gate driver 100 generally includes an input buffer 102 and an output buffer 104. The input buffer 102 is composed of an inverting circuit (non-inverting circuit depending on the product) for operating the output buffer 104, and the output buffer 104 drives the switching element 106.

In this case, the gate driver 100 selects the supply capacity of the output current according to the size of the power switching element 106 for the switching operation. If the output current supply capacity of the gate driver 100 for driving the switching element 106 is not appropriate, the switching characteristics of the switching element 106 are not well achieved.

FIG. 2 is a diagram illustrating the operation of the gate driver of FIG. 1 and illustrates a case connected to a MOSFET.

When the voltage output by the output buffer 104 of the gate driver 100 is high (for example, 10 V), the voltage V _GS between the gate and the source of the MOSFET indicates that the output current of the driver is the resistance R _{G, int.} Since the capacitors C _GS and C _GD are charged through, the drain current I _D does not flow until the voltage V _GS reaches the threshold voltage V _TH of the MOSFET as shown in FIG. 3 (section 0 to t1). Thereafter, the voltage V _GS between the gate and the source increases linearly until the Miller voltage V _miller is reached. Here, the Miller voltage V _miller refers to the voltage at which the Miller's effect occurs, and the Miller effect is equally applied to the input capacitance by `` amplification + 1 '' of the electric capacity between the electrodes between the input and the output. It means losing phenomenon. The Miller effect occurs because the amplified signal voltage is fed back through the capacitance. At this time, when the voltage V _GS exceeds the threshold voltage V _TH of the MOSFET, the drain current I _D starts to increase and increases until the voltage V _GS reaches the Miller voltage V _miller (section t ₁ to t ₂ ). In the period t ₂ to t ₃ where the MOSFET reaches the saturation region, the capacity of C _GD and C _GS increases several times as much as the initial capacity. During this time, the voltage V _GS hardly changes while the current I _G of the gate driver 100 charges the capacitor C _GD whose capacity is increased, and it lasts a long time until it is charged. When the current I _G of the gate driver 104 charges all the capacitors C _GD having increased capacity, the voltage V _GS increases to the output voltage of the gate driver 100 (section t ₃ to t ₄ ).

If the output current supply capacity of the gate driver 100 is increased, the time interval between the intervals 0 to t ₂ is shortened, and the instantaneous pulse type gate current flows when attempting to charge the C _GD increased by the Miller effect of the switching element. The voltage fluctuates a lot and thus generates a lot of EMI.

On the contrary, when the output current supply capacity of the gate driver 100 is smaller than the gate capacity of the switching element 106, the time interval of the intervals 0 to t ₂ becomes longer, and the time interval of the intervals t ₂ to t ₃ also becomes longer to switch. The switching loss of the element 106 becomes large.

In order to solve this problem, conventionally, the output current supply capacity of the gate driver 100 is slightly higher than the gate capacity of the switching element 106, and then a resistor is inserted between the output of the gate driver 100 and the gate of the switching element. The method of experimentally selecting the values to obtain the appropriate switching characteristics was used.

However, the operation of tuning the output of the gate driver 100 with a resistor is not only inconvenient but time-consuming because the resistor must be replaced one by one. In addition, since the resistor is used at the time of tuning, heat may be generated due to the resistor connected to the gate driver 100, thereby causing a loss in driving capacity of the switching element 106. In addition, in general, the resistor used for tuning uses a coil-wound resistor, which may cause additional EMI due to the inductance component, which may cause a big problem in the reliability of a switching system product employing such a gate driver. have.

According to an embodiment of the present invention, by controlling the switching characteristics by changing the current supply capability of the gate driver over time without using a separate circuit such as a resistor, the EMI (Electro Magnetic Interference) It is an object of the present invention to provide a driving output current supplying method for driving a switching element that can lower generation and at the same time lower switching losses.

In order to achieve the above object, the driving output current supply method according to an embodiment of the present invention, a plurality of output terminals of the output buffer connected in parallel, and a gate driver including a drive control unit for driving each of the plurality of output buffers A driving output current supplying method for supplying a driving output current to a switching element by using the method comprising: driving any one of a plurality of output buffers; And after one of the output buffers is driven, gradually driving the remaining output buffers with a time difference. In this case, the output terminal adds the driving output current output from the pre-driven output buffer and the driving output current output from the newly driven output buffer to supply the switching element.

Here, the output terminal may be provided with two or more output buffers. In this case, it is preferable that the drive control unit gradually drive the output buffer at the output stage with the same time difference. Alternatively, the drive control unit may incrementally drive the output buffer of the output stage with a different time difference.

At this time, it is preferable that the drive control unit additionally drives one by one with a time difference after the first one of the output buffers of the output stage is driven.

In addition, each output buffer may have the same output current supply capacity, or may have a different output current supply capacity.

According to one embodiment of the present invention, by operating a small output buffer with a time difference without using a separate circuit such as a resistor, the overall supply current capacity is changed over time, so that the waveform characteristics remain the same. The switching by the switching element operates optimally, so that the switching noise is small and fast.

In addition, since the coil-type resistor is not used, the generation of EMI can be lowered and the switching loss can be lowered as compared with the prior art.

Hereinafter, some embodiments of the present invention will be described in detail with reference to the accompanying drawings. In adding reference numerals to the components of each drawing, it should be noted that the same reference numerals are assigned to the same elements as much as possible even though they are shown in different drawings. In the following description of the present invention, a detailed description of known functions and configurations incorporated herein will be omitted when it may make the subject matter of the present invention rather unclear.

In addition, in describing the component of this invention, terms, such as 1st, 2nd, A, B, (a), (b), can be used. These terms are only for distinguishing the components from other components, and the nature, order or order of the components are not limited by the terms. If a component is described as being "connected", "coupled" or "connected" to another component, that component may be directly connected or connected to that other component, but between components It will be understood that may be "connected", "coupled" or "connected".

4 is a diagram schematically illustrating a structure of a gate driver according to an exemplary embodiment of the present invention. Referring to the drawings, a gate driver according to an embodiment of the present invention includes an output terminal 400 and a drive control unit 410.

Here, the output stage 400 is a plurality of output buffers 402, 404, 406, 408 are connected in parallel. In this case, each output buffer 402, 404, 406, 408 may be implemented with the same output current supply capacity, it may be implemented with different output current supply capacity. In addition, each of the output buffers 402, 404, 406, 408 preferably includes a drive input terminal for receiving a drive control signal from the drive controller 410.

Here, each output buffer 402, 404, 406, 408 may be implemented in a structure as shown in FIG. That is, each output buffer 402, 404, 406, 408 may include two AND gates and two transistors, and a driving input terminal may be connected to an input of each AND gate. At this time, the driving input terminal receives the control signal from the driving control unit 410 and transfers it to the output buffer (402, 404, 406, 408). Here, the control signal is a signal for controlling the driving of each output buffer 402, 404, 406, 408, it may be divided into high or low. In this case, Q1 and Q2 do not operate when the control signal is low, and Q1 and Q2 operate by the buffer input signal when the control signal is high.

At this time, each of the output buffers 402, 404, 406, 408 is operated by each control signal. If the control signal is low, the output is high impedance, and if the control signal is high, the output value of the corresponding output buffer is The driving output current is generated while the input signal and the opposite signal (same signal depending on the circuit configuration) are output.

In more detail, the buffer input and the control signal are connected to the first AND gate as an input, and the inverted signal and the control signal of the buffer input are connected to the second AND gate as an input. When the control signal is high, when the buffer input is a square wave, the output of the first AND gate = high and the output of the second AND gate = low at the top of the square wave become Q1 = ON and Q2 = OFF, thus driving output state. Becomes high to supply the driving output current to the switching element 106. At the lower end of the square wave, the output of the first AND gate = low, the output of the second AND gate = high, and Q1 = OFF and Q2 = ON, so that the driving output state becomes low. In addition, when the control signal is low, the first AND gate = low and the output of the second AND gate = low regardless of the buffer input, so that both Q1 and Q2 are turned OFF to become a high impedance state, and thus the switching element ( 106, the driving output current is not supplied.

The ability of the output buffers 402, 404, 406, 408 to change the output state from low to high is determined by Q1, and the ability to change from high to low is determined by Q2. Therefore, in order to improve the output current driving capability of the output buffers 402, 404, 406, and 408, the sizes of Q1 and Q2 may be increased, and conversely, the sizes of Q1 and Q2 may be reduced.

On the other hand, the drive control unit 410 is connected to the drive input terminal of each output buffer 402, 404, 406, 408 transfers a control signal for driving each output buffer (402, 404, 406, 408). At this time, the drive control unit 410 preferably incrementally drives the output buffer 402, 404, 406, 408 of each of the output stage 400 with a time difference. In this case, when three or more output buffers 402, 404, 406, and 408 are provided as shown in the drawing, each output buffer 402, 404, 406, and 408 is incremented with the same time difference. Alternatively, the respective output buffers 402, 404, 406, and 408 may be incrementally driven by different time differences. At this time, the drive control unit 410 is preferably one of the first output buffer 402, 404, 406, 408 of the output stage 400, and then additionally drive the output buffer one by one with a time difference.

The driving output currents generated in the output buffers 402, 404, 406, and 408 driven by the control of the driving controller 410 are combined with each other and transferred to the gate of the switching element 106.

FIG. 7 is a diagram illustrating an operation of a gate driver according to an exemplary embodiment of the present invention, and illustrates an example in which an output terminal including two output buffers is connected to a MOSFET.

When the voltage output by the output buffer 502 of the gate driver is high (e.g., 10V), the voltage V _GS between the gate and the source of the MOSFET causes the driver's output current to become a capacitor C through the resistor R _{G, int} . By charging _GS and C _GD , the voltage V _GS increases linearly until it reaches the Miller voltage V _miller beyond the threshold voltage V _TH of the MOSFET as shown in FIG. 8 (section 0 to t ₂ ). At this time, when the voltage V _GS exceeds the threshold voltage V _TH of the MOSFET, the drain current I _D starts to increase and increases until the voltage V _GS reaches the Miller voltage V _miller (section t ₁ to t ₂ ).

At this time, in the period t ₂ to t _{3 when} the MOSFET reaches the saturation region, the capacity of C _GD and C _GS increases to several tens of initial capacity. During this time, the voltage V _GS hardly changes as the current I _G of the gate driver 100 of the output buffer 502 charges the capacitor C _GD whose capacity is increased, and thus a long time is maintained until it is charged. At t ₂ , if another output buffer 504 is additionally operated, the current capacity of the gate driver current I _G outputted by the other output buffer 504 increases, thereby charging C _GD increased to Miller capacity at a fast time. The time from t ₂ to t ₃ can be reduced. In addition, when t ₃ is operated without turning off the other output buffer 504, noise may increase due to ringing of the gate voltage due to overcurrent. Therefore, by turning off the other output buffer 504, a small gate driver output current Charge the rest of the C _GD to suppress switching noise. That is, the additional output buffer is operated to reduce the switching time by reducing the time interval of the intervals t ₂ to t ₃ , and to drive the gate by driving with a small gate current in the initial section (t ₀ to t ₂ ) and the termination section (t ₃ to t ₄ ). It suppresses ringing of voltage and reduces noise.

Here, the output buffer 502 is described as operating a time difference with the output buffer 502 while the output buffer 502 operates in the interval t ₂ to t ₃ , but the output buffer 502 and the output buffer ( In addition to 504, other output buffers may be installed in parallel with these output buffers 502 and 504. Also, in the drawing, an example in which an output stage having two output buffers is connected to the switching element 106 is used as an example. Although illustrated and described, the time interval of each section may be adjusted according to the number of output buffers, and each section may be selectively reduced according to the time difference of each output buffer driven.

 As described above, when a plurality of output buffers are connected in parallel and each output buffer is driven with a time difference, and the operation times thereof are compared, it is understood that the switching operation by the switching element is rapidly performed as shown in FIGS. 3 and 8. Can be.

While the present invention has been described in connection with what is presently considered to be the most practical and preferred embodiment, it is to be understood that the invention is not limited to the disclosed embodiments. In other words, within the scope of the present invention, all of the components may be selectively operated in combination with one or more. In addition, although all of the components may be implemented in one independent hardware, each or all of the components may be selectively combined to perform some or all functions combined in one or a plurality of hardware. It may be implemented as a computer program having a. Codes and code segments constituting the computer program may be easily inferred by those skilled in the art. Such a computer program may be stored in a computer readable storage medium and read and executed by a computer, thereby implementing embodiments of the present invention. The storage medium of the computer program may include a magnetic recording medium, an optical recording medium, a carrier wave medium, and the like.

In addition, the terms "comprise", "comprise" or "having" described above mean that the corresponding component may be inherent unless specifically stated otherwise, and thus excludes other components. It should be construed that it may further include other components instead. All terms, including technical and scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art unless otherwise defined. Terms used generally, such as terms defined in a dictionary, should be interpreted to coincide with the contextual meaning of the related art, and shall not be interpreted in an ideal or excessively formal sense unless explicitly defined in the present invention.

The foregoing description is merely illustrative of the technical idea of the present invention, and various changes and modifications may be made by those skilled in the art without departing from the essential characteristics of the present invention. Therefore, the embodiments disclosed in the present invention are not intended to limit the technical idea of the present invention but to describe the present invention, and the scope of the technical idea of the present invention is not limited by these embodiments. The protection scope of the present invention should be interpreted by the following claims, and all technical ideas within the equivalent scope should be interpreted as being included in the scope of the present invention.

1 is a view schematically showing a structure of a general gate driver for driving a switching device.

FIG. 2 is a diagram illustrating the operation of the gate driver of FIG. 1 and illustrates a case connected to a MOSFET.

3 is a diagram illustrating waveform characteristics of the gate driver of FIG. 2.

4 is a diagram schematically illustrating a structure of a gate driver according to an exemplary embodiment of the present invention.

FIG. 5 is a diagram schematically illustrating an output buffer used in the gate driver of FIG. 4.

FIG. 6 is a diagram illustrating a structure of an output buffer of FIG. 5.

FIG. 7 is a diagram illustrating an operation of a gate driver according to an exemplary embodiment of the present invention, and illustrates an example in which an output terminal including two output buffers is connected to a MOSFET.

FIG. 8 is a diagram illustrating waveform characteristics of the gate driver of FIG. 7.

<Description of Symbols for Main Parts of Drawings>

100, 400: conventional gate driver 102: input buffer

104, 402, 404, 406, 408, 502, 504: output buffer

106: switching element

Claims (6)

In the driving output current supply method for supplying a driving output current to the switching element by using a gate driver including a plurality of output terminals of the output buffer connected in parallel, and a drive control unit for driving each of the plurality of output buffers, Driving any one of the plurality of output buffers; And After the one of the output buffer is driven, incrementally driving the remaining output buffer with a time difference Including; The output terminal is a driving output current supply method, characterized in that the driving output current output from the output buffer and the driving output current output from the newly driven output buffer to add to the switching element. The method of claim 1, And driving each output buffer of the plurality of output buffers incrementally with the same time difference. The method of claim 1, Driving output current supply method characterized in that to drive each of the output buffer of the plurality of output buffer incrementally by different time difference. delete The method according to any one of claims 1 to 3, Driving output current supply method, characterized in that each of the output buffer has the same output current supply capacity. The method according to any one of claims 1 to 3, Each of the output buffers has a different output current supply capacity.

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