KR100968807B1 - Variable gain amplifier and reciver including the same - Google Patents

Abstract

The variable gain amplifier of the present invention amplifies an input signal and a feedback signal using a gain control unit for generating a gain control voltage, a voltage gain linearly proportional to the gain control voltage, and converts the amplified signal into a signal having a constant magnitude. And a variable amplifying unit which removes an offset from an output signal of the variable amplifying unit and outputs the offset elimination result as the feedback signal. The variable amplifying unit includes a plurality of transconductor circuits.

Variable Gain Amplifier, Linearity, Transconductor, Exponential Function, OTA, dB-linear

Description

Variable gain amplifiers and receivers containing them {VARIABLE GAIN AMPLIFIER AND RECIVER INCLUDING THE SAME}

The present invention relates to a variable gain amplifier for automatically adjusting the size of a signal, and more particularly, to a variable gain amplifier having a wide dynamic range and a receiver including the same.

The present invention is derived from the research conducted as part of the IT growth engine technology development project of the Ministry of Information and Communication and the Ministry of Information and Communication Research and Development. [Task Management Number: 2005-S-017-03, Assignment Name: Ultra-low-power RF / HW / SW Integrated SoC].

In various applications such as disk drivers, hearing aids, medical equipment, optical receivers, and the like, a variable gain amplifier (VGA) is an indispensable block. Especially in mobile communication system, variable gain amplifier should be able to provide big gain to overcome noise at low signal power where signal environment is exposed to noise, and signal distortion when received signal comes in full power. It should be possible to provide low gains to avoid this. To do this, the variable gain amplifier must have a high dynamic range that allows a variable gain range. Only then, the received signal can be stably restored to the original signal through the digital circuit DSP.

Conventionally, a variable gain amplifier using a bipolar junction transistor (BJT) device having an exponential function has been mainly used to provide a voltage gain in units of decibels (dB) linearly proportional to a control voltage. However, thanks to the demand for CMOS single-chip (SoC) and the development of many circuit technologies, variable gain amplifiers with exponentially linear gain characteristics are now implemented in CMOS devices. However, since these CMOS variable gain amplifiers require many blocks to obtain an exponential linear gain characteristic, the structure becomes complicated and consumes excessive current. First of all, CMOS variable gain amplifiers have a problem that the characteristics of the design value are sensitively changed and distorted much when the design variable changes in the process because the gain amplifier is a large gain. In addition, even if the chip implementation of the CMOS variable gain amplifier is perfect, there is a problem that the frequency characteristics or gain characteristics deteriorate as the chip temperature changes.

Accordingly, an object of the present invention has been proposed to solve the above problems, a CMOS variable gain amplifier that can provide a large linear dynamic range while having an exponential linear gain characteristics and a receiver comprising the same To provide.

Another object of the present invention is to provide a CMOS variable gain amplifier having a simple structure and low power consumption, and a receiver including the same.

It is still another object of the present invention to provide a CMOS variable gain amplifier having a stable characteristic against a process or a temperature change and a receiver including the same.

In order to achieve the above object, the variable gain amplifier according to the present invention comprises: a gain controller for generating a gain control voltage; A variable amplifier for amplifying an input signal and a feedback signal by using a voltage gain linearly proportional to the gain control voltage, and converting the amplified signal into a signal having a constant magnitude; And an offset removing unit for removing an offset from an output signal of the variable amplifier and outputting the offset elimination result as the feedback signal, wherein the variable amplifier comprises a plurality of transconductor circuits.

In this embodiment, the transconductance control unit for controlling the transconductance value of the plurality of transconductor circuits to a stable value, characterized in that it further comprises.

In this embodiment, the transconductance control unit is characterized in that the automatic tuning circuit.

In this embodiment, the transconductance control unit is shared with at least one transconductor circuit external to the variable gain amplifier.

The variable amplifier may include: a gain variable unit configured to determine the voltage gain in response to the gain control voltage, and to amplify the input signal and the feedback signal using the voltage gain; And an amplifier for amplifying the output of the gain variable part to have a predetermined size.

The gain variable unit may include: a first transconductor unit cell configured to determine a first gain in response to the gain control voltage, and to amplify the input signal and the feedback signal using the first gain; And a plurality of second transconductor unit cells that determine a second gain in response to the gain control voltage and amplify the output of the first transconductor unit cell using the second gain.

In this embodiment, the first transconductor unit cell receives the input signal through a first differential input terminal pair and amplifies it by a predetermined gain, and outputs the amplification result through the first differential output terminal pair, A first transconductor for feeding back said amplification result to a second differential input terminal pair through a resistor connected to said first differential output terminal pair; And receiving the output signal of the first transconductor and the feedback signal provided from the offset canceling unit through a third and fourth differential input terminal pairs and amplifying the feedback signal by a predetermined gain, and amplifying the amplification result of the second differential output terminal pair. And a second transconductor for outputting the amplification result to the third differential input terminal pair through a voltage regulator connected to the second differential output terminal pair.

In this embodiment, the first and the second voltage adjusting unit is characterized by consisting of an active resistance component capable of adjusting the resistance value.

In this embodiment, each of the first and second voltage regulators includes a plurality of MOS transistors each connected with a current path in series, and the gain control voltage is a level of a gate voltage and a body voltage of the plurality of MOS transistors. It characterized in that to adjust.

In this embodiment, the gain variable unit is characterized in that for amplifying the input signal and the feedback signal by the dynamic range required by the specification of the system.

In this embodiment, the amplifier is characterized in that for amplifying the output of the gain variable to the size that the digital conversion efficiency is the maximum in the specification of the system.

According to the present invention as described above, it is possible to provide a CMOS variable gain amplifier having an exponential linear gain characteristics and a large linear dynamic range. In addition, it is possible to provide a CMOS variable gain amplifier having a simple structure and low power consumption, and having a stable characteristic against a process or temperature change, and a receiver including the same.

Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention. This embodiment is not intended to limit the scope of the invention, but is presented by way of example only.

The novel variable gain amplifier of the present invention is constructed using a transconductor as the core circuit. Variable gain amplifiers control the transconductance (Gm) value precisely and reliably by an automatic tuning circuit designed inside the system. Therefore, the transconductance (Gm) value of the transconductor does not change in proportion to the absolute value of the reference transconductance under any condition change (process, time, temperature). Because of these characteristics, the characteristics of the entire variable gain amplifier also maintain stable performance. In addition, the variable gain amplifier of the present invention removes the DC-offset present in the output signal through the offset remover. As a result, the dynamic DC-offset caused by the DC-offset or the secondary distortion signal generated in the internal circuit of the receiver system is eliminated without being amplified, so that a more accurate and stable output can be obtained. Detailed configuration of the variable gain amplifier of the present invention and a receiver including the same are as follows.

1 is a block diagram of a variable gain amplifier (VGA) 400 and a mobile communication receiver 1000 including the same according to the present invention. The mobile communication receiver 1000 illustrated in FIG. 1 is a direct conversion receiver (DCR) including a variable gain amplifier 400 for reception proposed in the present invention. The block configuration of the RF / Analog Front-end is shown. However, the configuration of the receiver 1000 illustrated in FIG. 1 is an embodiment to which the present invention is applied, and the present disclosure is not limited to the configuration of the receiver 1000 illustrated in FIG. 1. It is obvious to those who have it.

Referring to FIG. 1, an RF signal received through an antenna in a wireless environment is amplified and modulated by a low noise amplifier (LNA) 100 and a mixer 200. The amplified and modulated RF signal passes through a low-pass filter (LPF) 300 to remove out-of-channel signal noise. This received signal from which out-of-channel signal noise is removed is input to a variable gain amplifier (VGA) 400. 1 illustrates a structure in which the low pass filter 300 is disposed in front of the variable gain amplifier 400. However, this is also merely an exemplary configuration for explaining the present invention, and the variable gain amplifier 400 may be arranged to precede the low pass filter 300 according to the structure of the receiver.

The low pass filter 300 includes a Gm-C type filter 310 for performing low pass filtering and a transconductance control unit 350 (hereinafter referred to as a Gm control unit). The variable gain amplifier 400 includes a variable amplifier 410, a gain controller 450, and a DC offset canceler 470. As will be described in detail below, the low pass filter 300 and the variable gain amplifier 400 are both composed of a transconductance CMOS circuit. The transconductance (Gm) values of the low pass filter 300 and the variable gain amplifier 400, which are transconductance CMOS circuits, are precisely and stably controlled by the Gm control unit 350 provided in the low pass filter 300. . 1 illustrates a configuration in which the Gm controller 350 is shared by the low pass filter 300 and the variable gain amplifier 400. However, such a configuration may be changed in various forms according to the design characteristics of the receiver 1000. For example, the Gm controller 350 may be configured in the low pass filter 300 or may be configured in the variable gain amplifier 400. The Gm controller 350 may be shared by the low pass filter 300 and the variable gain amplifier 400, or may be separately configured in each of the low pass filter 300 and the variable gain amplifier 400.

The signals of various magnitudes input to the variable gain amplifier 400 are amplified and output by a gain of a wide dynamic range by the control of the gain control unit 450. These signals are signals of a constant magnitude that meet the specifications of the system before being output. And then to an analog-to-digital converter (hereinafter referred to as ADC) 500. In other words, the output signal of the low pass filter 300 having various sizes is amplified by a dynamic range that meets the system specification while passing through the variable gain amplifier 400, and the digital conversion efficiency of the ADC 500 is maximized. It will be converted into a signal of magnitude. At this time, the gain value of the variable gain amplifier 400 is controlled using a signal (Gain Control Signal) made through the AGC (Auto Gain Control) loop.

The analog low pass filter 300 currently used in most mobile communication terminals, including the receiver 1000 shown in FIG. 1, is designed using an operational transconductance amplifier (OTA). The biqud type filter and the LC ladder type filter using the gyrator are both examples of applications of the transconductor. The transconductance (Gm) value of the transconductor-type analog low pass filter 300 designed using the transconductor is precisely and stably controlled by the Gm control unit 350, which is an auto tuning circuit designed inside the system. do. As a result, the transconductance (Gm) value of the transconductor does not change in proportion to the absolute value of the reference transconductance under any condition change (process, time, temperature). Because of this characteristic, the overall characteristics of the low pass filter 300 also maintain stable performance.

In the mobile communication receiver, the low pass filter 300 and the variable gain amplifier 400 are both main components and neighboring blocks disposed adjacent to each other. Since the variable gain amplifier 400 has a large dynamic range and a relatively large gain, the overall performance is sensitively changed according to the characteristics of the device. In particular, in the structure of the receiver 1000 of the direct conversion method (DCR) as shown in FIG. 1, the characteristics of the receiver 1000 may be affected by a second harmonic distortion (HD2) signal.

In order to prevent such a problem, the present invention applies both the characteristics of the transconductor providing stable performance to the variable gain amplifier 400 as well as the low pass filter 300. According to such a configuration, the performance of the receiver 1000 can be stably maintained without deterioration of characteristics not only in process changes but also in temperature and time changes. Furthermore, since the variable gain amplifier 400 is designed as a transconductor CMOS circuit in the present invention, the input / output characteristics can be guaranteed to a considerably wider range than other amplifiers not configured as a transconductor type. In addition, since the power consumption is small compared to other amplifiers, it has low power and low distortion characteristics. In addition, as shown in FIG. 1, the low pass filter 300 and the variable gain amplifier 400 disposed adjacent to each other in the receiver 1000 share the Gm control unit 350 to control the transconductance (Gm) value. Therefore, duplication of circuits can be prevented. In addition, the structure is simplified due to the continuous arrangement of the transconductor CMOS circuits constituting the low pass filter 300 and the variable gain amplifier 400, thereby efficiently reducing the design area.

2 is a detailed block diagram of the variable gain amplifier 400 of the present invention shown in FIG.

Referring to FIG. 2, the variable gain amplifier 400 includes a variable amplifier 410, a gain controller 450, and an offset remover 470. The gain controller 450 generates gain control voltages V _CB and V _CG for controlling the gain value of the variable amplifier 410 in response to a signal generated through an AGC (Auto Gain Control) loop. do. The offset remover 470 includes a first offset remover 471 and a second offset remover 472. The first and second offset removers 471 and 472 remove the DC-offset present in the output signal of the variable amplifier 410 in association with the amplification loop. In this case, the first and second offset removers 471 and 472 and the variable amplifier 410 are connected to form negative feedback. As a method of removing the DC offset from the first and second offset removers 471 and 472, for example, a low pass filtering method using a resistor, a capacitor, and transconductors may be applied.

The variable amplifier 410 includes a gain variable unit 420 and an amplifier 430. The gain variable unit 420 receives a signal of various magnitudes from the low pass filter 300 and amplifies the gain by a wide dynamic range in accordance with a system specification. The result amplified by the gain variable unit 420 is input to the amplifying unit 430 is converted into a signal of a constant size to maximize the digital conversion efficiency within the specifications of the system. The output of the amplifier 430 is fed back to the gain variable unit 420 after the DC-offset is removed through the first and second offset removers 471 and 472. The output signal from which the DC-offset is removed is output to the ADC 500 through the gain variable unit 420 and the amplifier 430.

The gain variable part 420 varies the gain in response to the gain control voltages V _CB and V _CG generated from the gain control part 450, and is linear with the gain control voltages V _CB and V _CG as a result of the gain variable. It provides a voltage gain in proportional decibels (dB). As will be described in detail below, V _CG generated from the gain control unit 450 is used to control the gate voltage V _G of the MOS resistors constituting the gain variable unit 420, and V _CB is used to control the gain variable unit 420. It is used to control the body voltage (V _B ) of constituting MOS resistors.

Looking at a specific configuration of the gain variable unit 420, the gain variable unit 420 is composed of one first variable gain amplifier (VGA) unit cell 421 and a plurality of second VGA unit cells (422, 423). . 2 illustrates an example in which the first and second VGA unit cells 421-423 are configured based on the structure of the Gm-VGA cell of Korean Patent No. 65379 and US20070126501A1. The basic operation of the first and second VGA unit cells 421-423 follows the operation described in the patent publication. Therefore, the detailed operation of some Gm-VGA cells (VGA unit-cell) is not described here. However, the first and second VGA unit cells 421-423 of the present invention are newly configured to be suitable for the reception variable gain amplifier of the mobile communication system, and the first and second VGA unit cells 421-423 of the present invention. ) May be constructed using other types of Gm-VGA cells as well as the Gm-VGA cell structures described in the above patents.

The first VGA unit cell 421 includes a differential input signal IN _p1 , IN _m1 provided from the low pass filter 300, and a feedback signal IN _p2 , provided from the first and second offset removers 471, 472. IN _m2 ) is input and amplified by a predetermined gain and output. The gain is adjusted by the gain control voltages V _CB and V _CG generated by the gain controller 450. The feedback signals IN _p2 and IN _m2 provided from the first and second offset cancelers 471 and 472 are output feedback signals that are accepted for the purpose of canceling the DC-offset.

Each of the plurality of second VGA unit cells 422 and 423 receives the output of the previous stage VGA cell (eg, 421) and amplifies the output by a predetermined gain, and amplifies the amplification result of the next stage VGA cell (eg, the second stage). , 423). The gain is adjusted by the gain control voltages V _CB and V _CG generated by the gain controller 450. Such an input / output operation is continuously performed in the second VGA unit cells 422 and 423 connected in series. The number of first and second VGA unit cells 421-423 included in the gain variable unit 420 is determined according to a dynamic range required by the system. For example, if each VGA unit cell has a dB-linear dynamic range of several tens of dBs, the unit cell will need to be a multiple of the dynamic range to meet the dynamic range required by the system. For example, a wideband code division multiple access (WCDMA) terminal should have a variable gain range of 70 dB or more. If a VGA unit cell has a dynamic range of about 18 dB, a total of four VGA unit cells must be configured to be continuous. Can be satisfied. As the number of VGA unit cells 421, 422, and 423 included in the gain variable unit 420 increases, the removal rate of the DC-offset increases.

2 illustrates an example in which an amplifier 430 is connected to a stage next to the gain variable unit 420. However, this is only an embodiment to which the present invention is applied, and the connection state of the gain variable unit 420 and the amplifier 430 may be changed and modified in various forms. For example, the gain variable unit 420 may be connected to the stage next to the amplifier 430, or the gain variable unit 420 may be inserted into the amplifier 430.

3 is a diagram illustrating a detailed configuration of the first VGA unit cell 421 illustrated in FIG. 2, and FIG. 4 is a diagram illustrating a detailed configuration of the second VGA unit cell 422 illustrated in FIG. 2.

First, referring to FIG. 3, the first VGA unit cell 421 is configured of first and second transconductors 4211 and 4212 having the same characteristics (denoted as OTA in the drawing). The first transconductor 4211 receives the differential input signals IN _p1 , IN _m1 provided from the low pass filter 300 through the first differential input terminal pair, and receives the input signals IN _p1 , IN _m1 . Amplify by gain. The amplified result is output through the first differential output terminal pair. First and second resistors R1 and R2 are respectively connected between the first differential input terminal pair and the first differential output terminal pair. The differential output signal generated from the first transconductor 4211 is negatively fed back via resistors R1 and R2 and input to the second differential input terminal pair of the first transconductor 4211. In this case, the resistors R1 and R2 boost the bandwidth. The second transconductor 4212 receives the output of the first transconductor 4211 through a third differential input terminal pair, and the first and second offset removers 471 and 472 through a fourth differential input terminal pair. Accept the feedback signals IN _p2 , IN _m2 provided from The second transconductor 4212 may output the first transconductor 4211 and the feedback signals IN _p2 and IN _m2 in response to the gain control voltages V _CB and V _CG generated from the gain control unit 450. Amplifies by a predetermined gain. The amplification result of the second transconductor 4212 is provided to a second differential output terminal pair. First and second voltage regulators 4213 and 4214 are respectively connected between the third differential input terminal pair and the second differential output terminal pair. The differential output signal generated from the second transconductor 4212 is negatively fed back through the first and second voltage regulators 4213 and 4214 and input to the third differential input terminal pair of the second transconductor 4212.

The first and second voltage regulators 4213 and 4214 may be formed of an active resistance component capable of adjusting a resistance value, and the first and second voltage regulators 4213 and 4214 may be formed of a MOS as shown in FIG. 3. It may also be composed of transistors (ie, MOS resistors). That is, in the present invention, when the drain-source voltage Vds of the MOS transistors included in the first and second voltage regulators 4213 and 4214 is large, the plurality of MOSs are avoided to avoid signal distortion due to resistance variation. The transistors have a configuration in which they are connected in series. Here, the current paths of the plurality of MOS transistors are connected in series.

In the present invention, the gain control voltages V _CG and V _CB generated by the gain controller 450 are used to control the gate voltage V _G and the body voltage V _B of the MOS resistors operating in the triode region. The resistance values of the first and second voltage regulators 4213 and 4214 are adjusted. The gain of the first VGA unit cell 421 is determined according to the resistance values of the first and second resistors R1 and R2 and the first and second voltage regulators 4213 and 4214.

On the other hand, the transconductance control voltage VC-GM generated from the Gm control unit 350 is input to the first and second transconductors 4211 and 421 to transmit the transformers of the first and second transconductors 4211 and 421. The conductance value Gm is adjusted stably. As a result, the first VGA unit cell 421 maintains stable performance without deterioration of characteristics not only with process changes but also with temperature and time.

Referring to FIG. 4, the second VGA unit cell 422 includes first and second transconductors 4221 and 4222 having the same characteristics. Third and fourth resistors R3 and R4 are respectively connected to the first transconductor 4221, and first and second voltage regulators 4223 and 4224 are respectively connected to the second transconductor 4222. As shown in FIGS. 3 and 4, a second transconductor 4212 of the first VGA unit cell 421 receives feedback signals IN _p2 and IN _m2 from the first and second offset removers 471 and 472. Except for receiving a), the basic configurations of the first VGA unit cell 421 and the second VGA unit cell 422 are the same. Therefore, redundant description of the second VGA unit cell 422 will be omitted below to avoid repeated descriptions.

Referring back to FIG. 2, the amplifier 430 includes a plurality of transconductors 431 and 432 connected in series. The basic configuration of the transconductors 431, 432, or OTA, constitutes the transconductors 421, 422, and 423 constituting the gain variable part 420, and the filter 310 of the low pass filter 300. It is substantially the same as the basic configuration of the transconductor (not shown). The gain of the amplifier 430 is determined according to the magnitude of the resistance component of the output load connected between the differential output terminals of each of the transconductors 431 and 432. The amplifier 430 is not provided with an additional signal for controlling the voltage gain. Typically, the gain of one transconductor provides an ideal gain of more than 70dB. Therefore, a small number of transconductors can achieve the desired gain sufficiently. Accordingly, the amplifier 430 determines the resistance value and the number of transconductors in consideration of only frequency characteristics.

The transconductance Gm values of the transconductors 431 and 432 are controlled to have a precise and stable value by the control of the Gm controller 350. The Gm controller 350 may include the transconductors 421, 422, and 423 constituting the gain variable unit 420, the plurality of transconductors 431, 432 provided in the amplifier 430, and the low pass filter. The transconductance (Gm) values of the transconductors (not shown) constituting the filter 310 of 300 are all controlled. In order to adjust the transconductance (Gm) value, the Gm controller 350 is configured with an automatic tuning circuit.

First, the signal variable amplified by the gain variable unit 420 is input to the amplifier 430 and amplified again. The output of the amplifier 430 is amplified to be fixed to a certain size. That is, before the signal amplified by the dynamic range by the gain variable unit 420 of the preceding stage is provided to the ADC 500, the digital conversion efficiency of the ADC 500 is converted into a signal having a constant size that can be maximized.

5 is a graph showing the frequency characteristics of the transconductor type variable gain amplifier 400 of the present invention.

Referring to the simulation result shown in FIG. 5, it can be seen that the overall gain characteristic of the variable gain amplifier 400 is changed according to a signal (Gain Control Signal) generated through an AGC (Auto Gain Control) loop. In addition, the DC-offset removing operation of the offset removing unit 470 has a negative gain near approximately DC and the cutoff point does not exceed several kHz at the maximum gain. In this case, the 3dB bandwidth should be designed large considering the channel filtering of the lowpass filter.

6 is a graph showing the dB gain of the transconductor type variable gain amplifier 400 of the present invention. 6 shows the dB gain of the output of the variable gain amplifier 400 according to the gain control voltage at the 1 MHz offset. Referring to FIG. 6, it can be seen that the variable gain amplifier 400 of the present invention has a fairly linear dB gain characteristic of 70 dB or more with respect to the gain control voltage.

7 is a graph showing the dB-linear error characteristic of the transconductor variable gain amplifier 400 of the present invention. Referring to FIG. 7, the transconductor type variable gain amplifier 400 of the present invention has a linear error of about 0.5 dB or less within a gain control range of 70 dB or more. That is, as shown in Figures 5 to 7, the variable gain amplifier 400 of the present invention can remove the DC offset with a simpler configuration, exponential linear gain characteristics having a wide dynamic range for the control voltage There is an effect that can provide.

In addition, the variable gain amplifier 400 of the present invention maintains stable performance without deterioration of characteristics due to temperature and time changes as well as process changes because the transconductor is used as a core circuit. In addition, since the variable gain amplifier 400 of the present invention is configured by using a transconductor, the variable gain amplifier 400 consumes less current and can be designed to be connected to the low pass filter 300 which is an adjacent circuit, thereby shortening the design period and designing area. Efficiency and high precision control can be achieved. In this case, the variable gain amplifier 400 of the present invention has a configuration in which the low pass filter 300 and the Gm controller 350 are shared without separately configuring a Gm controller for adjusting the transconductance (Gm) value. Therefore, there is an advantage that the control of the transconductance (Gm) value and the circuit configuration are simplified.

As described above, optimal embodiments have been disclosed in the drawings and the specification. Although specific terms have been used herein, they are used only for the purpose of describing the present invention and are not used to limit the scope of the present invention as defined in the meaning or claims. Therefore, those skilled in the art will understand that various modifications and equivalent other embodiments are possible from this. Therefore, the true technical protection scope of the present invention will be defined by the technical spirit of the appended claims.

1 is a block diagram of a variable gain amplifier (VGA) and a mobile communication receiver including the same according to the present invention.

FIG. 2 is a detailed block diagram of the variable gain amplifier of the present invention shown in FIG. 1.

FIG. 3 is a diagram illustrating a detailed configuration of a first VGA unit cell shown in FIG. 2.

FIG. 4 is a diagram illustrating a detailed configuration of a second VGA unit cell shown in FIG. 2.

5 is a graph showing the frequency characteristics of the transconductor type variable gain amplifier of the present invention.

6 is a graph showing the dB gain of the transconductor type variable gain amplifier of the present invention.

7 is a graph showing the dB-linear error characteristic of the transconductor variable gain amplifier of the present invention.

* Description of the symbols for the main parts of the drawings *

100: low noise amplifier (LNA) 200: mixer

300: low pass filter (LPF) 350: transconductance (Gm) control unit

400: variable gain amplifier (VGA) 410: variable amplifier

420: gain variable section 430: amplification section

450: gain control unit 470: offset removal unit

500: analog-to-digital converter (ADC) 1000: receiver

Claims (12)

A gain controller for generating a gain control voltage; A variable amplifier comprising a plurality of transconductor core circuits to amplify an input signal and a negative feedback signal using a voltage gain linearly proportional to a gain control voltage, and converts the amplified signal into a signal having a constant magnitude. ; An offset remover configured to remove a DC-offset present in the output signal of the variable amplifier and negatively feedback the DC-offset removal result to the variable amplifier; And It includes a transconductance control unit for adjusting the transconductance value of the plurality of transconductor core circuits provided in the variable amplification unit, The transconductance control unit is configured with an automatic tuning circuit, and generates a transconductance control voltage for controlling the transconductance value to be maintained at the same value as the absolute value of the reference transconductance of the same transconductor core circuits in the transconductance control unit. Variable gain amplifier. delete delete delete The method of claim 1, The variable amplification unit, A gain variable unit configured to determine the voltage gain in response to the gain control voltage and to amplify the input signal and the negative feedback signal using the voltage gain; And And amplifying unit for amplifying the output of the gain varying unit to have a predetermined size. The method of claim 5, The gain variable part, A first variable gain amplifier (VGA) unit cell for determining a variable gain dynamic range of a variable gain amplifier, the amplifying the input signal and the negative feedback signal in response to the gain control voltage; And And a plurality of second VGA unit cells that amplify the output of the first VGA unit cell in response to the gain control voltage. The method of claim 6, The first VGA unit cell, Accepts and amplifies the input signal through a first differential input terminal pair, and outputs the amplification result through a first differential output terminal pair, wherein the amplification result is generated through a resistor connected to the first differential output terminal pair. A first transconductor feeding back two differential input terminal pairs; And Amplifies the output signal of the first transconductor and the negative feedback signal provided from the offset canceling unit through third and fourth differential input terminal pairs, and amplifies the first and second amplification results to a second differential output terminal pair; And a second transconductor for feeding back to the third differential input terminal pair through the second voltage gain adjuster. delete The method of claim 6, Each of the plurality of second VGA unit cells, Accepts and amplifies the output of the first VGA unit cell in the preceding stage or the second VGA unit cell in the preceding stage via the first differential input terminal pair, and amplifies the amplification result of the second transformer of the next stage through the first differential output terminal pair. A first transconductor outputting to a conductor and feeding the amplification result back to a second differential input terminal pair through a resistor connected to said first differential output terminal pair; And Amplifying the output signal of the first transconductor through the third and fourth differential input terminal pairs connected to the same polarity, and the amplification result through the first and second voltage gain control unit connected to the second differential output terminal pair same And a second transconductor for feeding back polarity to third and fourth differential input terminal pairs. The method according to claim 7 or 9, The first and second voltage gain control units are active resistance components whose resistance values can be adjusted by the gain control voltage. Each of the first and second voltage gain control units includes a plurality of MOS transistors connected in series with a current path, and the gain control voltages include the plurality of gain control voltages. A variable gain amplifier, characterized in that it adjusts the level of gate voltage and body voltage of MOS transistors. The method of claim 5, The amplifier consists of a plurality of amplifiers consisting of the transconductor and the resistor to maintain a constant transconductance value by the transconductance control voltage, the basic amplifier has two terminals of the same polarity of the transconductor to have a double transconductance value A variable gain amplifier comprising a single input terminal pair by connecting input pairs to each other and a parallel resistor connected to the output terminal pair to have a fixed amplification value. A transconductor type low pass filter for filtering out-channel signal noise through filtering; A variable gain amplifier for amplifying the filtered signal by a dynamic range required by a system specification and amplifying the amplified result to a size at which digital conversion efficiency is maximized; And An analog-to-digital converter for converting the output of the variable gain amplifier to a digital form, The variable gain amplifier includes: a gain controller configured to generate a gain control voltage; A variable amplification circuit comprising a plurality of transconductor core circuits to amplify an input signal and a negative feedback signal by using a voltage gain linearly proportional to the gain control voltage, and converting the amplified signal into a signal having a constant magnitude. part; And an offset remover configured to remove the DC-offset present in the output signal of the variable amplifier and negatively feedback the DC-offset removal result to the variable amplifier. And A transconductance control unit configured to adjust transconductance values of the plurality of transconductor core circuits provided in the variable amplifier unit, The transconductance control unit is configured with an automatic tuning circuit, and generates a transconductance control voltage for controlling the transconductance value to be maintained at the same value as the absolute value of the reference transconductance of the same transconductor core circuits in the transconductance control unit. And the low pass filter is a transconductor low pass filter controlled by the transconductance control unit and configured of the same transconductor core circuit as the variable gain amplifier to remove out-of-channel signal noise.

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