KR100951671B1 - Power control device for multimedia IC chip, and method for the same - Google Patents

Abstract

The present invention relates to a power control technology of a multimedia IC chip, and more particularly, to detect functions executed at a firmware level by type, and to recognize arithmetic throughput of each function through numerical data of various mapping tables which are set in advance, The present invention relates to a power control technology capable of applying an appropriate driving clock and driving voltage to an application program that is currently executed by determining and generating a frequency and driving voltage value of the driving clock. According to the present invention, a driving clock suitable for executing various application programs on a multimedia IC chip can be generated, and a driving voltage suitable for the physical conditions of the IC chip and a function to be processed can be generated. In addition, the power consumption can be reduced by generating an appropriate driving clock and driving voltage as described above.

IC, Multimedia, Clock, Voltage, Mapping Table, Power Control

Description

Power control device and method for the same for multimedia IC chip

The present invention relates to a power control technology of a multimedia IC chip, and more particularly, to detect functions executed at a firmware level by type, and to recognize arithmetic throughput of each function through numerical data of various mapping tables which are set in advance, The present invention relates to a power control technology capable of applying an appropriate driving clock and driving voltage to an application program that is currently executed by determining and generating a frequency and driving voltage value of the driving clock.

A multimedia IC chip, unlike a CPU used in general computers, means an IC chip specialized for video, audio, and mobile communication. As a recent mobile phone, video playback device, and audio player have been integrated into a single device, such a multimedia IC chip The demand for is increasing. In particular, many companies with excellent technology in Korea, where mobile communication business and portable audio device business such as MP3 have developed, are developing and mass-producing multimedia IC chips.

Such a multimedia IC chip is mainly installed in a portable mobile device, and in a mobile device that emphasizes small size and light weight, configuring a multi-function chip into one chip becomes a technical key for competitiveness in the future.

The conventional power control function is connected to the outside of the IC chip as a separate module rather than embedded in the IC chip, and plays a role of supplying to the IC chip after generating and outputting a stabilized voltage through regulation of external power input. It was.

However, in recent years, attempts have been made to embed even power control functions in a single IC chip, and some overseas competitive companies have developed proprietary technologies for one-chip IC chip power control, and have obtained patent rights. The company claims its technical rights through patent disputes against companies.

In order to be equipped with a power control function in one multimedia IC chip, it is necessary to be able to generate a driving clock suitable for driving various applications and multimedia data installed in the IC chip. Should be able to supply

In addition, the generation of unnecessary power increases in a miniaturized mobile multimedia IC chip that does not have sufficient cooling system can cause fatal problems in system operation and limit the battery life of the mobile device. The drive clock and drive voltage must be able to guarantee normal operation while minimizing drive power.

The above mentioned conditions are required to have a power control function in one multimedia IC chip. Currently, the technology proposed for the one-chip development of the multimedia IC chip is insufficient to embed the power control function in the multimedia IC chip, and there is a demand for a technical method to ensure more stable circuit operation.

An object of the present invention is to provide a power control function in one multimedia IC chip such as applying a driving clock and generating a driving voltage for playing multimedia data and executing an application program. The present invention provides a power control device for a multimedia IC chip that can generate unnecessary driving clock frequencies and driving voltage values to prevent unnecessary power waste.

The power control device for a multimedia IC chip according to the present invention comprises a memory for storing one or more application programs; An arithmetic throughput table storing arithmetic throughput required for each functional block; A driving clock mapping table storing driving clock values corresponding to the total throughput; A driving clock generator configured to generate a driving clock for driving an application program; A driving voltage generator configured to receive an external power source and generate driving voltages for driving the entire computational throughput; Recognizes the functional blocks driven for the execution of the application program and the basic operation of the IC chip system, calculates the total computational throughput of each functional block to be driven through the computational throughput table, and corresponds to the total computational throughput from the driving clock mapping table. And a control unit which generates a clock control signal for controlling the generation of a driving clock having a driving clock value by reading the driving clock value and providing the driving clock value to the driving clock generator.

In accordance with another aspect of the present invention, there is provided a power control method of a multimedia IC chip, the method comprising: (a) storing a calculation throughput table in which a calculation throughput required for each function block is stored; (b) storing a driving clock mapping table in which driving clock values corresponding to total computational throughput are stored; (c) receiving external power from an outside of the IC chip; (d) recognizing a function block to be currently driven for executing an application program and operating an IC chip basic system; (e) calculating the total arithmetic throughput of the functional block to be driven currently from the arithmetic throughput table; (f) reading a driving clock value corresponding to the total arithmetic throughput from the driving clock mapping table; (g) generating a drive clock of the drive clock value; (h) regulating and generating a driving voltage using an external power source; And (i) driving the function block to be currently driven by applying the generated driving clock and driving voltage.

According to the present invention, a driving clock suitable for executing various application programs on a multimedia IC chip can be generated, and a driving voltage suitable for the physical conditions of the IC chip and a function to be processed can be generated.

In addition, the power consumption can be reduced by generating an appropriate driving clock and driving voltage as described above.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a block diagram showing the overall configuration of a power control apparatus for a multimedia IC chip according to the present invention.

The multimedia IC chip 10 includes a memory 10, a driving clock generator 20, a driving voltage generator 30, and a controller 40. The multimedia IC chip 10 includes an image / audio output unit 50 and an external control interface ( 60) may be further included. Here, the video / audio output unit 50 is responsible for the external output so that the user can see and hear the video signal and audio signal generated by playing the multimedia data on the multimedia IC chip, the external control interface 60 is a user In addition, it receives the external control signal generated by the external device and provides the control unit 40 to control the driving conditions of the multimedia IC chip from outside.

The memory 10 is a kind of data storage space provided in the multimedia IC chip, and stores multimedia data 14 such as an audio file and a video file that can be played through one or more application programs and application programs for execution in the multimedia IC chip.

The computational throughput table 11 stores computational throughput required to execute various functional blocks executed at the firmware level of the multimedia IC chip. Here, the functional block means a codec processing function and a sound effect function that are activated according to the type of multimedia data such as H.264 video decoding, MPEG4 video decoding, MP3 audio encoding, and MP3 audio decoding. In addition, the computational throughput need not be a numerical value in a physically meaningful unit, and a numerical value so as to be able to compare the magnitude of the computational throughput by different functional blocks is appropriate.

For example, in order to reproduce video data, both video decoding and audio decoding must be performed in accordance with a format in which video data is encoded. Therefore, if a video file encoded in the MPEG4 video format is played by decoding the video file through MPEG4 video decoding, the MPEG4 video decoding function block is activated among various video decoding function blocks. A more specific example of the calculation throughput table 11 will be described in detail with reference to FIG. 2.

The driving clock mapping table 12 stores driving clock values corresponding to the total arithmetic throughput processed in the IC chip. In general, as the total computational throughput increases, the driving clock value is set higher, and as the total computational amount becomes smaller, the driving clock value also becomes smaller.

At this time, the values described in the driving clock mapping table 12 are fixed values obtained by an optimized test by a laboratory test for the corresponding IC chip, and are stored in the memory 10 or other components in the chip manufacturing process. It is stored in a fixed form by being provided.

The driving voltage mapping table 13 stores driving voltage values corresponding to the total computational throughput. Like the driving clock mapping table 12, the driving voltage mapping table 13 corresponds to a mapping table having a fixed value, and the values stored in the mapping table are optimized by obtaining a plurality of laboratory tests under the same physical conditions as the IC chip. It is a number.

The above driving clock mapping table 12 and the driving voltage mapping table 13 are generally stored in the memory 10 but may be fixed in a physical configuration in advance in other components. The driving clock mapping table 12 and the driving voltage mapping table 13 will be described in more detail with reference to FIG. 3.

The driving clock generator 20 generates a driving clock for driving an application program in the IC chip. In this case, the driving clock generator 20 generates a driving clock having a specified frequency under the control of the controller 40, and the controller 40 determines the driving clock frequency through the driving clock mapping table 12. The operation of controlling the generation of the driving clock in the following will be described in more detail with reference to the controller 40.

The driving voltage generator 30 receives an external power source and generates a driving voltage for driving the entire computational processing in the IC chip. In this case, the driving voltage generator 30 generates a driving voltage having a specified value through the control of the controller 40, and the controller 40 determines the driving voltage value through the driving voltage mapping table 13. The operation of controlling the generation of the driving voltage in the following will be described in more detail with reference to the controller 40.

The controller 40 generates a clock control signal and provides the driving clock generator 20 to generate a driving clock having a specific frequency. The controller 40 generates a power control signal and provides the driving voltage generator 30 to the driving voltage generator 30. Control to generate a driving voltage.

In order to determine the driving clock value and the driving voltage value in this way, the controller 40 reads the driving clock value corresponding to the entire operation throughput in the IC chip from the driving clock mapping table 12 described above, and drives the driving voltage mapping table 13. From this, the driving voltage value corresponding to the total operation throughput to be driven must be read. As mentioned above, the values stored in each mapping table are not fixed by the IC chip itself, but fixed from the outside and fixed to the IC chip.

The control unit 40 sends a clock control signal and a power control signal to the driving clock generator 20 and the driving voltage generator 30, respectively, so that the driving clock and the driving voltage corresponding to the current total throughput of the IC chip are generated. .

At this time, in order to know the total arithmetic throughput in the IC chip, the controller 40 first recognizes a functional block driven for execution of an application program and a basic system operation of the IC chip in the IC chip, and the arithmetic throughput table 11 mentioned above. The total computational throughput of the IC chip is calculated by summing up the computational throughput of each functional block to be driven.

In addition, when a change occurs in the total computational throughput of the IC chip, the controller 40 updates the total computational throughput through the following operation process. In other words, if a function block that is newly driven by the execution addition of some application programs is added to the calculated total computational throughput, the total computational throughput is updated by summing the computational throughput of the functional block. When a function block that is no longer driven due to execution of some application programs is generated, the total calculation throughput is updated by excluding the calculation throughput of the corresponding function block from the total calculation throughput.

In summary, the controller 40 detects an activated function block in the IC chip, calculates the total calculation throughput from the calculation throughput table 11, and drives the drive clock mapping table 12 and the driving voltage mapping table 13. The driving clock value and the driving voltage value corresponding to the total arithmetic throughput are read from the driving clock. The driving clock generator 20 and the driving voltage generator 30 generate the corresponding driving clock and driving voltage, respectively, thereby processing the current IC chip. Drive clocks and drive voltages optimized for operation are generated and used to drive processing operations in the IC chip.

2 is an exemplary diagram of a calculation throughput table in which calculation throughput for each function block executed in the IC chip is stored.

In the illustrated throughput table, the functional blocks are subdivided by whether they are encoded / decoded, video / audio, by codec type, and by sound effects, and the throughput required to process each functional block is described as a simple ratio. .

There are various types of video codecs such as H.264, MPEG2, and MPEG4. If the multimedia data to be played is encoded in the MPEG4 format, the MPEG-4 decoder must be used to decode the file. Likewise, in order to play an MP3 audio file, the file must be decoded by the MP3 audio encoder. In this case, video decoding generally requires more computational processing than audio decoding, and as illustrated in FIG. 2, it requires '7' for MPEG4 video decoding and '3' for MP3 audio decoding. Computational throughput is required.

Also, encoding generally requires more computational throughput than decoding operations. That is, according to the arithmetic throughput table of FIG. 2, the MP3 audio decoding functional block requires a computational throughput of '1' while the MP3 audio encoding functional block requires a computational throughput of '3'.

The method of calculating the total processing throughput currently processed in the IC chip through the processing throughput table is as follows. For example, if the MPEG2 video decoding, the Dolby-AC3 audio decoding, and the surround sound effect function block are activated in the current IC chip as shown in the example of FIG. 2, the computational throughput of each functional block is summed to calculate the total computational throughput. At this time, since the computational throughput required for the basic system operation of the IC chip should always be considered, the computational throughput corresponding to the basic system operation is also summed together.

That is, if the total calculation throughput is calculated using the example of FIG. 2, since 5 + 6 + 1.5 + 0.8 = 13.3, a value of '13 .3 'is obtained as the total calculation throughput.

In addition, when multiple application programs or multiple multimedia data are played through the multitasking function in the IC chip, the total throughput is calculated by summing up the throughputs of all the functional blocks activated for each process.

3 is an exemplary diagram of a driving clock mapping table and a driving voltage mapping table included in an IC chip.

That is, FIG. 3A) shows a drive clock mapping table created based on the arithmetic throughput table illustrated in FIG. 2, and FIG. 3B) likewise shows a driving voltage mapping table based on the numerical values mentioned in the arithmetic throughput table of FIG. 2. Indicates. Then, both the drive clock described in the drive clock mapping table and the drive voltage described in the drive voltage mapping table are fixed values to be optimized under a given physical condition through laboratory tests.

For example, if a value of '13 .3 'is obtained as the total throughput through the example of FIG. 2, a driving clock of 40 MHz corresponding to a period of the total computational throughput '11 to 14' is obtained through the driving clock mapping table of FIG. 3a). Through the driving voltage mapping table of FIG. 3B), a driving voltage of 1.9 V corresponding to a total operation throughput of '10 to 15 'is obtained.

The control unit provides control codes '0011' and '0010' to the driving clock generator and the driving voltage generator, respectively, and recognizes the control codes provided by the driving clock generator and the driving voltage generator to correspond to each control code. Generate a drive clock and drive voltage.

Figure 4 is a flow chart showing the overall operation of the power control method of the multimedia IC chip according to the present invention.

Since the components and terms described with reference to FIGS. 4 and 5 are technically the same as those described above with reference to FIGS. 1 to 3, the above-described descriptions are provided to identify specific technical configurations for implementing each process described later. See the contents.

First, a calculation table is stored in the multimedia IC chip (ST10). The calculation throughput table stores the calculation throughput required for each function block. At this time, the functional block is an execution level of the IC chip's firmware level, and can be classified by encoding function, decoding function, video codec, and audio codec, and the operation throughput table shows the computational throughput required for driving the individual function blocks. Digitize and save.

Next, a driving voltage mapping table storing driving voltage values corresponding to the total arithmetic throughput is stored, and a driving clock mapping table storing driving clock values corresponding to the entire arithmetic processing (ST20). The values stored in the driving voltage mapping table and the driving clock mapping table are selected through a number of tests under the same physical conditions as the IC chip and are stored as fixed values on the IC chip.

Then, external power is received from the outside of the IC chip (ST30). The input external power is not directly used to drive the IC chip, but afterwards, it generates a regulated driving voltage to an appropriate value and is supplied inside the IC chip.

Subsequently, the IC chip recognizes a function block to be currently driven for executing an application program and operating an IC chip basic system, and calculates a total operation throughput of the function block to be currently driven from the calculation throughput table (ST40).

That is, when an application program is executed or a multimedia data playback command is issued by an external operation, the executed application program plays and plays the multimedia data using a system program (firmware) installed in the IC chip through an API (application programming interface) call. It provides information necessary to execute a program, and the firmware determines which function block to activate in response to a request of an application program.

For example, if a DMB program and an MP3 player are running, the IC chip's firmware is ready to activate the DMB audio decoding function and the DMB video decoding function to run the DMB program, and the MP3 audio decoding function is ready to activate the MP3 player. do.

After the functional blocks to be activated are recognized, the total throughput is calculated by summing all the throughputs of the corresponding functional blocks with reference to the calculation throughput table.

After the total computational throughput to be processed by the IC chip is calculated, the driving clock value corresponding to the total computational throughput is read from the driving clock mapping table, and a driving clock of the corresponding driving clock value is generated (ST50).

In addition, the driving voltage mapping table reads the driving voltage value corresponding to the entire operation throughput calculated above, and regulates the driving voltage of the driving voltage value by using the external power input previously (ST60).

When the driving clock and the driving clock are generated through the above process, the IC chip is processed by the optimized driving clock and the driving voltage by driving the functional block to be driven by applying the driving clock and the driving voltage (ST70).

FIG. 5 is a flowchart illustrating an operation process of step ST40 of recognizing a function block currently driven in FIG. 4 and calculating a total operation throughput.

As described above, the total computational throughput is calculated by summing all computational throughputs of the function blocks to be driven currently (ST41).

When a new application or a new multimedia data task is added even on the same application program (ST42), the firmware adds the calculation throughput of the newly-operated function block to the total calculation throughput previously calculated. The update is made (ST43).

In addition, when some of the currently running application program is suspended or terminates the execution of the multimedia data currently in operation (ST44), the total computational throughput is updated by excluding the computational throughput of the function block that is no longer driven from the total computational throughput. (ST45).

As described above, the driving clock and the driving voltage generation process after the entire arithmetic processing amount is updated is the same as the process described with reference to FIG. 6.

Although the present invention has been described in more detail with reference to the examples, the present invention is not necessarily limited to these embodiments, and various modifications can be made without departing from the spirit of the present invention. Therefore, the embodiments disclosed in the present invention are not intended to limit the technical idea of the present invention but to describe the present invention, and the scope of the technical idea of the present invention is not limited by these embodiments. The protection scope of the present invention should be interpreted by the following claims, and all technical ideas within the equivalent scope should be interpreted as being included in the scope of the present invention.

1 is a block diagram showing the overall configuration of a power control apparatus for a multimedia IC chip according to the present invention;

2 is an exemplary diagram of a calculation throughput table in which calculation throughput for each function block executed in the IC chip is stored;

3 is a diagram illustrating a driving clock mapping table and a driving voltage mapping table included in an IC chip;

4 is a flowchart showing the overall operation of the power control method of the multimedia IC chip according to the present invention;

FIG. 5 is a flowchart illustrating an operation process of step ST40 of recognizing a function block currently driven in FIG. 4 and calculating a total operation throughput.

Claims (7)

delete delete delete (a) providing a computational throughput table in which the computational throughput required for driving the individual functional blocks for each functional block provided for each encoding function, decoding function, video codec, and audio codec is numerically stored; (b) providing a driving clock mapping table in which driving clock values corresponding to total computational throughput are stored; (c) receiving an external power source from the outside of the multimedia IC chip; (d) recognizing a function block to be currently driven for executing the application and for operating the basic system of the multimedia IC chip when the application is executed; (e) summing up all the computational throughputs of the function blocks to be driven from the computational throughput table, and calculating the total computational throughput, and adding the computational throughput of the newly-operated functional blocks to the total computational throughput when an application program addition occurs. Updating the total arithmetic throughput by excluding the arithmetic throughput of a function block that is no longer driven when an application program execution stops, from the total arithmetic throughput; (f) reading a driving clock value corresponding to the total arithmetic throughput from the driving clock mapping table; (g) generating a driving clock of the driving clock value; (h) regulating and generating a driving voltage using the external power source; And (i) driving the function block to be currently driven by applying the generated driving clock and driving voltage; Power control method of a multimedia IC chip comprising a. The method according to claim 4, The step (b) further includes the step of storing a driving voltage mapping table in which the driving voltage value corresponding to the total operation throughput is driven, The step (h) includes a step of generating a driving voltage having the driving voltage value by reading the driving voltage value corresponding to the total operation throughput from the driving voltage mapping table. Control method. delete delete

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