KR100926304B1 - Array substrate, liquid crystal display device having the same and method of driving the same - Google Patents

Abstract

An array substrate, a liquid crystal display device having the same, and a driving method thereof are disclosed. The array substrate includes a gate line, a data line crossing the gate line to define a pixel area, and a switching element connected to the gate line and the data line. The transmissive electrode is connected to the switching element and provided in the first region of the pixel region, and the reflective electrode is insulated from the transmissive electrode and provided in the second region of the pixel region adjacent to the first region. In addition, the compensation wiring is connected to the switching element and faces the reflective electrode with the insulating layer interposed therebetween. Therefore, the display characteristic of a liquid crystal display device can be improved.

Description

Array substrate, liquid crystal display device having same and driving method thereof {ARRAY SUBSTRATE, LIQUID CRYSTAL DISPLAY DEVICE HAVING THE SAME AND METHOD OF DRIVING THE SAME}

1 is a cross-sectional view of a liquid crystal display according to an exemplary embodiment of the present invention.

FIG. 2 is a plan view of the array substrate shown in FIG. 1.

3 is an equivalent circuit diagram of a unit pixel of the liquid crystal display shown in FIG. 1.

4 is a plan view of an array substrate according to another embodiment of the present invention.

5 is a cross-sectional view of a liquid crystal display according to another exemplary embodiment of the present invention.

FIG. 6 is a plan view of the array substrate illustrated in FIG. 5.

FIG. 7 is an equivalent circuit diagram of a unit pixel of the liquid crystal display shown in FIG. 5.

8 is a plan view of an array substrate of a liquid crystal display according to another exemplary embodiment of the present invention.

FIG. 9 is an equivalent circuit diagram of a unit pixel of the liquid crystal display shown in FIG. 8.

10 is a plan view of an array substrate of a liquid crystal display according to another exemplary embodiment of the present invention.

FIG. 11 is an equivalent circuit diagram of a unit pixel of the liquid crystal display shown in FIG. 10.

12 is a waveform diagram of FIG. 11.

<Explanation of symbols for the main parts of the drawings>                 

100: array substrate 120: TFT

125: first auxiliary wiring 126: second auxiliary wiring

128: compensation wiring 130: protective film

140: transmission electrode 150: reflection electrode

200: color filter substrate 230: common electrode

400: liquid crystal display

The present invention relates to an array substrate, a liquid crystal display having the same, and a driving method thereof, and more particularly, to an array substrate capable of improving display characteristics, a liquid crystal display having the same, and a driving method thereof.

The transflective liquid crystal display displays an image in a reflection mode using the first light where the external light amount is abundant, and in the transmissive mode using the second light generated by consuming the electric energy charged therein when the external light amount is insufficient. Display the image.

In general, the transflective liquid crystal display device includes a liquid crystal display panel composed of a TFT substrate, a color filter substrate facing the TFT substrate, and a liquid crystal layer interposed between the TFT substrate and the color filter substrate.

The TFT substrate is a substrate in which a plurality of unit pixels are formed in a matrix form. Each of the unit pixels includes a data line extending in a first direction, a gate line extending in a second direction perpendicular to the first direction, and a TFT connected to the data line and the gate line in a pixel region partitioned by the data line and the gate line. It includes. The TFT is connected to a transmission electrode made of a transparent conductive film and a reflection electrode having excellent reflectance, respectively. Here, the region where the reflective electrode is formed on the transmissive electrode is a reflective region, and the region where the reflective electrode is not formed on the transmissive electrode is a transmissive region.

A protective film is interposed between the TFT and the transmissive electrode. A contact hole exposing the drain electrode is formed in the passivation layer, and the transmission electrode and the drain electrode are electrically connected through the contact hole.

In general, the transflective liquid crystal display has different cell gaps in the transmission region and the reflection region in order to improve light efficiency in the reflection mode and the transmission mode. In other words, the first cell gap of the transmission region is twice the second cell gap of the reflection region. Such a semi-transmissive liquid crystal display device having a double cell gap is implemented by adjusting the thickness of the protective film provided on the TFT substrate.

However, in forming the double cell gap by adjusting the thickness of the protective film, it is difficult to secure an accurate cell gap because the amount of the protective film cannot be precisely controlled due to the process characteristics.

It is therefore an object of the present invention to provide an array substrate for improving display characteristics.                         

Another object of the present invention is to provide a liquid crystal display device having the above array substrate.

Still another object of the present invention is to provide a method of driving the above liquid crystal display device.

An array substrate according to an aspect of the present invention for achieving the above object includes a gate line, a data line crossing the gate line to define a pixel region, and a switching element connected to the gate line and the data line. The transmissive electrode is connected to the switching element and provided in the first region of the pixel region, and the reflective electrode is insulated from the transmissive electrode and provided in the second region of the pixel region adjacent to the first region. In addition, a compensation line is connected to the switching element and faces the reflective electrode with an insulating layer interposed therebetween.

In addition, an array substrate according to another aspect of the present invention, a first gate line, a second gate line insulated from the first gate line, a data line crossing the first and second gate lines to define a pixel region, And a first switching element connected to the first gate line and the data line, and a second switching element connected to the second gate line. The transmissive electrode is connected to the second switching element and provided in the first region of the pixel region, and the reflective electrode is insulated from the transmissive electrode and provided in the second region of the pixel region adjacent to the first region. In addition, the compensation wiring is connected to the first switching element, and faces the reflective electrode and the transmissive electrode with an insulating layer interposed therebetween.                     

A liquid crystal display device according to an aspect of the present invention includes a first substrate, a second substrate, and a liquid crystal layer interposed between the first substrate and the second substrate.

A gate line, a data line insulated from and intersecting the gate line to define a pixel area, and a switching element connected to the gate line and the data line are provided on the first substrate. In addition, the transmission electrode is connected to the switching element and provided in the first region of the pixel region, and the reflection electrode is provided in the second region of the pixel region insulated from the transmission electrode and adjacent to the first region. In addition, a compensation line is connected to the switching element and insulated from and insulated from the reflective electrode in the second region.

The second substrate includes a common electrode facing the reflective electrode and the transmission electrode with the liquid crystal layer interposed therebetween.

A liquid crystal display device according to another aspect of the present invention includes a first substrate, a second substrate, and a liquid crystal layer interposed between the first substrate and the second substrate.

A first gate line, a second gate line insulated from the first gate line, a data line insulated from and intersecting the first and second gate lines to define a pixel region on the first substrate, and the first gate line; A first switching device connected to the data line and a second switching device connected to the second gate line are provided. In addition, the transmission electrode is connected to the second switching element and provided in the first region of the pixel region, and the reflective electrode is insulated from the transmission electrode and provided in the second region of the pixel region adjacent to the first region. . In addition, the compensation wiring is connected to the first switching element, and faces the reflective electrode and the transmissive electrode with an insulating layer interposed therebetween.

A common electrode facing the transmissive electrode and the reflective electrode is provided on the second substrate with the liquid crystal layer interposed therebetween.

In a method of driving a liquid crystal display according to an aspect of the present invention, a gate voltage is output to a gate line, and a data voltage applied from a data line is output in response to the gate voltage. Thereafter, the data voltage is applied to the transmission electrode as a transmission voltage, and a voltage lower than the data voltage is applied to the reflection electrode as the reflection voltage, and the common electrode facing the transmission electrode and the reflection electrode and the liquid crystal layer is interposed therebetween. Apply common voltage. Next, the difference between the transmission voltage and the common voltage is charged between the transmission electrode and the common electrode, and the difference between the reflection voltage and the common voltage is charged between the reflection electrode and the common electrode. .

According to another aspect of the present invention, a method of driving a liquid crystal display device outputs a first gate voltage to a first gate line, and outputs a first data voltage applied from a data line in response to the first gate voltage. Next, a voltage higher than the first data voltage is applied to the transmissive electrode as a transmission voltage, a voltage lower than the first data voltage is applied as a reflected voltage to the reflective electrode, and the transmissive electrode and the reflective electrode and the liquid crystal layer are interposed therebetween. The common voltage is applied to the common electrode facing each other. Next, the difference between the transmission voltage and the common voltage is charged between the transmission electrode and the common electrode, and the difference between the reflection voltage and the common voltage is charged between the reflection electrode and the common electrode. .

According to such an array substrate, a liquid crystal display device having the same, and a driving method thereof, the transmission electrode is provided in the first region of the pixel region, and the reflection electrode is insulated from the transmission electrode and is disposed in the second region of the pixel region adjacent to the first region. It is provided. At this time, the compensation wiring faces the reflective electrode with the insulating layer interposed therebetween. Accordingly, different voltages may be applied to the reflective electrode and the transmission electrode while maintaining the cell gap of the liquid crystal display device uniformly, thereby improving display characteristics of the liquid crystal display device.

Hereinafter, with reference to the accompanying drawings, it will be described in detail a preferred embodiment of the present invention.

1 is a cross-sectional view of a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 2 is a plan view of the array substrate illustrated in FIG. 1.

1 and 2, an LCD 400 according to an exemplary embodiment of the present invention may include an array substrate 100, a color filter substrate 200, and the array substrate 100 and a color filter substrate 200. And a liquid crystal layer 300 interposed therebetween.

The array substrate 100 includes a first substrate 110, a gate line GL, a data line DL, and a thin film transistor (TFT) 120 provided on the first substrate 110. ), A transmissive electrode 140 and a reflective electrode 150.

The gate line GL extends in a first direction D1 on the first substrate 110, and the data line DL extends in a second direction D2 orthogonal to the first direction D1. And insulates and crosses the gate line GL. The first substrate 110 is provided with a pixel area PA partitioned by the gate line GL and the data line DL.                     

In the pixel area PA, the gate electrode 121 of the TFT 120 is connected to the gate line GL, the source electrode 122 is connected to the data line DL, and the drain electrode 123 Is connected to the transmission electrode 140.

A passivation layer 130 is interposed between the transmission electrode 140 and the TFT 120, and the passivation layer 130 has a first contact hole 131 for exposing the drain electrode 123 of the TFT 120. ) Is provided. The transmission electrode 140 is provided on the passivation layer 130 and is electrically connected to the drain electrode 123 through the first contact hole 131.

The transmission electrode 140 is provided in the first area A1 which is a part of the pixel area PA, and the reflection electrode 150 is insulated from the transmission electrode 140 and is another part of the pixel area PA. It is provided in the 2nd area | region A2.

As shown in FIGS. 1 and 2, the first region A1 is provided with a first auxiliary wiring 125 insulated from the transmissive electrode 140 and faces the second region A2. The second auxiliary line 126 is insulated from and reflected from the reflective electrode 150. The first and second auxiliary lines 125 and 126 are patterned at the same time as the gate line GL.

The compensation substrate 128 is further provided on the first substrate 110 to be electrically connected to the drain electrode 123 of the TFT 120 and to be insulated from the reflective electrode 150. The compensation line 128 is patterned at the same time as the data line DL.

1 and 2, the compensation wiring 128 is patterned at the same time as the data line DL, but the compensation wiring 128 may be simultaneously patterned with the gate line GL.

The color filter substrate 200 may include a second substrate 210, a color filter 220 provided on the second substrate 210, and a common electrode 230 provided on the color filter 220. Include. When the color filter substrate 200 and the array substrate 100 are combined, the common electrode 230 faces the transmissive electrode 140 and the reflective electrode 150, respectively. Thereafter, the liquid crystal layer 300 is interposed between the color filter substrate 200 and the array substrate 100 to complete the liquid crystal display device 400.

The first distance d1 between the common electrode 230 and the transmission electrode 140 in the first region A1 is the common electrode 230 and the reflective electrode 150 in the second region A2. It is equal to the second distance d2 with). That is, the liquid crystal display 400 has the same cell gap in the first area A1 and the second area A2.

3 is an equivalent circuit diagram of a unit pixel of the liquid crystal display shown in FIG. 1.

1 and 3, a unit pixel includes a gate line GL and a data line DL. The gate electrode 121 and the source electrode 122 of the TFT 120 are connected to the gate line GL and the data line DL, respectively. A first liquid crystal capacitor Clct, a first auxiliary capacitor Cstt, a second auxiliary capacitor Clstr, and a compensation capacitor Ccpr are connected in parallel to the drain electrode 123 of the TFT 120, and the compensation capacitor ( Ccpr is connected in series with the second liquid crystal capacitor Clcr.

The first liquid crystal capacitor Clct is a capacitance formed between the common electrode 230 of the color filter substrate 200 and the transmissive electrode 140 of the array substrate 100, and the first auxiliary capacitor Clst Is a capacitance formed between the first auxiliary line 125 of the array substrate 100 and the transmission electrode 140, and the second auxiliary capacitor Cstr is a second auxiliary capacitor of the array substrate 100. It is a capacitance formed between the wiring 126 and the reflective electrode 150. In addition, the second liquid crystal capacitor Clcr is a capacitance formed between the reflective electrode 150 and the common electrode 230, and the compensation capacitor Ccpr is the reflective electrode 150 and the compensation wiring. It is the capacitance formed between and (128). Here, the compensation capacitor Ccpr increases in proportion to the overlap area of the reflective electrode 150 and the compensation wiring 128.

When the gate voltage provided to the gate line GL is provided to the gate electrode 121 of the TFT 120, the TFT 120 is turned on. Therefore, the data voltage Vd provided to the source electrode 122 of the TFT 120 through the data line DL is output to the drain electrode 123 of the TFT 120. The data voltage output to the drain electrode 123 of the TFT 120 is applied to the transmission electrode 140 and the compensation wiring 128, respectively.

On the other hand, the common electrode voltage is applied to the common electrode 230 provided on the color filter substrate 200 from the outside. Here, the common electrode voltage is assumed to be 0V.

When the data voltage Vd is applied to the transmission electrode 140 through the TFT 120, the data voltage Vd is charged in the first liquid crystal capacitor Clct. The second liquid crystal capacitor Clcr is charged with a compensation voltage Vr lowered by a predetermined voltage than the data voltage Vd. That is, the data voltage Vd is distributed and charged to the compensation capacitor Ccpr and the second liquid crystal capacitor Clcr, respectively.

As shown in Equation 1, since the sum of the compensation capacitor Ccpr and the second liquid crystal capacitor Clcr is always larger than the compensation capacitor Ccpr, the compensation voltage Vr is the data voltage ( Lower than Vd). Therefore, the reflection voltage applied to the reflective electrode 150 is always smaller than the transmission voltage applied to the transmission electrode 140.

4 is a plan view of an array substrate according to another embodiment of the present invention.

Referring to FIG. 4, an array substrate 101 according to another embodiment of the present invention may include a first substrate 110, a gate line GL, a data line DL, and the like provided on the first substrate 110. The TFT 120, the transmission electrode 140, the reflection electrode 150, and the compensation wiring 128 are formed.

The gate line GL extends in a first direction D1 on the first substrate 110, and the data line DL extends in a second direction D2 orthogonal to the first direction D1. And insulates and crosses the gate line GL. The pixel area is provided on the first substrate 110 by the gate line GL and the data line DL. The compensation line 128 faces the reflective electrode 150 in the pixel area.

In the pixel area, the gate electrode 121 of the TFT 120 is connected to the gate line GL, the source electrode 122 is connected to the data line DL, and the drain electrode 123 is connected to the It is electrically connected to the compensation wiring 128.

The reflective electrode 140 is provided in the first area A1 that is a part of the pixel area, and the transmission electrode 150 is electrically insulated from the transmission electrode 140 and is a second area that is another part of the pixel area. A2) is provided. The transmission electrode 140 is electrically connected to the compensation wiring 128 in the second area A1 through the second contact hole 135. Accordingly, the transmission electrode 140 is electrically connected to the drain electrode 123 of the TFT 120 through the compensation line 128.

FIG. 5 is a cross-sectional view of a liquid crystal display according to another exemplary embodiment. FIG. 6 is a plan view of the array substrate shown in FIG. 5.

5 and 6, an LCD 500 according to another exemplary embodiment of the present invention may include an array substrate 103, a color filter substrate 200, and the array substrate 103 and a color filter substrate 200. And a liquid crystal layer 300 interposed therebetween.

The array substrate 103 includes a first substrate 110, a first gate line GLn-1, a second gate line GLn, a data line DL, and a first substrate 110 provided on the first substrate 110. It consists of one TFT (T1), a second TFT (T2), a transmissive electrode 140, a reflective electrode 150 and a compensation wiring 128.

Here, n is a natural number of 2 or more, a plurality of gate lines are provided on the array substrate 103, the first gate line GLn-1 is an n−1 th gate line, and the second gate line GLn ) Is the nth gate line.

The first gate line GLn-1 extends in the first direction D1 on the first substrate 110, and the second gate line GLn extends in the first direction D1 and the first gate line GLn-1 extends in the first direction D1. It is spaced apart from one gate line GLn-1 at a predetermined interval. The data line DL extends in a second direction D2 orthogonal to the first direction D1 and insulates and crosses the first and second gate lines GLn-1 and GLn. Therefore, the pixel area PA is provided on the first substrate 110 by the first and second gate lines GLn-1 and GLn and the data line DL.

In the pixel area PA, the gate electrode 161 of the first TFT T1 is connected to the first gate line GLn-1, the source electrode 162 is provided with a ground voltage, and the drain electrode ( 163 is connected to the transmission electrode 140. The transmission electrode 140 is provided in the first area A1 which is a part of the pixel area PA. The compensation line 128 is insulated from and faces the transmissive electrode 140 in the first region A1.

In addition, in the pixel area PA, the gate electrode 121 of the second TFT T2 is connected to the second gate line GLn, and the source electrode 122 is connected to the data line DL. The drain electrode 123 is connected to the compensation wiring 128. Here, the reflective electrode 150 is provided in the second area A2 which is another part of the pixel area PA, and is electrically insulated from the transmission electrode 140. In addition, the compensation line 128 is insulated from and faces the reflective electrode 140 in the second region A2.

A passivation layer 130 made of an organic insulating layer is provided on the first substrate 110 on which the first TFT T1, the second TFT T2, and the compensation wiring 128 are formed. The passivation layer 130 electrically insulates the transmissive electrode 140 and the compensation line 128 from the first region A1, and the reflective electrode 150 and the beam in the second region A2. The phase wiring 128 is electrically insulated.

The passivation layer 130 is provided with a contact hole 131 for exposing the drain electrode 163 of the first TFT T1. The transmission electrode 140 is provided on the passivation layer 130 and is electrically connected to the drain electrode 163 through the contact hole 131.

In addition, the first region A1 is provided with a first auxiliary wiring 125 that is insulated from and faces the transmissive electrode 140, and the second region A2 is insulated from the reflective electrode 150. The second auxiliary wiring 126 is provided.

 The color filter substrate 200 may include a second substrate 210, a color filter 220 provided on the second substrate 210, and a common electrode 230 provided on the color filter 220. Include.

The first distance d1 between the common electrode 230 and the transmission electrode 140 in the first region A1 is the common electrode 230 and the reflective electrode 150 in the second region A2. It is equal to the second distance d2 with). That is, the liquid crystal display 500 has the same cell gap in the first area A1 and the second area A2.

FIG. 7 is an equivalent circuit diagram of a unit pixel of the liquid crystal display shown in FIG. 5.

5 and 7, the unit pixel may include a first gate line GLn-1, a second gate line GLn, and a data line spaced apart from the first gate line GLn-1 at predetermined intervals. DL). The gate electrode of the first TFT T1 is connected to the first gate line GLn-1, and the ground voltage is provided to the source electrode of the first TFT. A gate and a source electrode of the second TFT T2 are connected to the second gate line GLn and the data line DL, respectively.

A first liquid crystal capacitor Clct and a first auxiliary capacitor Cstt are connected in parallel to the drain electrode of the first TFT T1. A second auxiliary capacitor Cstr and a second compensation capacitor Ccpr are connected in parallel to the drain electrode of the second TFT T2, and the second compensation capacitor Ccpr is connected in series with a second liquid crystal capacitor Clcr. do. In addition, the first liquid crystal capacitor Clcr and the second compensation capacitor Ccpr are connected in series by a first compensation capacitor Ccpt.

The first liquid crystal capacitor Clct is a capacitance formed between the common electrode 230 of the color filter substrate 200 and the transmissive electrode 140 of the array substrate 103, and the first auxiliary capacitor Cstt. Is a capacitance formed between the first auxiliary line 125 of the array substrate 103 and the transmission electrode 140. The second auxiliary capacitor Cstr is a capacitance formed between the second auxiliary line 126 of the array substrate 103 and the reflective electrode 150, and the second liquid crystal capacitor Clcr is the reflection. The capacitance is formed between the electrode 150 and the common electrode 230. In addition, the first compensation capacitor Ccpt is a capacitance formed between the transmission electrode 140 and the compensation line 128, and the second compensation capacitor Ccpr is the reflection electrode 150 and the It is a capacitance formed between the compensation wiring 128.

When a first gate voltage is applied to the first gate line GLn-1, the first gate voltage is provided to the gate electrode of the first TFT T1, whereby the first TFT T1 is turned on. do. At this time, the ground voltage provided to the source electrode of the first TFT (T1) is output to the drain electrode of the first TFT (T1). Meanwhile, the second TFT T2 maintains a turn-off state, whereby the drain electrode of the second TFT T2 maintains a negative voltage lower than that of the first TFT T1.

Therefore, the reflection voltage Vr applied to the reflective electrode 150 during charging by the first TFT T1 is lower than the transmission voltage Vt applied to the transmission electrode 140.

Subsequently, when a second gate voltage is applied to the second gate line GLn, the second gate voltage is provided to the gate electrode of the second TFT T2, whereby the second TFT T2 is turned on. do. Since the first gate voltage is output to the first gate line GLn-1 until the second gate voltage is applied to the second gate line GLn, the second TFT T2 is turned on. The first TFT T1 is turned off. When the first TFT is turned off, the transmissive electrode 140 is in a floating state.

Thereafter, the turned-on second TFT T2 outputs the data voltage Vd provided to the source electrode through the data line DL to the drain electrode. The reflection voltage Vr and the transmission voltage Vt are increased by the data voltage Vd. In this case, the transmission voltage Vt is increased while maintaining a voltage level higher than the reflection voltage Vr.

When we define as

In the equivalent circuit shown in FIG. 7, the transmission voltage Vt applied to the transmission electrode 140 when the second TFT T2 is turned on is defined as in Equation 3 below.

As shown in Equation 3, the transmission voltage Vt has a voltage higher than the data voltage Vd.

8 is a plan view of an array substrate of a liquid crystal display according to another exemplary embodiment of the present invention, and FIG. 9 is an equivalent circuit diagram of a unit pixel of the liquid crystal display shown in FIG. 8. 8 and 9 operate in a dot inversion driving method.

Referring to FIG. 8, the array substrate 105 may include a first gate line GLn-1, a second gate line GLn, a data line DL, a first TFT T1, a second TFT T2, The third TFT T3, the transmissive electrode 140, the reflective electrode 150, and the compensation wiring 128 are formed.

The first gate line GLn-1 extends in a first direction D1, and the second gate line GLn extends in the first direction D1 and the first gate line GLn-1. And spaced apart at predetermined intervals. The data line DL extends in a second direction D2 orthogonal to the first direction D1 and insulates and crosses the first and second gate lines GLn-1 and GLn. Accordingly, a pixel region is provided by the first and second gate lines GLn-1 and GLn and the data line DL.                     

In the pixel area, the gate electrode of the first TFT T1 is connected to the first gate line, the source electrode is connected to the ground voltage terminal GT, and the drain electrode is connected to the transmission electrode 140. Here, the transmission electrode 140 is provided in the first area A1 which is a part of the pixel area. The compensation line 128 is insulated from and faces the transmissive electrode 140 in the first region A1.

Further, in the pixel area, the gate electrode of the second TFT T2 is connected to the second gate line GLn, the source electrode is connected to the data line DL, and the drain electrode is connected to the compensation line 128. ). Here, the reflective electrode 140 is provided in the second area A2 which is another part of the pixel area, and is electrically insulated from the transmission electrode 140. In addition, the compensation wiring 128 is insulated from and faces the reflective electrode 150 in the second region A2.

In the pixel area, a gate electrode of the third TFT T3 is connected to the first gate line GLn-1, a source electrode is connected to the data line DL, and a drain electrode is connected to the compensation line 128. ).

9, a unit pixel includes the first gate line GLn-1, the second gate line GLn, and the data line DL. A gate and a source electrode of the first TFT T1 are connected to the first gate line GLn-1 and the ground voltage terminal GT, respectively, and the second gate line GLn and the data line DL are connected to each other. The gate and the source electrode of the second TFT (T2) are connected to each other. In addition, a gate and a source electrode of the third TFT T3 are connected to the first gate line GLn-1 and the data line DL, respectively.

A first liquid crystal capacitor Clct and a first auxiliary capacitor Cstt are connected in parallel to the drain electrode of the first TFT T1. A second auxiliary capacitor Cstr and a second compensation capacitor Ccpr are connected in parallel to the drain electrode of the second TFT T2, and the second compensation capacitor Ccpr is connected in series with a second liquid crystal capacitor Clcr. do. In addition, the first liquid crystal capacitor Clct and the second compensation capacitor Ccpr are connected in series by a first compensation capacitor Ccpt.

The first electrode of the first compensation capacitor Ccpt is connected to the drain electrode of the first TFT T1, and the second electrode of the first compensation capacitor Ccpt is connected to the third TFT T3. It is connected to the drain electrode.

When the first gate voltage is applied to the first gate line GLn-1, the first gate voltage is provided to the gate electrode of the first TFT T1, thereby providing the first TFT T1 and the third. The TFT T3 is turned on. In this case, the ground voltage provided to the source electrode of the first TFT (T1) is output to the drain electrode of the first TFT (T1), and the first data voltage Vd1 provided to the source electrode of the third TFT (T3). Is output to the drain electrode of the third TFT (T3). Here, the first data voltage Vd1 has a negative voltage level.

The ground voltage is applied to the first electrode of the first compensation capacitor Ccpt, that is, the transmission electrode 140, and the first data voltage Vd1 is provided to the second electrode, thereby providing the first compensation capacitor Ccpt. ) Is charged by the difference between the ground voltage and the first data voltage Vd1.

Subsequently, when a second gate voltage is applied to the second gate line GLn, the second gate voltage is provided to the gate electrode of the second TFT T2, whereby the second TFT T2 is turned on. do. Since the first gate voltage is output to the first gate line GLn-1 until the second gate voltage is applied to the second gate line GLn, the second TFT T2 is turned on. The first TFT T1 is turned off. Thus, the transmissive electrode 140 maintains a floating state.

The turned-on second TFT T2 outputs the second data voltage Vd2 provided to the source electrode through the data line DL to the drain electrode. Here, the second data voltage Vd2 has a positive voltage level.

The second data voltage Vd2 is applied to the second electrode of the first compensation capacitor Ccpt while the second TFT T2 is turned on. In this case, the transmission voltage Vt increased by a predetermined voltage from the second data voltage Vd2 is applied to the first electrode of the first compensation capacitor Ccpt, that is, the transmission electrode 140.

In the equivalent circuit of FIG. 9, the transmission voltage Vt applied to the transmission electrode 140 when the second TFT T2 is turned on is defined as in Equation 4 below.

Here, C1, C2, C3 are as defined in the above equation (2).                     

As shown in Equation 4, the transmission voltage Vt has a voltage higher than the second data voltage Vd2.

FIG. 10 is a plan view of an array substrate of a liquid crystal display according to another exemplary embodiment. FIG. 11 is an equivalent circuit diagram of a unit pixel of the liquid crystal display shown in FIG. 10, and FIG. 12 is a waveform diagram of FIG. 11. However, the liquid crystal display shown in FIGS. 10 to 12 operates in a column inversion driving method.

Referring to FIG. 10, the array substrate 107 may include a first gate line GLn-1, a second gate line GLn, a data line DL, a first TFT T1, a second TFT T2, The transmission electrode 140, the reflection electrode 150, and the compensation wiring 128 are formed.

The gate electrode of the first TFT T1 is connected to the first gate line GLn-1, the source electrode is connected to the data line DL, and the drain electrode is connected to the transmissive electrode 140. . Here, the transmission electrode 140 is provided in the first area A1 which is a part of the pixel area. The compensation line 128 is insulated from and faces the transmissive electrode 140 in the first region A1.

In addition, the gate electrode of the second TFT T2 is connected to the second gate line GLn, the source electrode is connected to the data line DL, and the drain electrode is connected to the compensation wiring 128. . Here, the reflective electrode 150 is provided in the second area A2 which is another part of the pixel area, and is electrically insulated from the transmission electrode 140. In addition, the compensation wiring 128 is insulated from and faces the reflective electrode 150 in the second region A2.                     

Referring to FIG. 11, a unit pixel includes a first gate line GLn-1, a second gate line GLn, and a data line DL. The gate and source electrodes of the first TFT T1 are connected to the first gate line GLn-1 and the data line DL, respectively, and to the second gate line GLn and the data line DL. The gate and the source electrode of the second TFT T2 are respectively connected.

A first liquid crystal capacitor Clct and a first auxiliary capacitor Cstt are connected in parallel to the drain electrode of the first TFT T1. A second auxiliary capacitor Cstr and a second compensation capacitor Ccpr are connected in parallel to the drain electrode of the second TFT T2, and the second compensation capacitor Ccpr is connected in series with a second liquid crystal capacitor Clcr. do. In addition, the first liquid crystal capacitor Clct and the second compensation capacitor Ccpr are connected in series by a first compensation capacitor Ccpt.

11 and 12, when a first gate voltage is applied to the first gate line GLn-1, the first gate voltage is provided to the gate electrode of the first TFT T1. The first TFT T1 is turned on. In this case, the first data voltage Vd1 provided to the source electrode of the first TFT T1 is output to the drain electrode of the first TFT T1. The first data voltage Vd1 is a transmission voltage Vt applied to the transmission electrode 140. Meanwhile, the second TFT T2 maintains a turn-off state, whereby the drain electrode of the second TFT T2 maintains a negative voltage lower than that of the first TFT T1.

Therefore, after a point in time when the first TFT T1 is charged, the reflected voltage Vr applied to the reflective electrode 150 is lower than the transmissive voltage Vt applied to the transmissive electrode 140.

Subsequently, when a second gate voltage is applied to the second gate line GLn, the second gate voltage is provided to the gate electrode of the second TFT T2, whereby the second TFT T2 is turned on. do. Since the first gate voltage is output to the first gate line GLn-1 until the second gate voltage is applied to the second gate line GLn, the second TFT T2 is turned on. The first TFT T1 is turned off. Therefore, at the time when the first TFT T1 is turned off, the transmissive electrode 140 is in a floating state.

The turned-on second TFT T2 outputs the second data voltage Vd2 provided to the source electrode through the data line DL to the drain electrode. Here, the first and second data voltages Vd1 and Vd2 have positive voltage levels, and the first data voltage Vd1 is lower than the second data voltage Vd2.

Thereafter, the reflection voltage Vr and the transmission voltage Vt are raised as a whole by the second data voltage Vd2. In this case, the transmission voltage Vt is increased above the second data voltage Vd2 while maintaining a voltage level higher than the reflection voltage Vr.

Here, C1, C2, and C3 are as defined in Equation 2.

As shown in Equation 5, the transmission voltage Vt has a voltage higher than the second data voltage Vd2.

According to such an array substrate, a liquid crystal display having the same, and a driving method thereof, the transmission electrode is provided in the first region of the pixel region, the reflection electrode is insulated from the transmission electrode, and the second region of the pixel region adjacent to the first region. Is provided. At this time, the compensation wiring faces the reflective electrode with the insulating layer interposed therebetween.

Accordingly, different voltages may be applied to the reflective electrode and the transmission electrode while maintaining the cell gap of the liquid crystal display device uniformly, thereby improving display characteristics of the liquid crystal display device.

Although described with reference to the embodiments above, those skilled in the art will understand that the present invention can be variously modified and changed without departing from the spirit and scope of the invention as set forth in the claims below. Could be.

Claims (20)

Gate lines; A data line crossing the gate line to define a pixel area; A switching element connected to the gate line and the data line; A transmissive electrode connected to the switching element and provided in the first region of the pixel region; A reflective electrode formed on the same layer as the transmissive electrode and insulated, and disposed in a second region of the pixel region adjacent to the first region; And And a compensation line connected to the switching element and facing the reflective electrode with an insulating layer interposed therebetween in the second region. The array of claim 1, wherein the switching element is a thin film transistor having a gate electrode connected to the gate line, a source electrode connected to the data line, and a drain electrode coupled to the transmission electrode and the compensation wiring. Board. The array substrate of claim 1, wherein the compensation line is on the same layer as the data line. A first gate line; A second gate line insulated from the first gate line; A data line crossing the first and second gate lines to define a pixel area; A first switching element connected to the first gate line and the data line; A second switching element connected to the second gate line; A transmission electrode connected to the second switching element and provided in the first area of the pixel area; A reflection electrode insulated from the transmission electrode and provided in a second region of the pixel region adjacent to the first region; And And a compensation line connected to the first switching element and facing the reflective electrode and the transmissive electrode with an insulating layer interposed therebetween. The method of claim 4, wherein the first switching element is a first thin film transistor having a gate electrode connected to the first gate line, a source electrode connected to the data line, and a drain electrode coupled to the compensation line. An array substrate. 5. The second switching device of claim 4, wherein the second switching element is a second thin film transistor having a gate electrode connected to the second gate line, a source electrode connected to a ground terminal, and a drain electrode coupled to the transmission electrode. An array substrate. The array of claim 6, further comprising a third thin film transistor having a gate electrode connected to the second gate line, a source electrode connected to the data line, and a drain electrode coupled to the compensation line. Board. The second thin film of claim 4, wherein the second switching element comprises a second thin film having a gate electrode connected to the second gate line, a source electrode connected to the data line, and a drain electrode coupled to the transmission electrode and the compensation line. An array substrate, characterized in that the transistor. The array substrate of claim 4, wherein the first gate line outputs a first driving signal until the second gate line outputs a second driving signal. The array substrate of claim 4, wherein the compensation line is provided on the same layer as the data line. A gate line provided on the first substrate, A data line insulated from and intersecting the gate line to define a pixel area; A switching element connected to the gate line and the data line; A transmissive electrode connected to the switching element and provided in the first region of the pixel region; A reflective electrode insulated from the transmissive electrode and provided in a second region of the pixel region adjacent to the first region and formed on the same layer as the transmissive electrode; A compensation line connected to the switching element and insulated from and insulated from the reflective electrode in the second region; A common electrode provided on a second substrate and facing the transmission electrode and the reflection electrode; And And a liquid crystal layer interposed between the first substrate and the second substrate. A first gate line provided on the first substrate; A second gate line insulated from the first gate line; A data line insulated from and intersecting the first and second gate lines to define a pixel area; A first switching element connected to the first gate line and the data line; A second switching element connected to the second gate line; A transmission electrode connected to the second switching element and provided in the first area of the pixel area; A reflection electrode insulated from the transmission electrode and provided in a second region of the pixel region adjacent to the first region; A compensation line connected to the first switching element and facing the reflective electrode and the transmissive electrode with an insulating layer interposed therebetween; A common electrode provided on a second substrate and facing the transmission electrode and the reflection electrode; And And a liquid crystal layer interposed between the first substrate and the second substrate. Outputting a gate voltage to the gate line; Outputting a data voltage applied from a data line in response to the gate voltage; Applying the data voltage to the transmission electrode as a transmission voltage and applying a voltage lower than the data voltage to the reflection electrode as a reflection voltage; Applying a common voltage to the common electrode facing the transmissive electrode, the reflective electrode and the liquid crystal layer; And Charging the difference between the transmission voltage and the common voltage between the transmission electrode and the common electrode and charging the difference between the reflection voltage and the common voltage between the reflection electrode and the common electrode. Method of driving a liquid crystal display device comprising a. Outputting a first gate voltage to the first gate line; Outputting a first data voltage applied from a data line in response to the first gate voltage; Applying a voltage higher than the first data voltage as a transmission voltage to a transmission electrode and applying a voltage lower than the first data voltage as a reflection voltage to a reflective electrode; Applying a common voltage to the common electrode facing the transmissive electrode, the reflective electrode and the liquid crystal layer; And Charging the difference between the transmission voltage and the common voltage between the transmission electrode and the common electrode and charging the difference between the reflection voltage and the common voltage between the reflection electrode and the common electrode. Method of driving a liquid crystal display device comprising a. The method of claim 14, wherein before the outputting of the first gate voltage to the first gate line, Outputting a second gate voltage to the second gate line; Outputting a ground voltage provided from a ground voltage terminal in response to the second gate voltage; And applying the ground voltage to the transmissive electrode and applying a voltage lower than the ground voltage to the reflective electrode. The method of claim 15, wherein the second gate voltage is output from before the first gate voltage is output to the first gate line until the first gate voltage is output. The method of claim 14, wherein before the outputting of the first gate voltage to the first gate line, Outputting a second gate voltage to the second gate line; Outputting a ground voltage provided from a ground voltage terminal in response to the second gate voltage; Outputting a second data voltage provided from the data line in response to the second gate voltage; And applying said ground voltage to said transmissive electrode and applying said second data voltage to said reflective electrode. 18. The method of claim 17, wherein the second data voltage has an inverted phase with the first data voltage. The method of claim 14, wherein before the outputting of the first gate voltage to the first gate line, Outputting a second gate voltage to the second gate line; Outputting a second data voltage output from the data line in response to the second gate voltage; And applying the second data voltage to the transmissive electrode and applying a voltage lower than the second data voltage to the reflective electrode. 20. The method of claim 19, wherein the second data voltage has the same phase as the first data voltage.

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