KR100904382B1 - Motion compensation method, motion compensation circuit and video decoder having the method of data reuse between heterogeneous partitions - Google Patents

Abstract

The motion compensation circuit includes an internal buffer, a data reuse determiner, a data extractor, and a motion compensator. The internal buffer stores and outputs the data of the previous unit operation block. The data reuse determination unit determines whether to reuse data by calculating a motion vector difference value between a previous unit operation block and a current unit operation block located in heterogeneous partitions adjacent to each other. When the data reuse determiner determines to reuse the data, the data extractor outputs a part of the data of the previous unit calculation block according to the calculated motion vector difference value. The motion compensation unit receives some of the data of the previous unit calculation block from the data extractor to perform motion compensation. Therefore, the number of accesses to the external memory can be reduced to reduce the motion compensation time and power consumption.

Motion compensation, data reuse, video decoder

Description

MOTION COMPENSATION METHOD, MOTION COMPENSATION CIRCUIT AND VIDEO DECODER HAVING THE METHOD OF DATA REUSE BETWEEN HETEROGENEOUS PARTITIONS}

The present invention relates to a video codec. More particularly, the present invention relates to a motion compensation method for reducing motion compensation time and power consumption, a motion compensation circuit, and a video decoder including the same.

As information and communication technology develops, video communication for transmitting and receiving images as well as text and voice is increasing. Compressor method is essential for such video communication. Among them, H.264 is a standard of video codec with very high data compression rate. H.264 is a joint joint between the Video Coding Experts Group (VCEG) of the International Telecommunications Commission (ITU-T) and the Moving Picture Experts Groups (MPEG) of the International Organization for Standardization (ISO). It came from the creation and standardization of the Joint Video Team (JVT).

In general, video codec video using the H.264 standard is composed of 16x16 macroblock units. A macroblock can have one or more partitions, a 16x16 block can have one partition, a 16x8 block and an 8x16 block can have two partitions, and an 8x8 block can have four partitions. Most video codec images are motion compensated in units of 4x4 blocks, and partitions larger than 4x4 block sizes are divided into 4x4 blocks and motion compensation is performed several times. In this case, 4x4 blocks located in one partition are referred to as 'existing in the same partition', and 4x4 blocks located in different partitions are referred to as 'existing in the heterogeneous partition'.

H.264 also uses block-based motion estimation and compensation, Discrete Cosine Transform (DCT), quantization and entropy, like other existing standards (MPEG2, H.261, H.263, etc.). Among these, block-based motion compensation may require reading a large number of pixel data in order to compensate for motion of one pixel data in a block. This results in a large number of external memory accesses, which increases power consumption.

In the related art, some of the data in a unit operation block located in a homogeneous partition are stored in a cache memory or a buffer to enable data reuse, thereby reducing the number of external memory accesses to some extent.

However, since the latest video communication is being used in mobile environments such as cell phones and PDAs, the most necessary technology for this purpose is low power design. Therefore, in order to design a motion compensation circuit in a video codec with low power, a technique for reducing the number of times of reading pixel data from the main memory by enabling data reuse between unit blocks located in a heterogeneous partition as well as a homogeneous partition is required.

In order to solve the above problems, the present invention provides a motion compensation circuit that can reduce the number of accesses of the external memory to reduce the motion compensation time and power consumption.

The present invention also provides a video decoder including the motion compensation circuit to reduce motion compensation time and power consumption.

In addition, the present invention provides a motion compensation method for reducing the motion compensation time and power consumption by reducing the number of accesses of the external memory.

In order to achieve the above object, the motion compensation circuit according to an embodiment of the present invention includes an internal buffer, a data reuse determination unit, a data extractor and a motion compensation unit.

The internal buffer stores and outputs some data of the previous unit operation block. The data reuse determination unit determines whether to reuse data by calculating a motion vector difference value between the previous unit operation block and the current unit operation block located in heterogeneous partitions adjacent to each other. When the data reuse determining unit determines to reuse the data, the data extracting unit outputs a part of the stored data of the previous unit calculation block according to the calculated motion vector difference value. The motion compensation unit receives a part of data of the previous unit operation block from the data extractor and performs motion compensation.

The data reuse determination unit may determine to reuse the data when the motion vector difference value is within a reference value.

The motion compensation circuit may further include an address generator configured to generate an address for connecting to an external memory.

The heterogeneous partitions adjacent to each other may be composed of luminance data or color difference data.

In order to achieve the above object, a video decoder according to an embodiment of the present invention includes an external memory, a motion compensation circuit, and a memory interface.

The external memory stores data of a unit operation block. The motion compensation circuitry allows reuse of data. The memory interface unit interfaces between the external memory and the motion compensation circuit.

The motion compensation circuit includes an internal buffer, a data reuse determiner, a data extractor, and a motion compensator.

The internal buffer stores some data of the previous unit operation block. The data reuse determination unit determines whether to reuse data by calculating a motion vector difference value between the previous unit operation block and the current unit operation block located in heterogeneous partitions adjacent to each other. When the data reuse determining unit determines to reuse the data, the data extracting unit outputs a part of data of the stored previous unit calculation block according to the calculated motion vector difference value. The motion compensation unit receives a part of data of the stored previous unit operation block from the data extracting unit to perform motion compensation.

The data reuse determination unit may determine to reuse data when the motion vector difference value is within a reference value.

The motion compensation circuit may further include an address generator configured to generate an address for accessing the external memory.

The heterogeneous partitions adjacent to each other may be composed of luminance data or color difference data.

In order to achieve the above object, the motion compensation method according to an embodiment of the present invention comprises the steps of storing the data of the previous unit operation block, between the previous unit operation block located in the heterogeneous partition adjacent to each other and the current unit operation block Determining whether to reuse the data by calculating a motion vector difference value, outputting a part of data of the previous unit calculation block according to the calculated motion vector difference value when determining to reuse the data, and the previous unit calculation block And performing motion compensation by receiving some of the data of the.

When the motion vector difference value is within a reference value, it may be determined to reuse the data.

The motion compensation method may further include generating an address for accessing an external memory.

The heterogeneous partitions adjacent to each other may be composed of luminance data or color difference data.

A motion compensation method, a motion compensation circuit, and a video decoder including the same according to an embodiment of the present invention can reduce the number of accesses to an external memory by reusing data. Therefore, motion compensation time and power consumption can be reduced.

With respect to the embodiments of the present invention disclosed in the text, specific structural to functional descriptions are merely illustrated for the purpose of describing embodiments of the present invention, embodiments of the present invention may be implemented in various forms and It should not be construed as limited to the embodiments described in. As the inventive concept allows for various changes and numerous modifications, particular embodiments will be illustrated in the drawings and described in detail in the text. However, this is not intended to limit the present invention to the specific disclosed form, it should be understood to include all modifications, equivalents, and substitutes included in the spirit and scope of the present invention.

Terms such as first and second may be used to describe various components, but the components should not be limited by the terms. The terms may be used for the purpose of distinguishing one component from another component. For example, without departing from the scope of the present invention, the first component may be referred to as the second component, and similarly, the second component may also be referred to as the first component.

When a component is referred to as being "connected" or "connected" to another component, it may be directly connected to or connected to that other component, but it may be understood that other components may be present in between. Should be. On the other hand, when a component is said to be "directly connected" or "directly connected" to another component, it should be understood that there is no other component in between. Other expressions describing the relationship between components, such as "between" and "immediately between," or "neighboring to," and "directly neighboring to" should be interpreted as well. The terminology used herein is for the purpose of describing particular example embodiments only and is not intended to be limiting of the present invention. Singular expressions include plural expressions unless the context clearly indicates otherwise. In this application, the terms "comprise" or "having" are intended to indicate that there is a feature, number, step, action, component, part, or combination thereof that is described, and that one or more other features or numbers are present. It should be understood that it does not exclude in advance the possibility of the presence or addition of steps, actions, components, parts or combinations thereof.

Unless defined otherwise, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art. Terms such as those defined in the commonly used dictionaries should be construed as meanings consistent with the meanings in the context of the related art and shall not be construed in ideal or excessively formal meanings unless expressly defined in this application. .

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a block diagram illustrating a motion compensation circuit according to an exemplary embodiment of the present invention.

Referring to FIG. 1, the motion compensation circuit 100 includes an internal buffer 110, a data reuse determiner 130, a data extractor 150, and a motion compensator 170.

The internal buffer 110 stores and outputs data PB that can be reused among data of the previous unit operation block. The data reuse determination unit 130 receives a motion vector (MV) between a previous unit calculation block and a current unit calculation block located in heterogeneous partitions adjacent to each other, and calculates a motion vector difference value (MVG) to determine whether to reuse the data. . The data reuse determination unit 130 determines to reuse the data when the calculated motion vector difference value MVG is within a reference value. For example, it may be determined to reuse data when the motion vector difference value (MVG) between the previous operation block and the modern operation block is within 4 pixels of the Manhattan distance. Manhattan distance here is a kind of right-angle distance. Taking the xy coordinate system as an example, Manhattan distances of (x, y) and (a, b) are | x-a | + | y-b |. The data reuse determination unit 130 outputs a reuse signal RY when the motion vector difference value MVG is within a reference value. When the data reuse determination unit 130 determines to reuse the data, the data extraction unit 150 transfers the reused data PBA to the motion compensator 170 from the inner buffer 110. Based on the motion vector difference value (MVG) calculated by receiving the reusable data PB among the data, the reusable data PBA obtained by extracting a part of the reusable data PB from the data of the previous unit operation block is extracted. Output to the motion compensation unit 170. When the reuse signal RY is applied from the data reuse determination unit 130, the motion compensator 170 receives data PBA to be reused among data PBs that may be reused by the internal buffer 110, and reuses the reuse signal RY. For the data that is not possible, the external memory is accessed to receive the data UB of the unit operation block to perform motion compensation to output the compensated video signal CVS.

2A, 2B and 2C are diagrams for describing an operation of a data extracting unit according to an embodiment of the present invention.

Referring to FIG. 2A, the previous unit operation block I1 for the previous 4x4 block 1 has three blocks to the right, two blocks to the left, two blocks to the upper side, and three blocks to the lower side from the previous 4x4 block 1. The current unit calculation block I2 for the current 4x4 block 2 also includes 3 blocks to the right, 2 blocks to the left, 2 blocks to the upper side, and 3 blocks to the lower side from the current 4x4 block 2. It is an area. The data corresponding to the A, B, C, D, and E lines of the previous unit operation block (I1) data for the previous 4x4 block (1) are stored in the a, b, c, d, and e lines of the internal buffer 110, respectively. It is stored. At this time, if the motion vector difference between the previous 4x4 block (1) and the current 4x4 block (2) is (0,0), the previous unit calculation block (I1) for the previous 4x4 block (1) and the current 4x4 block (2) Since the motion vector difference between the current unit calculation block I2 is about (0,0), the area I12 overlapping each other between the previous unit calculation block I1 and the current unit calculation block I2 is A, B, C, and D. And the data extracting unit 150 becomes an E line and extracts data values corresponding to a, b, c, d and e lines stored in the internal buffer 110 and reuses the data (a ', b', c ', d', and e ') are sequentially output (ie, in order of a', b ', c', d ', e') to the motion compensation unit 170.

Referring to FIG. 2B, as in FIG. 2A, the previous unit operation block I1 for the previous 4x4 block 1 is 3 blocks to the right, 2 blocks to the left, 2 blocks to the top and 2 blocks from the previous 4x4 block (1). It is an area including as many as three blocks, and the current unit operation block I2 for the current 4x4 block 2 is also 3 blocks to the right, 2 blocks to the left, 2 blocks to the top, and 3 to the bottom from the current 4x4 block 2. This area contains only blocks. The data corresponding to the A, B, C, D, and E lines of the previous unit operation block (I1) data for the previous 4x4 block (1) are stored in the a, b, c, d, and e lines of the internal buffer 110, respectively. It is stored. At this time, if the motion vector difference between the previous 4x4 block (1) and the current 4x4 block (2) is (1,0), the previous unit calculation block (I1) and the current 4x4 block (2) for the previous 4x4 block (1) Since the motion vector difference between the current unit calculation block I2 is about (1,0), the regions I12 overlapping each other between the previous unit calculation block I1 and the current unit calculation block I2 are B, C, D, and E. The data extracting unit 150 becomes a line and extracts and reuses data values corresponding to the b, c, d and e lines stored in the internal buffer 110 (b ', c', d ', e'). ) Are sequentially output (ie, in the order of b ', c', d ', e') to the motion compensation unit 170. At this time, the motion compensation unit 170 reads the data value corresponding to the A line from the external memory.

Referring to FIG. 2C, as in FIGS. 2A and 2B, the previous unit operation block I1 for the previous 4x4 block 1 is 3 blocks to the right, 2 blocks to the left, and 2 blocks to the top from the previous 4x4 block 1. And 3 blocks downward, and the current unit calculation block I2 for the current 4x4 block (2) is also 3 blocks to the right, 2 blocks to the left, and 2 blocks to the top from the current 4x4 block (2). And an area including as many as three blocks downward. The data corresponding to the A, B, C, D, and E lines of the previous unit operation block (I1) data for the previous 4x4 block (1) are stored in the a, b, c, d, and e lines of the internal buffer 110, respectively. It is stored. At this time, if the motion vector difference between the previous 4x4 block (1) and the current 4x4 block (2) is (0, 1), the previous unit calculation block (I1) and the current 4x4 block (2) for the previous 4x4 block (1) Since the motion vector difference between the current unit blocks I2 is about (0,1), the regions I12 overlapping each other between the previous unit blocks I1 and the current unit blocks I2 are A, B, C, D. And the E-line is an area excluding only the top block of each line, so that the data extracting unit 150 is the top block of each line among the data corresponding to the a, b, c, d, and e lines stored in the internal buffer 110. Move data (a 'b', c ', d', e ') that are extracted and reused except for data stored in sequence (ie, in order of a', b ', c', d ', e') Output to the compensator 170. At this time, the motion compensator 170 reads data values corresponding to the uppermost block of each line from the external memory in the A, B, C, D and E lines.

Therefore, the data extractor 150 may output a part of the data PB of the previous unit calculation block stored in the internal buffer 110 according to the motion vector difference value MVG.

The motion compensation circuit 100 receives an address generation command AGC from the data reuse determination unit 130 when the data of the non-reusable part is obtained and the motion vector difference value MVG is equal to or greater than a reference value, and then performs a unit operation from an external memory. The apparatus may further include an address generator 190 generating an address ADD for importing the data UB of the block. In this case, the motion compensator 170 accesses an external memory for data that is not reusable, receives the data UB of a unit operation block, and performs motion compensation to output the compensated video signal CVS. . Thereafter, the data UBA of the unit operation block, which may be reused, may be used when performing the next motion compensation, and then stored in the internal buffer 110.

In addition, heterogeneous partitions adjacent to each other used in the motion compensation circuit 100 may be configured of luminance data or color difference data.

3 is a block diagram illustrating a video decoder according to an embodiment of the present invention.

Referring to FIG. 3, the video decoder 300 includes an external memory 310, a memory interface 320, and a motion compensation circuit 330.

The external memory 310 stores data of a unit operation block. The memory interface unit 320 generates an interface signal IS for interfacing between the external memory 310 and the motion compensation circuit 330 to exchange the interface signal IS with the external memory 310. The motion compensation circuit 330 includes an internal buffer 331, a data reuse determiner 333, a data extractor 335, and a motion compensator 337 to reuse data.

The internal buffer 331 stores and outputs data PB that can be reused among data of the previous unit operation block. The data reuse determination unit 333 receives a motion vector MV between a previous unit operation block and a current unit operation block located in heterogeneous partitions adjacent to each other, and calculates a motion vector difference value MVG to determine whether to reuse the data. . The data reuse determination unit 333 determines to reuse the data when the motion vector difference value MVG is within the reference value. For example, when the motion vector difference value MVG between the previous unit operation block and the current unit operation block is within 4 pixels as the Manhattan distance, it may be determined to reuse the data. The data reuse determination unit 333 outputs a reuse signal RY when the motion vector difference value is within a reference value. When the data reuse determination unit 333 determines to reuse the data, the data extraction unit 335 transfers the previous unit operation block stored from the internal buffer 331 to transfer the reused data PBA to the motion compensation unit 337. The motion compensator 337 receives reusable data PBA from among the reusable data PB stored in accordance with the motion vector difference value MVG by receiving the reusable data PB from among the data. Output When the reuse signal RY is applied from the data reuse determination unit 333, the motion compensator 337 receives the data PBA to be reused, and accesses an external memory for data that is not reusable, and then executes a unit operation block. The data UB is applied to perform motion compensation to output the compensated video signal CVS.

The motion compensation circuit 330 receives an address generation command AGC from the data reuse determination unit 333 when the data of the non-reusable portion and when the motion vector difference value MVG is greater than or equal to the reference value receives the address generation command AGC from the external memory 310. It may further include an address generator 339 for generating an address (ADD) for obtaining the data (UB) of the unit operation block from. At this time, the motion compensator 337 reads the data UB of the unit operation block stored in the external memory 310 from the memory interface 320 and performs motion compensation on data that is not reusable. Since some of the data of the unit operation block (UBA) can be used for the next motion compensation, it is stored in the internal buffer 331.

4 is a flowchart illustrating a motion compensation method according to an embodiment of the present invention.

Referring to FIG. 4, data of a previous unit operation block is stored (S405). The operation vector difference value between the previous unit operation block and the current unit operation block located in the heterogeneous partitions adjacent to each other is calculated to determine whether to reuse the data (S410). Here, it is decided to reuse data when the calculated motion vector difference value is within a reference value. If it is determined that the data is reusable (S410: Yes), the data reusable portion outputs a part of the data of the previous unit operation block according to the calculated motion vector difference value (S415). Motion compensation is performed by receiving some of the data of the previous unit operation block output (S430). The part where data cannot be reused generates an address for accessing the external memory (S420). Next, the non-reusable data portion is read from the external memory (S425). Motion compensation is performed using the read data (S430). After performing motion compensation, the current unit operation block is stored because it may be used to perform the next motion compensation (S455).

If it is determined that the data is not reusable (S410: No), an external memory address of the entire unit operation block is generated (S440). Next, the unit operation block is read from the external memory (S445). Motion compensation is performed using the read unit calculation block (S450). After performing motion compensation, the current unit operation block is stored because it may be used to perform the next motion compensation (S455).

Accordingly, the number of accesses to the external memory can be reduced by reusing the data of the unit operation block in performing the motion compensation, thereby reducing the motion compensation time and power consumption.

According to the present invention, a motion compensation method, a motion compensation circuit, and a video decoder including the same can reduce the number of accesses to an external memory by reusing data between unit blocks located in heterogeneous partitions as well as homogeneous partitions in motion compensation. . Accordingly, motion compensation time and power consumption can be reduced.

While the foregoing has been described with reference to preferred embodiments of the present invention, those skilled in the art will be able to variously modify and change the present invention without departing from the spirit and scope of the invention as set forth in the claims below. It will be appreciated.

1 is a block diagram illustrating a motion compensation circuit according to an exemplary embodiment of the present invention.

2A, 2B and 2C are diagrams for describing an operation of a data extracting unit according to an embodiment of the present invention.

3 is a block diagram illustrating a video decoder according to an embodiment of the present invention.

4 is a flowchart illustrating a motion compensation method according to an embodiment of the present invention.

Claims (12)

An internal buffer for storing and outputting data of a previous unit operation block; A data reuse determination unit configured to determine whether to reuse data by calculating a motion vector difference value between the previous unit operation block and the current unit operation block located in heterogeneous partitions adjacent to each other; When the data reuse determination unit determines to reuse the data, a portion of data of the previous unit operation block is extracted by extracting an area overlapping each other between the previous unit operation block and the current unit operation block based on the calculated motion vector difference value. A data extraction unit for outputting the; And And a motion compensator configured to perform motion compensation by receiving some of the data of the previous unit calculation block from the data extractor. And the data reuse determination unit determines to reuse the data when the motion vector difference value is within a reference value. delete The motion compensation circuit of claim 1, further comprising an address generator for generating an address for connecting to an external memory. The motion compensation circuit of claim 1, wherein the heterogeneous partitions adjacent to each other are composed of luminance data or chrominance data. An external memory for storing data of a unit operation block; Motion compensation circuitry for reusing data; And A memory interface unit for interfacing between the external memory and the motion compensation circuit; The motion compensation circuit, An internal buffer for storing data of a previous unit operation block; A data reuse determination unit configured to determine whether to reuse data by calculating a motion vector difference value between the previous unit operation block and the current unit operation block located in heterogeneous partitions adjacent to each other; When the data reuse determination unit determines to reuse the data, a portion of data of the previous unit operation block is extracted by extracting an area overlapping each other between the previous unit operation block and the current unit operation block based on the calculated motion vector difference value. A data extraction unit for outputting the; And And a motion compensator configured to perform motion compensation by receiving some of the data of the previous unit operation block from the data extractor. The video decoder of claim 5, wherein the data reuse determiner determines to reuse data when the motion vector difference value is within a reference value. The video decoder of claim 6, wherein the motion compensation circuit further comprises an address generator configured to generate an address for accessing the external memory. 6. The video decoder of claim 5, wherein the heterogeneous partitions adjacent to each other are composed of luminance data or chrominance data. Storing data of a previous unit operation block; Determining whether to reuse data by calculating a motion vector difference value between the previous unit operation block and the current unit operation block located in heterogeneous partitions adjacent to each other; When determining to reuse the data, extracting a region overlapping each other between the previous unit operation block and the current unit operation block based on the calculated motion vector difference value and outputting a part of data of the previous unit operation block; And Performing motion compensation by receiving some of the data of the previous unit calculation block; And determining whether to reuse the data includes determining to reuse the data when the motion vector difference value is within a reference value. delete 10. The method of claim 9, further comprising generating an address for connecting to an external memory. 10. The motion compensation method of claim 9, wherein the heterogeneous partitions adjacent to each other are composed of luminance data or color difference data.

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