KR100903876B1 - Method for dividing received signal modulated phase shift keying using Bit Reflected Gray Code into bits, and device thereof - Google Patents

Abstract

The present invention relates to a method and apparatus for dividing a received symbol signal modulated in a phase shift method into bit information using a bit symmetric gray code.

According to the present invention, the respective absolute values for the values of the I and Q channel symbol signals of the received symbol signal arranged at intervals of phase angle on the two-dimensional concentric circles are obtained. The I- or Q-channel symbol signal is rotated using the rotation angle obtained using each absolute value. The bit information of each of the rotated I and Q channel symbol signals is extracted.

As described above, since the bit information of the PSK modulated symbol is divided in consideration of the characteristics of the BRGC using the coordinate rotation method, the bit information can be easily divided in two dimensions.

Bit Reflected Gray Code (BRGC), Phase Shift Keying (PSK), Pulse Amplitude Modulation (PAM), Coordinate rotation

Description

Method and dividing received signal modulated phase shift keying using Bit Reflected Gray Code into bits, and device approximately

The present invention uses a bit symmetric gray code (hereinafter referred to as 'BRGC') to convert received symbol signals modulated by phase shift keying (hereinafter referred to as 'PSK') into bit information. A method of dividing and a device therefor. In particular, the present invention relates to a method and apparatus for performing bit information partitioning based on probability of a symbol value for using an iterative decoding technique for a PSK signal symbol-mapped with BRGC.

Recent advances in channel codes, such as turbo codes and Low Density Parity Checks (hereinafter referred to as 'LDPC'), enable communications that satisfy low bit error rates at low signal-to-noise ratios. Higher data rates and higher quality communications are possible in the same system.

Due to the use of such channel codes, it is possible to improve the reception performance by using repetitive decoding in a receiver in a symbol system mapped to BRGC and a turbo system using a turbo code or an LDPC.

Therefore, in the reception process, the high-order modulated signal needs to perform bit information division based on probability of received symbol values and input the result to the iterative decoder. Soft bit metric generation extracts bit information necessary for an iterative decoder used essentially at the receiver.

The method of extracting bit information of a higher-order modulated signal mainly uses a log-map, a max-log-map, and the like.

However, conventionally, when the bit information of the received symbol signal using the PSK modulation scheme is divided using this scheme, since the signal points of the constellations exist on the concentric circles, it is difficult to extract the bit information in two dimensions. do.

FIG. 1 is a constellation diagram of a 16-PSK signal for explaining a conventional bit information division scheme, and particularly, shows an area for a bit b ₂ in which k = 2 in a received 16-PSK signal space.

라 할 때 수학식 1을 이용한다.As shown in Fig. 1, the signal space is rotated in the direction of axis P10 or axis P20 in the I channel or Q channel direction according to the received value for bit b _{2 with} k = 2, and then a new I channel or By selecting the signal value of the Q channel it is possible to obtain a bit information split value as shown in equation (3). At this time, the rotation angle of the signal space

Equation 1 is used.

However, in order to calculate the bit information split value using Equation 1, since the different rotation angles have to be calculated with respect to the received value, the bit information split structure is complicated.

An object of the present invention is to provide a method and apparatus for simplifying the complexity when dividing bit information input to an iterative decoder in the process of receiving a signal modulated by a symbol-mapped phase shift method with a bit symmetric gray code. will be.

In order to achieve the above-described problem, the bit information splitting method according to the characteristics of the present invention,

A method of dividing a received symbol signal into bit information for iterative decoding, the method comprising: each of the I and Q channel symbol signals of the received symbol signal arranged at intervals of phase angle on two-dimensional concentric circles; Finding an absolute value; Rotating the I channel or Q channel symbol signal using a rotation angle obtained using the respective absolute values; And extracting bit information about each of the rotated I and Q channel symbol signals.

In order to achieve the above-described problem, the bit information dividing apparatus according to the characteristics of the present invention,

An apparatus for dividing a received symbol signal into bit information for iterative decoding, wherein each of the values of the I and Q channel symbol signals of the received symbol signal arranged at intervals of phase angle on two-dimensional concentric circles A rotation angle calculation unit calculating a rotation angle using an absolute value; And a bit information converter configured to extract bit information of each of the I and Q channel symbol signals rotated by using the rotation angle output by the rotation angle calculator.

As described above, according to the present invention, a structure capable of simply calculating complex bit information partitioning can be effectively used for bit information partitioning of a BRGC M-PSK signal.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention. In the drawings, parts irrelevant to the description are omitted in order to clearly describe the present invention, and like reference numerals designate like parts throughout the specification.

Throughout the specification, when a part is said to "include" a certain component, it means that it can further include other components, without excluding other components unless specifically stated otherwise. In addition, terms such as "... unit" described in the specification means a unit for processing at least one function or operation, which may be implemented in hardware or software or a combination of hardware and software.

Now, referring to the drawings, a phase shift method using a bit symmetric gray code (hereinafter, referred to as 'BRGC') according to an embodiment of the present invention (hereinafter, referred to as phase shift keying, referred to as 'PSK') A method and apparatus for dividing a modulated received symbol signal into bit information will be described.

2A and 2B are examples of a BRGC M-PSK constellation for explaining a bit information partitioning scheme according to an embodiment of the present invention. FIG. 2A is a constellation of 8-PSK, and FIG. 2B is a 16-PSK constellation. to be.

As shown in FIG. 2A, the 8-PSK constellation has three bits (s = b ₀ , b ₁ , b ₂ ) mapped on concentric circles, and each symbol has a phase angle (θ ₈ = π / 8). ), Signal points are arranged at regular intervals.

In addition, as shown in FIG. 2B, the 16-PSK constellation has four bits (s = b ₀ , b ₁ , b ₂ , b ₃ ) mapped on concentric circles, and each symbol has a phase angle θ. ₁₆ = π / 16) as a basic unit, signal points are arranged at regular intervals.

As shown in Figs. 2A and 2B, the M-PSK constellation has a signal point representing M symbols. Each symbol is BRGC mapped with m (= log2M) bits. Thus, the M-PSK constellations place signal points at regular intervals on the concentric circles.

The transmitted M-PSK symbol is a signal existing in two dimensions and is expressed as s = s _I + js _Q. The set of signal points {S _{-M / 2,.} . . , S _-1 , S _{1 ,.} . . , S _{M / 2} }. Here, s = f (b ₀ , b ₁ , ..., b _m-1 ), and f (·) denotes a BRGC mapping function using m bits.

The BRGC mapped M-PSK constellation using (b ₀ , b ₁ ... b _m-1 ) bits has the following characteristics except for bits b ₀ and b ₁ .

The first characteristic is an equilibrium characteristic. That is, M / 2 ^k consecutive symbols of the k th bit have the same bit value (1 or 0). Where k = 2,... , m-1.

The second characteristic is the same division characteristic. That is, when the value of the k-th bit position of an adjacent symbol is divided by {1,0} or {0,1}, the signal space is ^2k , and the load space is a phase angle nπ / 2 ^k-1 . Where n = 1,... , 2 ^k, and the phase angle for determining the bit value is nπ / 2 ^k .

The third characteristic is the rotation characteristic. When the signal space is rotated by a specific angle nπ / 2 ^k-1 based on the k-th bit, the corresponding bit value in the desired signal space has the same or the opposite value.

The fourth characteristic is a symmetry characteristic. In the PSK signal space, all quadrants are linearly symmetric. That is, the first quadrant is symmetric about the quadrant 2 and the Q (quadrature) axis, and the second quadrant is in line symmetry with respect to the third quadrant and the I (inphase) axis.

3A, 3B, 3C, and 3D are constellation diagrams of a 16-PSK signal according to an exemplary embodiment of the present invention, and the 16-PSK signal space shown in FIG. 2B includes four bits (s = b ₀ , b ₁ , b ₂ , b ₃ ) The four BRGC characteristics are shown.

Figure 3a for a bit (b ₀₎ of the received signal area (Decision Region of b ₀₎ a shown FIG aqueous phase of the 16-PSK signal, Figure 3b is a region of the bit (b ₁₎ of the received signal (Decision Region constellation of the 16-PSK signal representing of b ₁ ), FIG. 3C shows the constellation of the 16-PSK signal representing the Decision Region of b ₂ for bit b ₂ of the received signal, and FIG. Is the constellation of the 16-PSK signal representing the Decision Region of b ₃ for bit b ₃ of the signal.

In this case, a complex two-dimensional signal received in order to obtain each bit information split value may be represented as r = r _I + jr _Q.

In the case of a BPSK signal having one bit as a symbol, since the signal space is a one-dimensional signal on the I-axis or the Q-axis, the input signal value itself becomes the bit information. In the case of the BRGC QPSK, two signals of BPSK on the I-axis and BPSK on the Q-axis are added together, and thus a bit information value can be obtained as shown in Equation 2 below.

That is, the bit information values for the bits b ₀ and bits b ₁ shown in FIGS. 3A and 3B may be obtained through Equation 2.

On the other hand, the bit information split value for the bit b ₂ shown in FIG. 3C is the same as the bit information split value in the first quadrant and the bit information split value in the third quadrant are rotated 180 degrees. In addition, it can be seen that the bit information split value of the second quadrant is equivalent to rotating the bit information split value of the fourth quadrant 180 degrees.

Therefore, by taking the absolute value of the received value using the BRGC characteristic and rotating it to obtain a new Q-axis value, the information split value of the corresponding bit can be obtained. This is expressed as equation (3).

는 심볼들의 배치 값,

는 수신 심볼 신호를 2차원 신호 공간 상에 표현한 수학식 1에서 I 축 신호 값,

는 수학식 1에서 Q 축 신호 값,

는 k 비트에 대한 회전각을 나타낸다. here,

Is the placement value of the symbols,

Is an I-axis signal value in Equation 1 in which the received symbol signal is expressed in a two-dimensional signal space,

Is the Q axis signal value,

Denotes the rotation angle for k bits.

At this time, the rotation angle is defined as Equation 4 below.

In addition, the arrangement value of the symbols is defined as in Equation 5 below.

는 수학함수인 'floor' 함수를 나타낸다. here,

Denotes the math function 'floor'.

In addition, the radian phase angle of the received signal converted into an absolute value is defined as in Equation 6 below.

In this case, Equation 3 above extracts the bit information value by taking the Q axis value, but Equation 3 is converted to Equation 7 below to use the I axis value.

Then, the bit information split values are calculated by taking the Q-axis values of 8-PSK and 16-PSK of FIGS. 2A and 2B using Equation 3 above.

First, the information splitting value of bit (b ₂ ) in 8-PSK and 16-PSK signals is expressed as Equation 8 below.

The information splitting value of the bit b ₃ in the 16-PSK signal is expressed by Equation 9 or Equation 10 below.

,

,

,

,

와

을 이용하면 수학식 11과 같이 변환된다.For Equation 10,

Wow

If is used, it is converted as in Equation 11.

,

,

4 is a block diagram illustrating a configuration of an apparatus for performing bit information division on a PSK received symbol signal according to an embodiment of the present invention.

As shown in FIG. 4, the bit information dividing apparatus 100 includes an input unit 110, an absolute value converting unit 120, a phase angle calculating unit 130, a symbol position value calculating unit 140, and a rotation angle calculating unit ( 150, a calculator 160, and a bit information converter 170.

The input unit 110 receives the demodulated M column two-dimensional received symbol signal and outputs it to the absolute value converting unit 120 or the bit information converting unit 170.

The absolute value converting unit 120 may generate the absolute value of the Q channel absolute value converting unit 122 and the I channel signal that generate the absolute value of the Q channel signal of the 2D received symbol signal received from the input unit 110. The channel absolute value converter 124 is included.

The phase angle calculator 130 calculates the radian phase angle of the received signal using the absolute values A and B respectively output from the Q channel absolute value converter 122 and the I channel absolute value converter 124. do. That is, the phase angle is calculated using Equation 7 and output.

The symbol position value calculator 140 calculates a position value of a symbol with respect to the two-dimensional received symbol signal by using the phase angle received from the phase angle calculator 130. That is, the arrangement values of the symbols are determined and output using Equation 6.

The rotation angle calculator 150 calculates a rotation angle of the two-dimensional received symbol signal space using the arrangement values of the symbols received from the symbol position value calculator 140. That is, the rotation angle is calculated using Equation 5 and output.

The calculation unit 160 obtains a sine value and a cosine value for the rotation angle received from the rotation angle calculation unit 150, respectively. In this case, the operation unit 160 includes a sine value lookup table 162 for processing a sine value and a cosine value lookup table 164 for processing a cosine value. Here, the sine value lookup table 162 and the cosine value lookup table 164 store the results of pre-calculation to reduce the number of operations in the process of processing the actual sine value and the cosine value, and then use the arrangement or the like to process them. Memory set.

The bit information converting unit 170 outputs the absolute values A and B output from the Q channel absolute value converting unit 122 and the I channel absolute value converting unit 124, respectively, and the symbol position value calculating unit 140. Bit information for the corresponding bits (except k> 1, k = 0, 1) using the sine and cosine values output from the symbol position value, the sine value lookup table 162, and the cosine value lookup table 164, respectively. Generate a split value. That is, the bit information split value is generated using Equation 4.

When the corresponding bit value is k = 0, 1, the bit information converter 170 generates a bit information split value by using the Q channel signal and the I channel signal of the two-dimensional received symbol signal received from the input unit 110, respectively. do. That is, the bit information split value is generated using Equation 2.

At this time, although not shown in the drawing, the bit information split value output from the bit information converter 170 is input to a decoder of the receiving system and used as bit information for repetitive decoding.

5 is a flowchart illustrating a series of processes for performing bit information division on a PSK received symbol signal according to an embodiment of the present invention.

As shown in FIG. 5, the bit information dividing apparatus (100 of FIG. 3) receives an M-column two-dimensional received symbol signal existing in two dimensions (S101).

It is determined whether the bit value k of bit information to be extracted from the two-dimensional received symbol signal input in step S101 is greater than 1 (S103).

As a result of the determination in step S103, when the bit value is less than 1, when the bit value (k = 0), the Q channel signal value of the received two-dimensional symbol signal is extracted as the bit information value (S105).

When the bit value (k = 1), the I channel signal value of the received two-dimensional symbol signal is extracted as the bit information value (S107).

On the other hand, when the bit value exceeds 1 as a result of the determination in step S103, the absolute values of the Q channel and the I channel signal of the received 2D symbol signal are respectively calculated (S109).

The phase angle is calculated using the calculated absolute value (S111), and the arrangement value of the symbols is calculated using the phase angle (S113).

The rotation angle is calculated using the arrangement values of the symbols calculated in step S113 (S115), and a sine value and a cosine value for the rotation angle are respectively calculated (S117).

Then, the bit information value is extracted for each bit using the values obtained using the steps S109, S111, S113, S115, and S117 (S119). That is, the bit information split value is generated by converting the received two-dimensional signal in consideration of the BRGC characteristic, that is, the balance characteristic, the same division characteristic, the rotation characteristic, and the symmetry characteristic described above.

As described above, since the bit information of the PSK modulated symbol is divided in consideration of the characteristics of the BRGC using the coordinate rotation method, the bit information can be easily divided in two dimensions.

Although the embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

1 is a constellation diagram of a 16-PSK signal for explaining a conventional bit information division scheme.

2A is an 8-PSK constellation diagram for describing a bit information division scheme according to an embodiment of the present invention.

2B is a 16-PSK constellation diagram for describing a bit information division scheme according to an embodiment of the present invention.

3A, 3B, 3C, and 3D show constellations of the 16-PSK signal shown in FIG. 2B by bit.

4 is a block diagram illustrating a configuration of an apparatus for performing bit information division on a PSK received symbol signal according to an embodiment of the present invention.

5 is a flowchart illustrating a series of processes for performing bit information division on a PSK received symbol signal according to an embodiment of the present invention.

Claims (12)

A method of dividing a received symbol signal into bit information for iterative decoding, Obtaining respective absolute values of values of the I and Q channel symbol signals of the received symbol signal arranged at intervals of phase angles on two-dimensional concentric circles; Rotating the I channel or Q channel symbol signal using a rotation angle obtained using the respective absolute values; And Extracting bit information for each of the rotated I and Q channel symbol signals Bit information partitioning method comprising a. The method of claim 1, The rotating step, Obtaining a radian phase angle using respective absolute values of values of the I and Q channel symbol signals; Obtaining an arrangement value of symbols constituting the I-channel or Q-channel symbol signal using the radian phase angle; And Rotating the signal space on which the I-channel or Q-channel symbol signal is arranged with respect to the I-axis or the Q-axis using a rotation angle obtained using the arrangement value of the symbols. Bit information partitioning method comprising a. The method of claim 2, Obtaining an arrangement value of the symbols, And obtaining a placement value of the symbols by using a floor function based on the number of signal spaces in which the symbol signal is arranged and the radian phase angle for each bit constituting the received symbol signal. The method of claim 3, The rotating step, And a rotation angle is calculated using the number of signal spaces in which the symbol signal is arranged and an arrangement value of the symbols. The method of claim 4, wherein The extracting step, Multiplying an absolute value for the I channel symbol signal by a sine of the rotation angle; Multiplying an absolute value for the Q channel symbol signal by a cosine of the rotation angle; Obtaining a sum of the calculated values in the multiplying the sine values and the multiplying the cosine values; And Obtaining the bit information by multiplying the sum of the respective calculated values and a -1 value having an exponent of the value obtained by increasing the symbol arrangement value by one; Bit information partitioning method comprising a. The method of claim 1, Before the step of finding the absolute value, Determining whether a bit value of bit information to be extracted from the received symbol signal exceeds 1; If the bit value is less than 1, obtaining bit information by taking a '-' sign for each of the I and Q channel symbol signals of the received symbol signal, And obtaining the absolute value, rotating and extracting the absolute value when the bit value exceeds one. An apparatus for dividing a received symbol signal into bit information for iterative decoding, A rotation angle calculation unit configured to calculate a rotation angle by using respective absolute values of values of the I and Q channel symbol signals of the received symbol signal arranged at intervals of a phase angle on a two-dimensional concentric circle; And A bit information converter for extracting bit information about each of the I-channel or Q-channel symbol signals rotated by using the rotation angle output by the rotation angle calculator. Bit information splitting device comprising a. The method of claim 7, wherein An absolute value converter for obtaining respective absolute values of the I channel signal and the Q channel symbol signal of the received symbol signal; A phase angle calculator for calculating a radian phase angle by using respective absolute values of the I and Q channel symbol signals output by the absolute value converter; And Arrangement value calculation unit of symbols for obtaining an arrangement value of symbols constituting the I-channel or Q-channel symbol signal using the radian phase angle output by the phase-angle calculation unit Bit information splitting device further comprising. The method of claim 8, Arrangement value calculation unit of the symbols, And obtaining a placement value of the symbols by using a floor function based on the number of signal spaces in which the symbol signal is arranged and the radian phase angle for each bit constituting the received symbol signal. The method of claim 9, The rotation angle calculation unit, And a rotation angle calculated using the arrangement value of the symbols output from the arrangement value calculator of the symbols and the number of signal spaces in which the symbol signal is arranged. The method of claim 10, The bit information converter, The sum of a value obtained by multiplying the absolute value of the I-channel symbol signal and the sine of the rotation angle and a value obtained by multiplying the absolute value of the Q-channel symbol signal and the cosine of the rotation angle is calculated. And multiplying a sum of values by a value of -1, which is an exponent of the arrangement value of the symbols, and extracting the bit information. The method of claim 11, The bit information converter, If the bit value of the bit information to be extracted from the received symbol signal is less than 1, bit information is extracted by taking a '-' sign for each of the I and Q channel symbol signals of the received symbol signal, and the bit value is The bit information dividing apparatus extracts bit information by using absolute values of the I and Q channel symbol signals of the received symbol signal, the arrangement value of the symbols, and the rotation angle.

Images