KR100871892B1 - Field emission display and fabricating method thereof - Google Patents

Abstract

A field emission display and a manufacturing method thereof are provided to improve the picture quality of the field emission display and collect the electron beam without the separate focus structure. A field emission display comprises the opaque cathode electrode(C(CRr)), the transparent cathode electrode(C(ITO)), a plurality of antiglare metal patterns(21), a plurality of seed metal patterns(22), a plurality of emitters(23), the Insulating layer(24), the opaque gate electrode(G(Mo)), and the transparency gate electrode(G(ITO)). The opaque cathode electrode is formed on the lower transparent substrate including the first opaque conductive metal. The antiglare metal pattern is formed on the transparent cathode electrode. The seed metal pattern is formed on the antiglare metal pattern. The emitter is perpendicularly formed on the seed metal pattern. The insulating layer covers the opaque cathode electrode, the transparent cathode electrode, the antiglare metal pattern and seed metal pattern. The opaque gate electrode is formed on the insulating layer and includes the second opaque conductive metal. The transparency gate electrode includes a plurality of gate holes exposing emitters.

Description

Field emission display and manufacturing method {Field Emission Display and Fabricating Method

BACKGROUND OF THE INVENTION Field of the Invention The present invention relates to a field emission display device, and more particularly, to a field emission display device and a method of manufacturing the same, which can be manufactured in a TFT-LCD production line and focus the electron beam without a separate focus structure for focusing the electron beam.

As the information transmission medium, a cathode ray tube (CRT) is the most common display device, and various flat panel displays (FPDs) that can solve the disadvantages of the cathode ray tube have been developed and marketed.

Flat display devices include liquid crystal displays (LCDs), plasma display panels (PDPs) and organic light emitting diode displays (OLEDs), most of which are commercially available. have.

Field Emission Display (FED), which is not yet commercialized, forms an electric field between the field emitters and gate electrodes arranged at regular intervals on the cathode electrode to induce the emission of electrons from the electron emission sources. The image is displayed by colliding this electron with the fluorescent substance on the anode electrode. The field emission display device has been attracting attention as a next generation display device along with liquid crystal display devices and plasma display panels due to its advantages such as light and small size, wide viewing angle, and low power consumption.

Field emission displays can be divided into two development directions in terms of phosphors. Among them, Low Voltage Phosphor technology was proposed by LETI, a French national research institute, and focused on TI, MICRON, and MOTOROLA in the United States. . It is a technology that was commercialized by Inc. This low voltage phosphor technology uses a common Spindt Tip as the electron emission source of the cathode electrode and applies a relatively low voltage of 1KV or less to the anode electrode. The low voltage phosphor technology narrows the gap between the cathode electrode and the anode electrode to 100 μm or less, and separately develops a low voltage phosphor suitable for solving the spacer problem and the focusing problem of the electron beam. However, the low-voltage phosphor technology failed to develop low-voltage phosphors, and related manufacturers abandoned the development midway.

High Voltage Phosphor technology was developed by Candescent Co., a US-based venture company. And the focusing structure was developed and applied. However, developers of high voltage phosphor technology have also abandoned the technology. This is because it has been confirmed that it cannot compete with existing TFT-LCDs in the face of the manufacture of spin tip type and the development of special equipment, process and materials in complex focusing structure. In addition, Samsung SDI, SONY and others attempted to commercialize using powder carbon nanotubes, but eventually gave up commercialization due to electron focusing problems and complicated manufacturing process.

Accordingly, an object of the present invention is to solve the problems of the prior art, and the object of the present invention is to solve the problems of the low voltage phosphor technology and the high voltage phosphor technology to reduce the production cost and to produce an electron beam without a separate focus structure for focusing the electron beam. A field emission display device for focusing and a method of manufacturing the same.

In order to achieve the above object, the field emission display device according to the embodiment of the present invention comprises an opaque cathode electrode formed on a lower transparent substrate including a first opaque conductive metal; A transparent cathode electrode comprising a first transparent conductive metal and formed on the lower transparent substrate to be in contact with the opaque cathode electrode; A plurality of light blocking metal patterns formed on the transparent cathode electrode; A plurality of seed metal patterns formed on the light blocking metal patterns; A plurality of electron emission sources formed vertically on the seed metal pattern; An insulating layer covering the opaque cathode electrode, the transparent cathode electrode, the light blocking metal pattern, and the seed metal pattern and buried under an upper end of the electron emission source; An opaque gate electrode formed on the insulating layer to include a second opaque conductive metal to surround the gate region in which the electron emission sources are formed; And a transparent gate electrode including a second transparent conductive metal and formed on the opaque gate electrode and the insulating layer to contact the opaque gate electrode and having a plurality of gate holes exposing the electron emission sources.

The diameter of each of the gate holes is between 1 μm and 10 μm.

The thickness of the light blocking metal pattern is thicker than the thickness of the seed metal pattern.

The opaque cathode electrode and the opaque gate electrode include chromium (Cr), copper (Cu), aluminum (Al), or an alloy thereof.

The transparent cathode electrode and the transparent gate electrode include indium tin oxide (ITO), zinc tin oxide (IZO), or the like.

The light blocking metal pattern includes molybdenum (Mo), titanium (Ti), and the like.

The seed metal pattern includes nickel (Ni) or the like.

The electron emission source includes a bundle of carbon nanotubes formed vertically from the seed metal pattern.

The insulating layer includes any one of an organic insulating material and an inorganic insulating material.

The field emission display device includes an upper transparent substrate facing the transparent gate electrode and the electron emission sources with an electron emission space therebetween; An anode formed on the upper transparent substrate; And a phosphor formed in the anode electrode and exposed to the electron emission space.

The field emission display device emits electrons from the electron emission source using only a positive voltage supplied to the anode electrode, supplies a negative voltage to the gate electrodes, focuses the electron beam emitted from the electron emission source, and implements gradation. .

A method of manufacturing a field emission display device according to an exemplary embodiment of the present invention includes forming an opaque cathode electrode including a first opaque conductive metal on a lower transparent substrate; Forming a transparent cathode electrode including a first transparent conductive metal on the lower transparent substrate to be in contact with the opaque cathode electrode; Forming a plurality of light blocking metal patterns on the transparent cathode electrode and forming a plurality of seed metal patterns on the light blocking metal patterns; Growing a plurality of carbon nanotube bundles vertically on the seed metal pattern using PECVD to form a plurality of electron emission sources on the seed metal pattern; Forming an insulating layer covering the opaque cathode electrode, the transparent cathode electrode, the light shielding metal pattern, and the seed metal pattern and buried under an upper end of the electron emission source; Forming an opaque gate electrode comprising a second opaque conductive metal to surround the gate region in which the electron emission sources are formed; And forming a transparent gate electrode including a second transparent conductive metal on the opaque gate electrode and the insulating layer to be in contact with the opaque gate electrode. A plurality of gate holes are formed in the transparent gate electrode to expose the electron emission sources.

The manufacturing method of the field emission display device according to the embodiment of the present invention can significantly reduce the production cost, the field emission display device can focus the electron beam without a separate focus structure, and display the original image quality of the field emission display device. It can be further improved than the flat panel display element.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 1 to 4B.

The field emission display device according to the exemplary embodiment of the present invention includes an upper transparent substrate 10 and a lower transparent substrate 20 that face each other with the electron emission space 100 therebetween. The upper transparent substrate 10 and the lower transparent substrate 20 may be selected from a glass substrate, a ceramic substrate or a plastic substrate.

An anode electrode A is formed on the upper transparent substrate 10, and a phosphor 12 is formed on the anode electrode A. Since the upper transparent substrate 10 is substantially the same as the top structure of the general field emission display device, a detailed description thereof will be omitted.

The lower transparent substrate 20 has an opaque cathode electrode C (Cr), a transparent cathode electrode C (ITO), a light shielding metal pattern 21, a seed metal pattern 22, an electron emission source 23, an insulating layer. An opaque gate electrode G (Mo), a transparent gate electrode (or pixel electrode) G (ITO), and the like are formed.

The opaque cathode electrode C (Cr) is formed of one of chromium (Cr), copper (Cu), aluminum (Al), or an alloy thereof on the lower transparent substrate 20, and the electron emission source 24 is located thereon. Patterned to expose gate hole region 30. The transparent cathode electrode C (ITO) is formed on the gate hole region 30 in which the electron emission sources 24 are positioned in the lower transparent substrate 20 using ITO, IZO, or the like, and the edge of the transparent cathode electrode C (ITO) is opaque. Patterned so as to overlap Cr)).

The light blocking metal pattern 21 is formed on the transparent cathode electrode C (ITO) by molybdenum (Mo) or titanium (Ti). The seed metal pattern 22 is formed on each of the light blocking metal patterns 21 by nickel (Ni) or the like.

The electron emission source 23 includes a plurality of carbon nanotubes (CNTs) grown on the seed metal pattern 22. The carbon nanotubes of the electron emission source 23 are exposed only at the upper end to the electron emission space 100 and the lower parts thereof are embedded in the insulating layer 24. When the electron emission source 23 is embedded in the insulating layer 24, the electron emission threshold voltage of the electron emission source 23 embedded in the insulating layer 24 having a dielectric constant similar to that of the electron emission space 100 may be lowered. have.

The insulating layer 24 is an organic insulating material such as photoacryl, benzo-cyclo-butene (BCB), or an inorganic insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx), and the opaque cathode electrode C (Cr) below. ), The transparent cathode electrode C (ITO), the light shielding metal pattern 21 and the seed metal pattern 22 are formed to cover the stacked metal pattern. The upper end of the electron emission source 23 passes through the insulating layer 24 and is exposed to the electron emission space 100.

The opaque gate electrode G (Mo) is formed on the insulating layer 24 by using one of chromium (Cr), copper (Cu), aluminum (Al), or an alloy thereof on the lower transparent substrate 20, and emits electrons. The pattern 24 is patterned to surround the gate hole region 30 in which the circle 24 is located. The transparent gate electrode G (ITO) is formed on the insulating layer 24 and the opaque gate electrode G (Mo) by ITO, IZO, or the like.

The field emission display device according to the embodiment of the present invention uses the high voltage phosphor 12 used in the conventional cathode ray tube to solve the problem of the low voltage phosphor technology, and constitutes a production line that has been a problem in the high voltage phosphor technology. In order to solve the problem of excessive investment cost and high manufacturing cost, the TFT-LCD production line is used to form the thin film layer and the electron emission source.

The prior art forms an electron emission source using a spin emitter using a molybdenum cone, which can be formed using self-limited evaporation, which is difficult to manufacture. Was applied to induce the release of electrons from the spin emitter. For this reason, the field emission display of the related art has a focus structure in which an electron beam is diffused due to a positive voltage applied to the gate electrode, thereby forming a separate insulating layer on the gate electrode and a separate focus electrode on the insulating layer. . In contrast, the field emission display device according to an embodiment of the present invention vertically grows carbon nanotubes using PECVD (Plasma Enhanced Chemical Vapor Deposition Apparatus) of a TFT-LCD production line instead of the spin cone, and the carbon nanotubes. They are embedded in the insulating layer 24 to lower the threshold voltage for electron emission to 1V / μm or less to control the electron emission only by the positive voltage applied to the anode (A). In the field emission display device according to an exemplary embodiment of the present invention, a gray voltage is controlled by applying a negative voltage to the gate electrodes G (Mo) and G (ITO) as shown in FIG. 2, and the gate electrodes G (Mo), Since the electron beam is focused due to the negative voltage applied to G (ITO)), a separate focus electrode is not required.

2 shows current-voltage characteristics of a field emission display device according to an exemplary embodiment of the present invention. In Fig. 2, "Vgc" is the electric field strength that hangs on the electron emission source 23.

Referring to FIG. 2, the threshold voltage of the field emission display device according to an exemplary embodiment of the present invention is 1 V / μm or less, and the saturated emission condition is already reached at an electric field of 5 V / μm. Accordingly, in FIG. 1, when the distance between the anode electrode A and the cathode electrode C (Cr) is 0.5 mm to 2 mm, and a positive voltage of about 6 to 12 KV is applied to the anode electrode A, an electron emission source ( Since the electric field applied to 23 reaches the electron emission saturation region, the phosphor 12 emits light at the maximum brightness, when a negative voltage between -10V and -20V is applied to the gate electrode G (Mo). The electric field sensed by the electron emission source 23 by the negative electric field is controlled from the saturated emission region to the threshold electric field region to control the brightness of the phosphor 12 to express gray scale.

3A to 3G are diagrams illustrating a method of manufacturing a bottom plate of a field emission display device according to an exemplary embodiment of the present invention.

Referring to FIG. 3A, the present invention deposits chromium (Cr) on the lower transparent substrate 20 and then pattern the chromium layer by photolithography using a first mask to form an opaque cathode electrode C. FIG. (Cr)). The opaque cathode electrode C (Cr) exposes the lower transparent substrate 20 in the gate hole region 30 in which the electron emission source 24 is to be located.

Subsequently, after the entire surface of the ITO is deposited as shown in FIG. 3B, the ITO is patterned by a photolithography process using a second mask to form a transparent cathode electrode C (ITO). The transparent cathode electrode C (ITO) is formed in the gate hole region 30 in which the electron emission source 24 is to be positioned, and overlaps the edge of the opaque cathode electrode C (Cr) so as to overlap the opaque cathode electrode C (Cr). Is electrically connected to

Subsequently, the present invention sequentially deposits molybdenum (Mo), nickel (Ni), and the like on the lower transparent substrate 20 in order, as shown in FIG. 3C, and then, based on the photolithography process using a third mask, molybdenum (Mo) and nickel ( Ni is simultaneously patterned to form the light shielding metal pattern 21 and the seed metal pattern 22 in the gate hole region 30 in which the electron emission source 24 is to be located. The nickel layer thickness of the seed metal pattern 22 is between 50 kPa and 200 kPa, and the thickness of the light shielding metal pattern 21 is about 200 kPa and 1000 kPa thicker than that of the seed metal pattern 22.

Subsequently, the present invention inserts the lower transparent substrate 20 having completed the process of FIG. 3C into the PECVD equipment, and vertically grows the carbon nanotube bundles from the seed metal pattern 22 as shown in FIG. 3D, onto the seed metal pattern 22. The electron emission source 23 is formed.

Subsequently, the present invention forms the insulating layer 24 by coating the entire surface of the organic insulating material or depositing the inorganic insulating material on the lower transparent substrate 20 as shown in FIG. 3E. In addition, the present invention is a cathode for exposing a cathode pad connected to the opaque cathode electrode (C (Cr)) at the edge of the substrate by patterning the insulating layer 24 through a photolithography process and an etching process using a fourth mask A contact hole is formed. The cathode pads are connected to output terminals of a driving circuit for supplying a negative voltage driving signal to the cathode electrode. At this time, the height of the carbon nanotubes can be controlled by a photolithography process or a plasma ashing process using a photoresist. In other words, the present invention generates the oxygen plasma in the plasma ashing process equipment and burns the carbon nanotubes protruding beyond the insulating layer 24 to control the height of the carbon nanotubes below the transparent gate electrode G (ITO). can do.

Subsequently, in the present invention, after the entire deposition of molybdenum (Mo) or the like on the insulating layer 24, the molybdenum layer is patterned through a photolithography process using a fifth mask to opaque gate electrode G (Mo). ) Is formed on the insulating layer 24. By this patterning process, the opaque gate electrode G (Mo) exposes the electron emission sources 23 and the insulating layer 24 in the gate hole region 30 in which the electron emission sources 23 are formed.

Subsequently, in the present invention, after ITO is deposited on the lower transparent substrate 20 having completed the process of FIG. 3F, the ITO is subjected to a photolithography process using a sixth mask as shown in FIG. Patterning is performed to form transparent gate electrode patterns G (ITO) exposing the electron emission sources 23 in the gate hole region 30. At the same time, the present invention patterns ITO at the edge of the lower transparent substrate 20 to expose the gate pad connected to the opaque gate electrode G (Mo). The front exposure and back exposure processes will be described in detail below with reference to FIGS. 4A and 4B. The diameter? Of the gate hole 25 formed by patterning the transparent gate electrode G (ITO) is 1 μm to 10 μm. Due to the negative voltage applied to the gate electrodes G (Mo) and G (ITO), the electron beam emitted through the gate hole 25 is focused and proceeds toward the anode electrode A of the upper plate.

4A and 4B illustrate the transparent gate electrode patterning process of FIG. 3G in detail.

Referring to FIG. 4A, after the negative photoresist 40 is entirely coated on the lower transparent substrate 20 formed up to the transparent gate electrode G (ITO), the photoresist 40 is formed. The photo mask blocking the light emitted to the gate hole region 30 in which the electron emission sources 23 are formed is aligned. Next, the present invention exposes the entire photoresist 40 by irradiating ultraviolet rays through a photo mask. As a result, the photoresist 40 becomes unexposed in the gate hole region 30 and the photoresist 40 is first exposed in the remaining regions.

Subsequently, the present invention performs back exposure by irradiating ultraviolet rays under the lower transparent substrate 20 as shown in FIG. 4B. Then, the gate holes remain in the non-exposed state in the gate hole region 30 due to the light shielding metal pattern 21, and portions between the gate holes and the remaining regions other than the gate hole region 30 are secondarily exposed.

After the second exposure process, development, etching, and cleaning processes are performed. The photoresist 40 corresponding to the unexposed gate holes by the developing process is removed, and when the etching process is performed through the remaining photoresist patterns, the transparent gate electrode G (ITO) is removed from the gate holes. As shown in FIG. 3G, the electron emission sources 23 are exposed.

The gate holes may be formed by a self alignment process or other processes in addition to the photolithography process described above.

Meanwhile, in the above-described embodiment, the transparent cathode electrode C (ITO) and the transparent gate electrode G (ITO) have been described based on an example in which ITO is formed so that light can be transmitted in the exposure process. It may be replaced by carbon nanotube powder or ultra thin metal film in which voids exist.

As described above, the manufacturing method of the field emission display device according to the embodiment of the present invention can be manufactured by using a TFT-LCD production line, thereby significantly reducing the production cost. In addition, the field emission display device according to the embodiment of the present invention can focus the electron beam without a separate focus structure for focusing the electron beam by applying a negative voltage to the gate electrode, and there is no focus structure. The interval can be narrowed to lower the electron emission voltage.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

1 is a cross-sectional view of a field emission display device according to an exemplary embodiment of the present invention.

2 is a graph showing current-voltage characteristics between a gate electrode and a cathode showing driving characteristics of the field emission display device according to an exemplary embodiment of the present invention.

3A to 3G are cross-sectional views sequentially illustrating a method of manufacturing the field emission display shown in FIG. 1.

4A and 4B are cross-sectional views illustrating the manufacturing process of FIG. 3G in detail.

<Description of Symbols for Main Parts of Drawings>

10: upper transparent substrate A: anode electrode

12: phosphor 20: lower transparent substrate

C (Cr): opaque cathode electrode C (ITO): transparent cathode electrode

21 shading metal pattern 22 seed metal pattern

23: electron emission source 24: insulating layer

25: gate hole G (Mo): opaque gate electrode

G (ITO): transparent gate electrode (or pixel electrode) 30: gate hole region

100: electron emission space

Claims (10)

An opaque cathode electrode formed on a lower transparent substrate including a first opaque conductive metal; A transparent cathode electrode comprising a first transparent conductive metal and formed on the lower transparent substrate to be in contact with the opaque cathode electrode; A plurality of light blocking metal patterns formed on the transparent cathode electrode; A plurality of seed metal patterns formed on the light blocking metal patterns; A plurality of electron emission sources formed vertically on the seed metal pattern; An insulating layer covering the opaque cathode electrode, the transparent cathode electrode, the light blocking metal pattern, and the seed metal pattern and buried under an upper end of the electron emission source; An opaque gate electrode formed on the insulating layer to include a second opaque conductive metal to surround the gate region in which the electron emission sources are formed; And And a transparent gate electrode formed on the opaque gate electrode and the insulating layer to include a second transparent conductive metal to be in contact with the opaque gate electrode and having a plurality of gate holes exposing the electron emission sources. Field emission display. The method of claim 1, The diameter of each of the gate holes is a field emission display device, characterized in that between 1μm and 10μm in diameter. The method of claim 1, The thickness of the light blocking metal pattern is greater than the thickness of the seed metal pattern. The method of claim 1, The opaque cathode electrode and the opaque gate electrode include one of chromium (Cr), copper (Cu), aluminum (Al), or an alloy thereof; The transparent cathode electrode and the transparent gate electrode include any one of indium tin oxide (ITO) and zinc tin oxide (IZO); The light blocking metal pattern includes one of molybdenum (Mo) and titanium (Ti); The seed metal pattern includes nickel (Ni); The electron emission source comprises a bundle of carbon nanotubes formed vertically from the seed metal pattern; And wherein the insulating layer includes any one of an organic insulating material and an inorganic insulating material. The method of claim 1, An upper transparent substrate facing the transparent gate electrode and the electron emission sources with an electron emission space therebetween; An anode formed on the upper transparent substrate; And And a phosphor formed on the anode and exposed to the electron emission space. The method of claim 5, wherein Emitting electrons from the electron emission source only with a positive voltage supplied to the anode electrode; And supplying a negative voltage to the gate electrodes to focus the electron beam emitted from the electron emission source and to implement gradation. Forming an opaque cathode electrode comprising a first opaque conductive metal on the lower transparent substrate; Forming a transparent cathode electrode including a first transparent conductive metal on the lower transparent substrate to be in contact with the opaque cathode electrode; Forming a plurality of light blocking metal patterns on the transparent cathode electrode and forming a plurality of seed metal patterns on the light blocking metal patterns; Growing a plurality of carbon nanotube bundles vertically on the seed metal pattern using PECVD to form a plurality of electron emission sources on the seed metal pattern; Forming an insulating layer covering the opaque cathode electrode, the transparent cathode electrode, the light shielding metal pattern, and the seed metal pattern and buried under an upper end of the electron emission source; Forming an opaque gate electrode comprising a second opaque conductive metal to surround the gate region in which the electron emission sources are formed; And Forming a transparent gate electrode including a second transparent conductive metal on the opaque gate electrode and the insulating layer to be in contact with the opaque gate electrode; And a plurality of gate holes are formed in the transparent gate electrode to expose the electron emission sources. The method of claim 7, wherein The diameter of each of the gate holes is between 1 μm and 10 μm, The thickness of the light shielding metal pattern is greater than the thickness of the seed metal pattern manufacturing method of the field emission display device. The method of claim 7, wherein The opaque cathode electrode and the opaque gate electrode include one of chromium (Cr), copper (Cu), aluminum (Al), or an alloy thereof; The transparent cathode electrode and the transparent gate electrode include any one of indium tin oxide (ITO) and zinc tin oxide (IZO); The light blocking metal pattern includes one of molybdenum (Mo) and titanium (Ti); The seed metal pattern includes nickel (Ni); The electron emission source comprises a bundle of carbon nanotubes formed vertically from the seed metal pattern; And the insulating layer comprises any one of an organic insulating material and an inorganic insulating material. The method of claim 7, wherein Forming the transparent gate electrode, Applying a negative photoresist to cover the transparent conductive metal of the transparent gate electrode; a front exposure step of irradiating light to the negative photoresist on the lower transparent substrate; and a negative photoresist under the lower transparent substrate. Further comprising forming a gate hole by etching the transparent conductive metal through a back exposure process of irradiating light, a developing process of removing a portion of the negative photoresist exposed, and a photoresist pattern remaining after the developing process. A method of manufacturing a field emission display device, comprising:

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