KR100863005B1 - FREQUENCY SYNTHESIZER USING PHASE LOCKED DIELECTRIC RESONANT OSCILLATOR GENERATING FREQUENCY BAND OF 15GHz - Google Patents

Abstract

A frequency synthesizer using a phase locked dielectric resonator oscillator in a 15 GHz band includes a temperature controlled crystal oscillator for outputting a signal having a fundamental frequency, a voltage controlled dielectric resonator oscillator having a dielectric resonator and outputting a frequency by dielectric resonance, and the temperature controlled crystal oscillator And an output frequency of the voltage controlled dielectric resonator oscillator and an output frequency of the voltage controlled dielectric resonator oscillator, the output frequency of the voltage controlled dielectric resonator oscillator and the frequency of the harmonics of the temperature controlled crystal oscillator Sampling phase detector for outputting the difference of the frequency of the control dielectric resonator oscillator, first loop filter for filtering the output voltage of the sampling phase detector to be zero (0) and the fundamental frequency to make the fundamental frequency of the temperature controlled crystal oscillator Generating Mixing the output of the second phase locked loop, the output of the second phase locked loop and the output of the voltage controlled dielectric resonator oscillator programmed to receive an input from a even controlled crystal oscillator and select a channel in predetermined frequency units within a predetermined frequency range. And a mixer for outputting the sum and difference of the frequencies, a band pass filter for removing the image frequency by passing only the sum frequency of the outputs of the mixer, and a frequency multiplier for doubling the output frequency of the band pass filter.

 Oscillator, Dielectric

Description

FREQUENCY SYNTHESIZER USING PHASE LOCKED DIELECTRIC RESONANT OSCILLATOR GENERATING FREQUENCY BAND OF 15 GHz}

1 is a block diagram illustrating a phase locked dielectric resonator oscillator 100 according to an embodiment of the present invention.

FIG. 2 is an internal circuit diagram of the voltage controlled dielectric resonator oscillator 10 shown in FIG. 1,

3 is an overall block diagram of a frequency synthesizer 900 using the phase locked dielectric resonator oscillator 100 according to an embodiment of the present invention illustrated in FIGS. 1 and 2.

4 is a circuit diagram of one preferred embodiment of the microwave sampling phase detector 20 shown in FIG.

5 is a view showing a parallel feedback voltage controlled dielectric resonator oscillator according to the prior art,

6 is an experimental result data showing a frequency variable range according to the voltage of the voltage controlled dielectric resonator,

7 is a graph of phase noise measured at each offset frequency of a phase locked dielectric resonator oscillator,

8 is an output waveform of the phase locked dielectric resonator oscillator 100 having a phase fixed to a reference frequency.

9 is a diagram showing an output frequency waveform of the voltage controlled oscillator VCO (Voltage Controlled Oscillator) 86,

FIG. 10 is a graph showing an output waveform of the frequency synthesizer 900 using the phase-locked dielectric resonator oscillator 100 of the finally completed 15 GHz band.

<Explanation of symbols for the main parts of the drawings>

10 voltage controlled dielectric resonator oscillator

13 Dielectric Resonator

15 tuning screw

17 varactor diodes

20 microwave sampling phase detector

30 Temperature Compensated Crystal Oscillator (TCXO)

31 OCXO (Oven Controlled Crystal Oscillator): Reference Oscillator

32 phase detector PD1

33 loop filter LF2

34 VCXO (Voltage Controlled Crystal Oscillator): Voltage Controlled Crystal Oscillator

35 divider 1 / N

36 Driving Amplifiers DA1 (Driving Amplifier)

40 Active Loop Filter

42 Operational Amplifier

44, 46, 48 capacitor (C ₁ ) and resistor (R ₁ , R ₂ ) for secondary active filter

50 Current source for triangle wave generator

60 fixed detection circuit

70 mixer

80 Band Pass Filter

82 phase detector PD2

84 loop filter LF3

86 voltage controlled oscillator

88 divider 1 / N

90 frequency doubler

96 Driving Amplifier DA2

100 phase locked dielectric resonator oscillator

Frequency Synthesizer Using 900 Phase Locked Dielectric Resonator Oscillator

The present invention relates to a phase locked dielectric resonator oscillator and a frequency synthesizer using the same. More specifically, when the phase is fixed by widening a wide range of the conventional oscillation frequency, the frequency stability according to temperature is improved but the phase is improved. As a result of the problem that the noise characteristics deteriorate, a technical configuration that solves the above problems, that is, by widening the variable range of the dielectric resonator, it is easy to secure the locking range according to the temperature change, while the frequency stability and phase noise characteristics The present invention relates to a phase locked dielectric resonator oscillator of 15 GHz band and a frequency synthesizer using the same.

Recently, transmission and reception of digital signals are being performed at very high frequencies. An example is the transmission and reception of audio, video, data signals, or data from a wireless satellite, and in such a digital communication system, in particular, a communication system using Phase Shift Keying (PSK). The frequency stability and phase noise characteristics of the local oscillator in the microwave device required for down or up have a significant impact on the Bit Error Rate characteristics of the entire system. Inflicted.

Local oscillator of such communication system has multiple stages of crystal oscillator, but the device is not only complicated and bulky, but also has low frequency stability and noise. The passive elements constituting the resonator circuit of the oscillator include a micro strip and a dielectric resonator, where the dielectric resonator is smaller in volume than the waveguide, has a small change in resonant frequency due to temperature change, and is inexpensive. It is inexpensive and is used directly as a frequency-determining device of a MIC oscillator that requires stabilization.

However, in general, the frequency stability of the dielectric resonator is several ppm / ℃ is not suitable for the transmission and reception of data signals. Therefore, in order to transmit and receive data signals, the oscillation frequency needs to be more stable and phase noise needs to be reduced.

As a means to solve this problem, PLDRO (Phase Locked Dielectric Resonant Oscillator), also known as a phase locked dielectric resonator oscillator, has recently been used. 5 is a diagram illustrating a parallel feedback voltage controlled dielectric resonance oscillator according to the related art. Referring to FIG. 5, the parallel feedback voltage controlled dielectric resonator oscillator according to the related art has a very small variable range (sweep range), a varactor diode is present on the upper surface of the substrate, and noise of a voltage source existing on the upper surface of the substrate is reduced. Incoming from the Rator diode, this caused a problem that the overall phase noise characteristics of the PLDRO deteriorated.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and has a phase locked dielectric resonator oscillator and a frequency synthesizer using the 15 GHz band for widening the sweep range, increasing frequency stability, and excellent phase noise characteristics. Its purpose is to provide.

Other objects and advantages of the invention will be described below and will be appreciated by the embodiments of the invention. Furthermore, the objects and advantages of the present invention can be realized by means and combinations indicated in the claims.

A frequency synthesizer using a phase locked dielectric resonator oscillator of the 15 GHz band according to an embodiment of the present invention for achieving the above object, having a temperature controlled crystal oscillator, a dielectric resonator for outputting a signal having a fundamental frequency to the dielectric resonance A voltage controlled dielectric resonator oscillator for outputting a frequency, an output of the temperature controlled crystal oscillator and an output of the voltage controlled dielectric resonator oscillator, and an output frequency of the voltage controlled dielectric resonator oscillator among harmonics of the temperature controlled crystal oscillator A sampling phase detector for outputting a difference between the frequency of the harmonics of the temperature controlled crystal oscillator and the frequency of the voltage controlled dielectric resonator oscillator having a minimum difference, and filtering and outputting the output voltage of the sampling phase detector to be zero (0). 1 loop filter, the temperature control A second phase locked loop, programmed to select a channel in predetermined frequency units within a predetermined frequency range, receives an input from an oven controlled crystal oscillator that generates a fundamental frequency that creates a fundamental frequency of the positive oscillator. A mixer for mixing the output and the output of the voltage controlled dielectric resonator oscillator, the mixer outputting a difference in frequency thereof, and a frequency multiplier for doubling the output frequency of the mixer.

The temperature controlled crystal oscillator may include an oven controlled crystal oscillator for generating a fundamental frequency, a 1 / N divider for dividing an output frequency of a voltage controlled crystal oscillator at 1 / N, an output of the oven controlled crystal oscillator, and the 1 / N. It receives an output of the N divider as an input, receives a first phase detector for mixing, a second loop filter for filtering the output of the first phase detector, an output of the second loop filter, and receives a voltage controlled crystal oscillation signal. And a voltage controlled crystal oscillator output to the 1 / N divider and the sampling phase detector, respectively.

The temperature controlled crystal oscillator may further include a first driving amplifier interposed between the voltage controlled crystal oscillator and the sampling phase detector to amplify the power of the output signal of the voltage controlled crystal oscillator. A second driving amplifier further amplifies the power of the output signal of the frequency multiplier.

The voltage controlled dielectric resonator oscillator may include an input terminal receiving an output of the first loop filter as an input, a CPW line formed on a lower surface of a substrate on which the frequency synthesizer is formed, and a lower surface of the substrate. And a rectangular GND having a rectangular hole therein, interposed between the CPW line and the GND, a varactor diode formed on a lower surface of the substrate, and a position opposite to the substrate where the CPW line is formed. A first microscript line, a second microscript line, and a second microstrip line formed in parallel with the circular dielectric resonator on the upper surface of the substrate, the dielectric resonator, and the GND interposed therebetween. A capacitor interposed between the GND and formed on an upper surface of the substrate, and the first micro And a driving circuit connected to a script line and the second microstrip line to drive the voltage controlled dielectric resonator oscillator, and formed on an upper surface of the substrate.

In addition, the first and second microscript lines have a length of λ / 2 of 50 Ω and the CPW lines have a length of λ / 2 of 25 Ω.

The programmed second phase locked loop further comprises a 1 / N divider for dividing the output frequency of the voltage controlled oscillator to 1 / N, the output of the oven controlled crystal oscillator and the output of the 1 / N divider as inputs. Receive and mix a second phase detector, a third loop filter for filtering the output of the second phase detector, and an output of the third loop filter, and receive a voltage controlled oscillation signal from the 1 / N divider and the It includes a voltage controlled crystal oscillator that outputs each to the mixer.

In addition, N of the 1 / N divider in the programmed second phase locked loop is variable and N of the 1 / N divider in the temperature controlled crystal oscillator is fixed.

In addition, the predetermined frequency range in the second phase locked loop is 600 to 1000 MHz, and the predetermined frequency unit in the second phase locked loop is any one of 10, 20, 30, 40, and 50 MHz.

The fundamental frequency of the temperature controlled crystal oscillator is 50 MHz, the reference frequency of the oven controlled crystal oscillator is 10 MHz, and the output frequency of the voltage controlled dielectric resonator oscillator is 6.95 GHz.

The material of the substrate is TLX-9 (Teflon), the dielectric constant of the material of the substrate is 2.5, the thickness t of the substrate is 0.508 mm, and the width of the first and second microstrip lines is W. In this case, the width of the CPW line is 2.5W.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

Prior to this, terms or words used in the specification and claims should not be construed as having a conventional or dictionary meaning, and the inventors should properly explain the concept of terms in order to best explain their own invention. It should be interpreted as meanings and concepts corresponding to the technical idea of the present invention based on the principle of definition.

Therefore, the embodiments described in the specification and the drawings shown in the drawings are only the most preferred embodiment of the present invention and do not represent all of the technical idea of the present invention, various modifications that can be replaced at the time of the present application It should be understood that there may be equivalents and variations.

1 is a block diagram illustrating a phase locked dielectric resonator oscillator 100 according to an embodiment of the present invention. FIG. 2 is an internal circuit diagram of the voltage controlled dielectric resonator oscillator 10 shown in FIG. 1. 3 is a schematic block diagram of a frequency synthesizer 900 using a phase locked dielectric resonator oscillator 100 according to an embodiment of the present invention shown in FIGS. 1 and 2.

First, a phase locked dielectric resonator oscillator 100 according to an embodiment of the present invention will be described with reference to FIG. 1.

First, a voltage-tuned dielectric resonant oscillator (VTDRO) or a voltage-controlled dielectric resonant oscillator (VCDRO) 10 is a resonator oscillator using a dielectric resonator 13 capable of varying an output frequency by changing a voltage. . Referring to FIG. 1, an output frequency is adjusted by adjusting a resonance point using a tuning screw 15. Specifically, when the tuning screw 15 is tightened, the resonator is further stressed to increase the output frequency, and when the tuning screw 15 is loosened, the resonator is less stressed to lower the output frequency. do.

Next, a microwave sampling phase detector (SPD) 20 is a circuit used in a phase locked circuit for a microwave oscillator. As an example of the sampling phase detector, it may consist of a step recovery diode (SRD), two capacitors, and two Schottky diodes.

As can be seen with reference to Figure 1, the microwave sampling phase detector 20 receives two inputs, and gives one output. Here, referring to the two inputs, the output of the voltage-controlled dielectric resonator oscillator 10 goes back to the input of the sampling phase detector 20, and the output of the TCXO 30 which will be described later is a sampling phase detector ( Enter 20).

The same voltage among the signals of the voltage controlled dielectric resonator oscillator 10 when the signal of the TCXO 30, that is, the frequency f _REF of the basic signal and the frequency of the voltage controlled dielectric resonator oscillator 10 signal is harmonic. The point is sampled and outputs a constant DC output or offset voltage.

However, when the signal of the TCXO 30 and the signal of the voltage controlled dielectric resonator oscillator 20 are not harmonic to each other, other points of the signal of the voltage controlled dielectric resonator oscillator 20 are sampled. In this case, each case produces a sinewave output. The frequency of this sine wave is equal to the frequency difference between the frequency of the voltage controlled dielectric resonance oscillator 20 signal and the harmonic closest to the frequency of the voltage controlled dielectric resonance oscillator 20 signal among the harmonics (harmonics) of the basic signal. For reference, the Temperature Compensated Crystal Oscillator (TCXO) 30 used herein is a frequency (f _REF ) source of a basic signal that generates a basic signal having high frequency stability and temperature characteristics and having low phase noise.

In addition to the above, the sampling phase detector 20 may be configured as a step recovery diode (SRD), a coupling capacitor, and a microwave mixer diode. Referring to FIG. 4, when the basic input signal enters the SRD, the current flows from one side to the other when the half cycle of the cycle is forward. When a reverse voltage is applied, the current is no longer blurred and the charge accumulated on the junction flows very quickly in reverse, forming a current pulse. This current pulse produces harmonics, resulting in a combination of fundamental and harmonic frequencies.

As described above, in this case, if the signal of the fundamental frequency and the feedback voltage-controlled dielectric resonator oscillator 10 is exactly harmonically matched, a constant DC voltage is generated. Generates an intermediate frequency (IF) signal corresponding to the difference of. At this time, the generated error voltage is filtered by the loop filter LF1 40 to be described later, and then applied to the varactor diode 17 of the voltage controlled dielectric resonator oscillator 10.

In addition, the loop filter LF1 (Loop Filter) 40 corresponds to a frequency difference from the harmonic of the voltage-controlled dielectric resonator oscillator 10 signal closest to the frequency of the harmonics of the basic signal output from the sampling phase detector 20. It is a circuit to filter the voltage to force zero (0). As described above, the output of the loop filter LF1 40 for forcibly zeroing is fed back to the voltage controlled dielectric resonator oscillator 10, specifically, the varactor diode 17 of FIG. 2. In the present embodiment, the loop filter LF1 40 is implemented as a second-order active RC filter 44, 46, 48 using an operational amplifier (OP Amp) 42.

In addition, the current source 50 is a triangle wave generator, a configuration for sweeping the frequency of the voltage controlled dielectric resonator oscillator 10, for example, the frequency of the voltage controlled dielectric resonator oscillator 10 within a 10 MHz range. The configuration to sweep the. The output of the loop filter LF1 40, which is output according to the swept current source 50, is a varactor diode 17 located below the substrate in the circuit of the voltage controlled dielectric resonator oscillator 10 of FIG. 2 to be described later. ) Will be connected.

The lock detection circuit 60 is a circuit for detecting that the output frequency of the voltage controlled dielectric resonance oscillator 10 is fixed (phase fixed). Lock Detect Alarm refers to an alarm that occurs when phase lock is detected by the lock detection circuit 60.

Hereinafter, an internal circuit diagram of the voltage controlled dielectric resonator oscillator 10 illustrated in FIG. 1 will be described in more detail with reference to FIG. 2.

Each component on the circuit of FIG. 2 is disposed separately on the top and bottom surfaces of the substrate fabricated in accordance with this embodiment. The varactor diode 17 disposed between the GND (ground) line, the CPW line, and the GND line and the CPW line, which is shown in black, is disposed on the lower surface of the substrate. The components of the circuit of the voltage controlled dielectric resonator oscillator 10 except for the components are placed on the upper surface of the substrate.

In addition, the output filtered by the loop filter LF1 40 is input to Vtune of FIG. 2. An oscillator output corresponds to the output of the voltage controlled dielectric resonator oscillator in FIG. 1. Referring to FIG. 1, this output is coupled to enter the input of the sampling phase detector 20.

The voltage controlled dielectric resonator oscillator 10 shown in FIG. 2 differs in several respects from the parallel feedback voltage controlled dielectric resonator oscillator described in the prior art.

As a difference, in the parallel feedback voltage controlled dielectric resonator oscillator described in the related art, a 50Ω resistor is applied between the ends of two 50Ω (length = λ / 2) strip lines, respectively, connected to ground. It will be included. However, in accordance with an embodiment of the present invention, one of the two 50Ω (length = λ / 2) strip lines terminates with a capacitor of C5 (see FIG. 2) between ground and instead of a 50Ω resistor. The end of the other 50Ω (length = λ / 2) strip line is not connected to ground, nor is the 50Ω resistor connected to that end and is open.

As another difference, in the parallel feedback voltage controlled dielectric resonator oscillator described in the prior art, a varactor diode is interposed between a 50Ω (length = λ / 2) strip line and a gate of the FET on the upper surface of the substrate. However, according to the embodiment of the present invention, the varactor diode 17 is disposed on the lower surface of the substrate.

Another difference is that varactor diodes placed on the underside of the substrate are interposed between the CPW line and the GND line, in which case the CPW line is the same width as the 50Ω (length = λ / 2) strip line. Adjust (width) so that it is 25Ω.

For example, if the substrate material is TLX-9 (Teflon), the dielectric constant is 2.5, and the substrate thickness (t) is 20 mil (= 20/1000 inch) = 0.508 mm, 50 Ω (length = λ / 2) When the width of the strip line is W, if the length of the CPW line is λ / 2, the width is 2.5W.

Through the configuration of the voltage controlled dielectric resonator oscillator according to the embodiment of the present invention, the following effects can be obtained. In a conventional parallel feedback voltage controlled dielectric resonator oscillator, the sweep range can be significantly widened by interposing only C ₅ between one of the 50 Ω strip lines and the ground, instead of having a 50 Ω resistor between each 50 Ω strip line and ground. there was. Through this configuration, compared with the prior art, the effect of extending the sweep range of 5 MHz or more was obtained.

By arranging the varactor diodes 17 on the lower surface of the substrate, the voltage noise present on the upper surface of the substrate can be significantly reduced, and the phase noise can be significantly reduced. As compared with the prior art in which the varactor diodes are disposed on the upper surface of the substrate, the improvement effect of -10 dBc or more can be obtained through the technical configuration of arranging the varactor diodes 17 on the lower surface of the substrate.

On the other hand, since the bias circuit for inducing other resonance in FIG. 2 is a general content to those skilled in the art will be omitted.

Next, FIG. 3 is a schematic block diagram of a frequency synthesizer 900 using the phase locked dielectric resonator oscillator 100 according to an embodiment of the present invention shown in FIGS. 1 and 2. Components using the same reference numerals as in FIGS. 1 and 2 indicate the same components, and thus description thereof will be omitted.

Looking at the configuration of the TCXO (30) in more detail with reference to Figure 3, TCXO (30) is a reference oscillator (OCXO) (31), phase detector PD1 (32), loop filter LF2 (33), VCXO (34), A divider 1 / N 35 and a driving amplifier DA1 36 are included.

Referring first to the OCXO 31, the OCXO (Oven Controlled Crystal Oscillator) 31 is a crystal oscillator having a frequency of 10 MHz, and the PD1 (32) divides the signal fed back from the VCXO 34 as a phase detector by 1 / N. It consists of a mixer that mixes the signal and the signal of the OCXO. Here, N may be a fixed constant or variable, but in embodiments of the present invention, it is preferable to fix N such that the output frequency of the VCXO 34 is 50 MHz. The loop filter LF2 33 filters the mixed signal. Such a configuration is a general phase locked loop (PLL) configuration and a detailed description thereof will be omitted.

On the other hand, the driving amplifier DA1 36 amplifies the output power of the voltage controlled crystal oscillator VCXO 34, and typically, the output of the VCXO 34 was OdBm to more than 17 dBm after passing through the driving amplifier DA1 36. Will increase. The output of the driving amplifier DA1 36 passes through the sampling phase detector 20 so that a frequency signal such as the voltage controlled dielectric resonator oscillator 10 is discharged. In this case, as a preferred embodiment of the present invention, it is preferable that the output frequency of the voltage controlled dielectric resonator oscillator 10 is 6.95 GHz. 8, the output generation waveform of the 6.95 GHz band is shown.

On the other hand, another coupled signal of the OCXO 31 enters the input of the phase detector PD2 82, and the output of the voltage controlled oscillator VCO (Voltage Controlled Oscillator) 86 is subjected to a 1 / N divider to pass the phase detector PD2. Enter another input of (82). The phase detector PD2 82 is constituted by a mixer that mixes a signal fed back from the VCO 86 by 1 / N and a signal of the OCXO 31. In an embodiment of the present invention, it is preferable that a phase locked loop is programmed so that N can be varied such that the output frequency of the VCO 86 is between 600 MHz and 1000 MHz (Δf = 50 MHz). Such a configuration is a general phase locked loop (PLL) configuration and a detailed description thereof will be omitted.

Next, the output of the phase locked dielectric resonator oscillator 100 (ie, corresponds to the output of the voltage controlled dielectric resonator oscillator 10 in FIG. 3, see FIG. 8) and the output of the voltage controlled oscillator VCO 86 (FIG. 9) passes through the mixer 70, the output frequency of the phase locked dielectric resonator oscillator 100 (i.e., the voltage controlled dielectric resonator oscillator 10 in FIG. 3) and the output of the voltage controlled oscillator 86 A frequency corresponding to the sum and difference of frequencies is generated. In this case, a band pass filter 80 that passes a portion of the sum of frequencies is provided to remove an image frequency.

Next, passing through the frequency doubler 90 multiplies the frequency of the sum, and amplifies the output power through the driving amplifier DA2 96 again. According to a preferred embodiment of the present invention, the frequency output here is preferably 15.1 to 15.9 GHz. Referring to FIG. 10, it can be seen that the output waveform of the frequency synthesizer 900 using the phase locked dielectric resonator oscillator has a 15.2 GHz band.

As described above, although the present invention has been described by way of limited embodiments and drawings, the present invention is not limited thereto and is described by the person of ordinary skill in the art to which the present invention pertains. Various modifications and variations are possible without departing from the scope of the appended claims.

According to the phase locked dielectric resonator oscillator and the frequency synthesizer using the same according to the present invention, in the conventional parallel feedback voltage controlled dielectric resonator oscillator, instead of interposing a 50 Ω resistor between the 50 Ω strip line and the ground, respectively, one of the 50 Ω strip lines and the ground is provided. By interposing only C ₅ , the sweep range can be remarkably widened to 13.20 MHz as shown in FIG. 6.

In addition, by arranging the varactor diode 17 on the lower surface of the substrate, the noise of the voltage source existing on the upper surface of the substrate can be significantly reduced, so that the phase noise characteristic can also be significantly reduced to -102.98@10KHz as shown in FIG.

In other words, it is possible to provide a 15 GHz phase locked dielectric resonator oscillator and a frequency synthesizer using the same to increase the frequency stability while widening the sweep range.

Claims (10)

Temperature controlled crystal oscillator that outputs a signal with a fundamental frequency, A voltage controlled dielectric resonator oscillator having a dielectric resonator and outputting a frequency by dielectric resonance, The output of the temperature controlled crystal oscillator and the output of the voltage controlled dielectric resonator oscillator are input, and the harmonics of the temperature controlled crystal oscillator having a minimum difference between the output frequency of the voltage controlled dielectric resonance oscillator and the difference among the harmonics of the temperature controlled crystal oscillator. A sampling phase detector for outputting a difference between a frequency of and a frequency of the voltage controlled dielectric resonator oscillator, A first loop filter for filtering and outputting the output voltage of the sampling phase detector to be zero (0); A second phase locked loop programmed to select a channel in a predetermined frequency unit within a predetermined frequency range from an oven controlled crystal oscillator for generating a fundamental frequency that generates a fundamental frequency of the temperature controlled crystal oscillator; A mixer for outputting a sum and a difference of the frequencies for mixing the output of the second phase locked loop and the output of the voltage controlled dielectric resonator oscillator, A band pass filter for removing an image frequency by passing only a sum frequency of an output of the mixer; And a frequency multiplier for multiplying the output frequency of the band pass filter by a double frequency. The method of claim 1, The temperature controlled crystal oscillator, Oven controlled crystal oscillator, generating a fundamental frequency 1 / N divider dividing the output frequency of the voltage controlled crystal oscillator by 1 / N, A first phase detector which receives and mixes the output of the oven controlled crystal oscillator and the output of the 1 / N divider, A second loop filter for filtering the output of the first phase detector, A 15 GHz band phase locked dielectric resonator oscillator including a voltage controlled crystal oscillator for receiving an output of the second loop filter as an input and outputting a voltage controlled crystal oscillation signal to the 1 / N divider and the sampling phase detector, respectively. Frequency synthesizer. The method of claim 2, The temperature controlled crystal oscillator, A first driving amplifier interposed between the voltage controlled crystal oscillator and the sampling phase detector to amplify the power of the output signal of the voltage controlled crystal oscillator; And a second driving amplifier for amplifying the power of the output signal of the frequency multiplier at a rear end of the frequency multiplier. The method of claim 3, wherein The voltage controlled dielectric resonator oscillator, An input terminal receiving the output of the first loop filter as an input; A CPW line connected to the input terminal and formed on a bottom surface of the substrate on which the frequency synthesizer is formed; A rectangular GND formed on a lower surface of the substrate and having a rectangular hole therein; A varactor diode interposed between the CPW line and the GND and formed on a bottom surface of the substrate, A circular dielectric resonator formed on an upper surface of the substrate and opposite to the substrate where the CPW line is formed; A first microscript line and a second microscript line which are formed in parallel with each other between the dielectric resonator and the GND, and formed on an upper surface of the substrate; A capacitor interposed between the second microstrip line and the GND and formed on an upper surface of the substrate; A frequency synthesizer coupled to the first microstrip line and the second microstrip line to drive the voltage controlled dielectric resonator oscillator, the 15 GHz band phase locked dielectric resonator oscillator including a drive circuit formed on the substrate. . The method of claim 4, wherein The first and second microscript lines are λ / 2 length of 50 Ω, And a CPW line having a λ / 2 length of 25 Ω. The method of claim 5, wherein The programmed second phase locked loop is 1 / N divider dividing the output frequency of the voltage controlled oscillator by 1 / N, A second phase detector which receives and mixes the output of the oven controlled crystal oscillator and the output of the 1 / N divider, A third loop filter for filtering the output of the second phase detector, and And a voltage controlled crystal oscillator for receiving an output of the third loop filter as an input and outputting a voltage controlled oscillation signal to the 1 / N divider and the mixer, respectively. The method of claim 6, N of the 1 / N divider in the programmed second phase locked loop is variable, A frequency synthesizer using a phase locked dielectric resonator oscillator in a 15 GHz band, wherein N of the 1 / N divider in the temperature controlled crystal oscillator is fixed. The method of claim 7, wherein The predetermined frequency range in the second phase locked loop is 600 to 1000 MHz, The predetermined frequency unit in the second phase locked loop is any one of 10, 20, 30, 40, and 50 MHz. The method of claim 8, The fundamental frequency of the temperature controlled crystal oscillator is 50 MHz, the reference frequency of the oven controlled crystal oscillator is 10 MHz, And an output frequency of the voltage controlled dielectric resonator oscillator is 6.95 GHz. The method of claim 9, The material of the substrate was TLX-9 (Teflon), the dielectric constant of the material of the substrate was 2.5, the thickness t of the substrate was 0.508 mm, and the width of the first and second microstrip lines was W. In this case, the frequency synthesizer using a phase locked dielectric resonator oscillator of the 15GHz band, characterized in that the width of the CPW line is 2.5W.

Images