KR100859639B1 - Driving apparatus and method of plasma display panel - Google Patents

Abstract

The present invention relates to a driving apparatus and method for a plasma display panel which can stably discharge and compensate for a decrease in luminance.

A method of driving a plasma display panel according to the present invention includes: a first step of checking an operation time of a plasma display panel to determine whether to adjust the number of subfields allocated to the one frame; When the number of the subfields is adjusted, at least one of a width, slope, and number of at least one of a reset pulse supplied in a reset period of each subfield, a scan pulse supplied in the address period, and a sustain supplied in the sustain period. It characterized in that it comprises a second step of adjusting any one.

Description

Driving apparatus and method of plasma display panel {DRIVING APPARATUS AND METHOD OF PLASMA DISPLAY PANEL}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display device and a driving method thereof. More particularly, the present invention relates to a driving device and a method of a plasma display panel capable of generating stable discharge and compensating for luminance reduction.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display device and a driving method thereof. More particularly, the present invention relates to a driving device and a method of a plasma display panel capable of generating stable discharge and compensating for luminance reduction.

The plasma display device is a display device using a plasma display panel (PDP) that displays characters or images using plasma generated by gas discharge.

The plasma display panel is driven by dividing one frame into a plurality of subfields having respective weights. During the reset period of each subfield, the state of the discharge cell is initialized, and during the address period of each subfield, light emitting cells and non-light emitting cells are selected among the discharge cells, and sustain discharge is performed on the light emitting cells in order to actually display an image during the sustain period. This is done. The gray level is expressed by a combination of weights of subfields in which the light emitting cells emit light.

When the plasma display panel is driven for a long time, the protective film, the phosphor, and the like inside the plasma display panel deteriorate. As a result, the plasma display panel that has been driven for a long time compared to the plasma display panel that has been driven for a short time has a problem in that discharge characteristics are lowered, in particular, luminance is reduced.

Accordingly, an object of the present invention is to provide a plasma display device and a driving method thereof in which discharge is stable.

Another object of the present invention is to provide a plasma display device and a driving method thereof capable of compensating for luminance reduction.

In order to achieve the above technical problem, a method of driving a plasma display panel according to the present invention includes: a first step of determining whether to adjust the number of subfields allocated to the one frame by checking an operation time of the plasma display panel; When the number of the subfields is adjusted, at least one of a width, slope, and number of at least one of a reset pulse supplied in a reset period of each subfield, a scan pulse supplied in the address period, and a sustain supplied in the sustain period. It characterized in that it comprises a second step of adjusting any one.

The first step may include checking an operation time of the plasma display panel; And when the operation time exceeds a threshold, reducing the number of subfields to be smaller than when the operation time is less than or equal to a threshold.

The first embodiment of the second step may be a step of adjusting the number or slope of reset pulses supplied in the reset period of each subfield when the number of the subfields is reduced.

According to a second embodiment of the second step, when the number of the subfields is reduced, the width of the scan pulse supplied to the address period of each subfield may be adjusted.

According to a third embodiment of the second step, when the number of the subfields is reduced, the width, the slope, or the number of the sustain pulses supplied in the sustain period of each subfield is adjusted.

In order to achieve the above technical problem, a driving apparatus of a plasma display panel according to the present invention comprises: a control unit for dividing a frame into a plurality of subfields each including a reset period, an address period, and a sustain period; A driving unit supplying a reset pulse to the plasma display panel in the reset period, a scan pulse to the plasma display panel in the address period, and a sustain pulse to the plasma display panel in the sustain period; The controller may determine whether to adjust the number of subfields allocated to the one frame by checking an operation time of the plasma display panel, and when the number of subfields is adjusted, at least one of the reset pulse, the scan pulse, and the sustain pulse. At least one of the width, the inclination and the number may be adjusted.

The control unit may include a time check unit determining whether an operation time of the plasma display panel exceeds a threshold; When the operation time exceeds the threshold value, it characterized in that it comprises a sub-field generating unit for reducing the number of the sub-fields smaller than when the operation time is less than the threshold.

The first embodiment of the controller may further include a reset pulse adjusting unit configured to adjust the number or the slope of the reset pulses allocated to each subfield by the number of the reduced subfields.

The second embodiment of the control unit may further include a scan pulse adjusting unit which adjusts a width of the scan pulse allocated to each subfield by the number of the reduced subfields.

The third embodiment of the controller may further include a sustain number generator that adjusts the number of sustain pulses allocated to each subfield by the number of the reduced subfields.

A fourth embodiment of the control unit includes: a sustain number generator for allocating the number of the sustain pulses to each subfield; The apparatus may further include a sustain pulse controller configured to adjust a width or a slope of the sustain pulses allocated to each subfield by the number of the reduced subfields.

In the plasma display device according to the present invention, when the panel is driven for a long time, the discharge is stabilized by adjusting at least one of a reset pulse, a scan pulse, and a sustain pulse using a time obtained by reducing the number of subfields allocated to one frame. And luminance improvement.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to FIGS. 1 to 11.

1 is a block diagram showing a plasma display device according to the present invention.

Referring to FIG. 1, a plasma display device according to an exemplary embodiment of the present invention may include a plasma display panel 110 in which an image is implemented, and an address driver for supplying data to address electrodes A1 to Am of the plasma display panel 110. 104, the scan driver 106 for driving the scan electrodes Y1 to Yn, the sustain driver 108 for driving the sustain electrodes X1 to Xn, and the respective driving units 104, 106 and 108 for controlling the scan electrodes 106 and 108. The control unit 102 is provided.

The plasma display panel 110 displays an image using a plurality of discharge cells C arranged in a matrix. The discharge cell C is paired with a plurality of address electrodes A1 to Am extending in the column direction, a plurality of scan electrodes Y1 to Yn extending in the row direction, and scan electrodes Y1 to Yn. It consists of a plurality of sustain electrodes (X1 to Xn) extending in the row direction while forming a. Here, the address electrodes A1 to Am are formed to intersect the scan electrode lines Y1 to Yn and the sustain electrodes X1 to Xn.

The address driver 104 supplies data signals for selecting discharge cells to be displayed to each address electrode A in response to the address control signal from the controller 102.

The scan driver 106 applies driving voltages to the scan electrodes Y1 to Yn in response to a scan control signal from the controller 102.

The sustain driver 108 applies a driving voltage to the sustain electrodes X in response to the sustain control signal from the controller 102.

The controller 102 divides and drives one frame into a plurality of subfields, and each subfield is composed of a reset period, an address period, and a sustain period when expressed as a temporal change in operation. The control unit 102 receives the vertical / horizontal synchronization signal and generates an address control signal, a scan control signal, and a sustain control signal required for each of the driving units 104, 106, and 108. The generated control signal is supplied to the corresponding driving units 104, 106, and 108 so that the control unit 102 controls each of the driving units 104, 106, and 108.

The control unit 102 will be described in detail with reference to FIG. 2.

The control unit 102 shown in FIG. 2 includes a gamma correction unit 112, an error diffusion unit 114, a subfield generation unit 116, a memory control unit 118, a time check unit 120, and a reset pulse control unit ( 122, a scan control unit 124.

The gamma correction unit 112 processes the image data R, G, and B input with the reverse nonlinear input and output characteristics to have the linear input and output characteristics.

The error diffusion unit 114 shifts the position of the most significant bit, which is the boundary bit of the 12-bit format image data R, G, and B corrected by the gamma correction unit 112, and performs the 8-bit format. Image data R, G, and B are generated.

The time checker 120 accumulates and counts operating time of the plasma display panel 110. In this case, the operation time detects a time point at which a power-on signal is supplied to a power supply unit (not shown), or a time point at which a sustain voltage is supplied to the driving device of the plasma display panel 110 or the plasma display panel 110. The operation time of the plasma display panel 110 may be measured by various methods.

In addition, when the accumulated operation time from the initial operation of the plasma display panel 110 to the present exceeds the threshold time, the time checker 120 may transmit the degradation detection signal DSC to the subfield generator 116 and the present invention. The reset pulse adjusting unit 122 is supplied. In this case, the threshold time is a time at which the protective film or the phosphor located in the plasma display panel 110 deteriorates and the discharge characteristic starts to decrease, and can be obtained through experiments in advance.

The subfield generator 116 generates a number of subfields corresponding to the gray level of the image data output from the error diffusion unit 114, and generates subfield data corresponding to the number of subfields. Also, the subfield generator 116 reduces the number of subfields corresponding to the gray level of the image data output from the error diffusion unit 114 in response to the degradation detection signal DSC, and the subfields corresponding to the reduced number of subfields. Create field data. For example, the subfield generator 116 generates 11 subfields SF1 to SF11 before the degradation detection signal DSC is input as shown in FIG. 3, and is driven for a long time to deteriorate the detection signal DSC. ), 10 subfields SF1 to SF10 are generated. At this time, the number of subfields should be reduced within the range where the gradation expression does not differ.

The memory controller 118 rearranges the subfield data from the subfield generator 116 into address data for driving the plasma display panel 110 and supplies the subfield data to the address driver 104. In detail, the memory controller 118 stores address data in a frame memory (not shown) for each of the plurality of subfields included in one frame, and reads address data for all pixels from the frame memory for each subfield. It supplies to the drive part 104.

The reset pulse controller 122 adjusts reset pulses allocated to each subfield by the number of subfields reduced in response to the degradation detection signal DCS. This will be described in detail with reference to FIGS. 4A and 4B.

As shown in FIG. 4A, the reset pulse controller 122 increases the number of reset pulses supplied to the reset period PR of each subfield by using a time corresponding to the reduced number of subfields.

That is, in the panel 110 driven for a short time, the reset period PR of each subfield is divided into one rising section and one falling section. On the other hand, in the panel 110 driven for a long time, the reset period PR of each subfield is divided into two rising periods and two falling periods. Here, in the rising period of the reset period PR, the voltage at the scan electrode Y is equal to the Vs voltage (or referred to as the first voltage) while the sustain electrode X is maintained at the reference voltage (0 V in FIG. 4A). A reset pulse gradually increasing to the Vset voltage (or referred to as a second voltage) is supplied, and a Ve voltage (or referred to as a fourth voltage) is applied to the sustain electrode X in a falling section of the reset period PR. In one state, the scan electrode Y is supplied with a reset pulse that gradually decreases from the voltage Vs to the voltage Vnf (or referred to as a third voltage).

As such, the number of reset pulses supplied to each reset period PR of the panel driven for a long time is larger than the reset pulses supplied to each reset period PR of the panel driven for a short time. Accordingly, when a large number of reset pulses are supplied to the panel 110 driven for a long time, that is, the panel 110 having an unstable internal characteristic than the panel driven for a short time, reset discharge occurs at least twice, thereby addressing the discharge cell. Sufficient wall charge is generated to allow this to be performed smoothly.

As shown in FIG. 4B, the reset pulse controller 122 adjusts the rising slope rising from the Vs voltage to the Vset voltage and / or the falling slope decreasing from the Vs voltage to the Vnf voltage. That is, the rising slope and the falling slope of the reset pulse supplied to the reset period PR of the panel driven for a long time are smaller than those of the panel driven for a short time. A panel driven for a long time, that is, a panel having an unstable internal characteristic than a panel driven for a short time, is supplied with a reset pulse having a relatively small slope. As a result, the probability of occurrence of reset discharge is relatively high, and the driving margin of reset discharge is improved.

The scan controller 124 generates a control signal corresponding to the reset pulse number and / or the slope adjusted from the reset pulse controller 122 and supplies the generated control signal to the scan driver 106.

5 is a block diagram illustrating a plasma display device according to a second embodiment of the present invention.

The plasma display shown in FIG. 5 has the same components except that the scan pulse controller is provided instead of the reset pulse controller. Accordingly, detailed description of the same components will be omitted.

The scan pulse controller 134 adjusts the width of the scan pulse allocated to each subfield by the number of subfields reduced in response to the degradation detection signal DSC. This will be described in detail with reference to FIG. 6.

As illustrated in FIG. 6, the scan pulse controller 134 increases the width of the scan pulse supplied to the address period PA of each subfield by using a time corresponding to the reduced number of subfields. Here, in the address period PA, a scan pulse having a VscL voltage and an address pulse having a Va voltage are applied to the Y and A electrodes while maintaining the voltage of the X electrode at a Ve voltage in order to select a discharge cell to be turned on. . The non-selected Y electrode biases the VscH voltage higher than the VscL voltage, and applies a reference voltage to the A electrode of the cell that is not turned on. Then, address discharge occurs in the discharge cells formed by the A electrode to which the Va voltage is applied and the Y electrode to which the VscL voltage is applied.

That is, the width W2 of the scan pulse supplied to the panel driven for a long time is wider than the width W1 of the supplied scan pulse supplied to the panel driven for a short time. As described above, when a scan pulse having an increased width is supplied to a panel driven for a long time, that is, a panel having an unstable internal characteristic than a panel driven for a short time, the probability of occurrence of the address discharge becomes relatively high and the address discharge occurs stably.

The scan controller 124 generates a control signal corresponding to the width of the scan pulse adjusted from the scan pulse controller 134 and supplies it to the scan driver 106.

7 is a block diagram illustrating a plasma display device according to a third embodiment of the present invention.

In contrast to the plasma display shown in FIG. 2, the plasma display shown in FIG. 7 has an automatic power control (hereinafter referred to as an “APC unit”) 126 and a sustain number generator instead of the reset pulse controller. Except for having a 128 and the sustain pulse control unit 130 has the same components. Accordingly, detailed description of the same components will be omitted.

The APC unit 126 detects a load ratio using the image data output from the error diffusion unit 114 and calculates an APC level according to the detected load ratio.

The sustain number generator 128 allocates the number of sustain pulses corresponding to the APC level calculated from the APC unit 126.

The sustain controller 130 adjusts the width of at least one of the rising period, the sustaining period, and the falling period of the sustain pulse allocated to each subfield by the number of subfields reduced in response to the degradation detection signal DSC. This will be described in detail with reference to FIG. 8.

As shown in FIG. 8, the sustain pulse controller 130 uses the time corresponding to the reduced number of subfields to change the voltage of Vs supplied alternately to the Y electrode and the X electrode in the sustain period PS of each subfield. Increase the width of the sustain pulse. That is, the width of the sustain pulse supplied to the panel 110 driven for a long time is wider than the width of the sustain pulse supplied to the panel 110 driven for a short time. As such, when a sustain pulse having a relatively increased width is supplied to the panel 110 having an unstable internal characteristic driven for a long time, the probability of the sustain discharge occurring is relatively high, and the sustain discharge occurs stably.

Each of the scan controller 124 and the sustain controller 132 supplies a control signal corresponding to the width of the sustain pulse output from the sustain pulse controller 130 to the corresponding drivers 106 and 108.

9 is a block diagram illustrating a plasma display device according to a fourth embodiment of the present invention.

The plasma display device shown in FIG. 9 has the same components as the plasma display device shown in FIG. 2 except that the APC unit 126 and the sustain number generation unit 128 are provided in place of the reset pulse control unit. Equipped. Accordingly, detailed description of the same components will be omitted.

The APC unit 126 detects a load ratio using the image data output from the error diffusion unit 114 and calculates an APC level according to the detected load ratio.

The sustain number generator 128 allocates the number of sustain pulses corresponding to the APC level calculated by the APC unit 126 and adjusts the number of the assigned sustain pulses in response to the degradation detection signal DSC. This will be described in detail with reference to FIGS. 10 and 11.

In the case of the panel 110 driven for a long time as shown in FIG. 10, the number of subfields allocated to one frame is reduced so that the total reset period (address period, idle period) of one frame is larger than that of the panel 110 driven for a short time. short. The time obtained by reducing the total reset period, the total address period, and the total idle period is allocated to the sustain period. Thus, for a panel driven for a long time, the total sustain period of one frame is longer than that of a panel driven for a short time.

In the case of the panel 110 driven for a long time, the number of sustain pulses supplied in the relatively long sustain period PS is increased as shown in FIG. That is, the number of sustain pulses supplied to the panel 110 driven for a long time is greater than the number of sustain pulses supplied to the panel 110 driven for a short time. As described above, the luminance is improved by supplying a relatively large number of sustain pulses in proportion to the time generated due to the decrease in the number of subfields to the panel 110 which has been driven for a long time and has unstable internal characteristics.

Each of the scan controller 124 and the sustain controller 132 generates a control signal corresponding to the number of sustain pulses adjusted from the sustain number generator 128 and supplies the control signal to the corresponding drivers 106 and 108.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

1 is a block diagram illustrating a plasma display device according to a first embodiment of the present invention.

FIG. 2 is a block diagram illustrating in detail the control unit illustrated in FIG. 1.

FIG. 3 is a diagram illustrating a subfield of each frame that is reassigned when the plasma display panel illustrated in FIG. 1 is driven for a long time.

4A and 4B are waveform diagrams showing reset pulses supplied in the reset period of each subfield, as shown in FIG.

5 is a block diagram illustrating in detail a control unit of a plasma display device according to a second embodiment of the present invention.

6 is a waveform diagram illustrating scan pulses supplied to an address period of each subfield of a plasma display device according to a second exemplary embodiment of the present invention.

7 is a block diagram illustrating in detail a control unit of a plasma display device according to a third exemplary embodiment of the present invention.

FIG. 8 is a waveform diagram illustrating sustain pulses supplied in a sustain period of each subfield of the plasma display device according to the third exemplary embodiment.

9 is a block diagram specifically illustrating a control unit of a plasma display device according to a fourth embodiment of the present invention.

FIG. 10 is a diagram illustrating a total reset period, a total address period, a total sustain period, and a total rest period allocated to each frame of the plasma display device according to the fourth embodiment of the present invention.

11 is a waveform diagram illustrating sustain pulses supplied in a sustain period of each subfield of the plasma display device according to the fourth exemplary embodiment of the present invention.

<Brief description of symbols for the main parts of the drawings>

102: control unit 104: address drive unit

106: scan driver 108: sustain driver

110: plasma display panel

Claims (6)

One frame is driven by dividing a frame into a plurality of subfields each including a reset period, an address period, and a sustain period each having a rising period and a falling period, and expressing a gray level by combining luminance weights of the plurality of subfields. In the driving method of, Checking an operation time of the plasma display panel, and reducing the number of the plurality of subfields allocated to the one frame when the operation time exceeds a threshold value than that when the operation time is less than or equal to the threshold value; If the number of the plurality of subfields is reduced, a second step of increasing the number of reset pulses supplied in a reset period of each of the plurality of subfields, The reset pulse may include increasing the voltage of the scan electrode from the first voltage to the second voltage during the rising period of the reset period and decreasing the voltage of the scan electrode from the first voltage to the third voltage during the falling period of the reset period. Is the pulse The reference voltage is applied to the sustain electrode during the rising period of the reset period, and the fourth voltage is applied to the sustain electrode during the falling period of the reset period. delete The method of claim 1, In the second step, two reset pulses are supplied in the reset period of each of the plurality of subfields. A plasma display panel; A control unit for dividing a frame into a plurality of subfields each including a reset period having an rising period and a falling period, an address period, and a sustain period; A driving unit supplying a reset pulse to the plasma display panel in the reset period, a scan pulse to the plasma display panel in the address period, and a sustain pulse to the plasma display panel in the sustain period, The control unit A time checker to determine whether an operation time of the plasma display panel exceeds a threshold; A subfield generating unit for reducing the number of the plurality of subfields when the operation time exceeds the threshold value than that when the operation time is less than the threshold value; When reducing the number of the plurality of sub-fields, including a reset pulse control unit for increasing the number of reset pulses supplied in the reset period of each of the plurality of sub-fields, The reset pulse may include increasing the voltage of the scan electrode from the first voltage to the second voltage during the rising period of the reset period and decreasing the voltage of the scan electrode from the first voltage to the third voltage during the falling period of the reset period. Is the pulse The reference voltage is applied to the sustain electrode during the rising period of the reset period, and the fourth voltage is applied to the sustain electrode during the falling period of the reset period. delete The method of claim 4, wherein And the reset pulse adjusting unit supplies two reset pulses in the reset period of each of the plurality of subfields.

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