KR100857721B1 - Rfid reader and method for driving the same - Google Patents

Abstract

An RFID reader and an operating method thereof are provided to receive an I signal and a Q signal all to reduce the number of receiving circuits necessary for processing signals, thereby reducing the total volume of the RFID reader and reducing power consumption. An RFID(Radio Frequency Identification) reader includes an RF(Radio Frequency) receiver(100), a first mixer(110), a second mixer(120), a first baseband processor(130), a second baseband processor(140), a selection signal generator(150), a signal selector(160), a data processor(170), and a controller(180). The RFID receiver receives an RF signal transmitted from an RFID tag to divide the received RFID signal into an I(In-phase) signal and a Q(Quadrature) signal. The selection signal generator compares the size of the I signal and the Q signal inputted from the RF receiver and generates a selection signal for a signal with greater strength in the I signal and the Q signal. The signal selector selects and outputs the signal with greater strength in the I signal and the Q signal according to the selection signal.

Description

RDF Reader and its Operation Method {RFID Reader and Method for driving the same}

1 is a block diagram showing the configuration of a conventional RFID reader.

Figure 2 is a block diagram showing an embodiment of the RFID reader of the present invention.

3 is a block diagram showing the configuration of a selection signal generator according to the present invention;

Figure 4 is a flow chart showing an embodiment of the operation method of the RFID reader of the present invention.

Figure 5 is a block diagram showing another embodiment of the RFID reader of the present invention.

6 is a block diagram showing a configuration of a first preamble detection unit of the present invention.

7 is a flowchart illustrating another embodiment of a method of operating an RFID reader of the present invention.

Explanation of symbols on the main parts of the drawings

100, 200: RF receiver 110, 211: first mixer

120, 214: second mixer 130, 220: first base band processing unit

140, 230: second base band processing unit 150, 240: selection signal generation unit

151: subtractor 154: delay circuit

157: cumulative calculator 160, 270: signal selector

170, 280: data processing unit 180, 290: control unit

250: First preamble detector 251: Memory

254: shift register 257: correlator

260: second preamble detection unit

The present invention relates to an RFID reader and its operation method.

RFID (Radio Frequency Identification) is a kind of automatic identification and data capture (AIDC) technology that reads information by recognizing a thin flat tag attached to an object in a non-contact manner through a wireless signal. to be.

Such RFID has recently attracted attention as a key technology that enables silent commerce, a key concept of ubiquitous computing.

RFID stores a variety of information such as production, distribution, price, etc. in a tag chip and reads it through a wireless reader, which can store a large amount of information compared to a bar code. In addition, it is very long, 1.5 ~ 27m, there is an advantage that can be transmitted through the obstacles except metal.

Due to these many advantages, RFID has been spotlighted as a next-generation technology following the bar code that is widely used, and its application field is also being expanded to various fields such as logistics, distribution, security, and access control.

RFID can be classified into various types according to power supply, frequency band, and communication connection method. For example, it can be divided into active type and passive type according to power supply, and can be divided into low frequency (30kHz ~ 500kHz) and high frequency (850MHz ~ 950MHz and 2.4GHz ~ 2.5GHz) according to frequency band. Can be.

The RFID system is composed of a tag and a reader. When an attached object is placed in the reader's recognition area, the reader modulates an RF signal having a specific carrier frequency to ask a tag ( Interrogation) and the tag responds to the reader's questions.

That is, the reader modulates a continuous electromagnetic wave having a specific frequency to transmit a question signal to the tag, the tag receives the electromagnetic wave transmitted from the reader, and then transfers the information stored in the internal memory of the tag chip to the reader. Back-Scattering Modulation is sent back to the reader.

Here, the reverse scattering modulation is a method of transmitting the tag information by modulating the magnitude or phase of the scattered electromagnetic waves when the tag receives the electromagnetic waves transmitted from the reader and scatters them to transmit them back to the reader.

1 is a block diagram showing the configuration of a conventional RFID reader.

As shown in the drawing, the conventional RFID reader includes an RF receiver 10, a first mixer 20, a second mixer 30, a first baseband processor 40, a second baseband processor 50, and a first receiver. The first data processor 60, the second data processor 70, and the controller 80 are included.

The RF receiver 10 includes a band pass filter (BPF) and a low noise amplifier (LNA).

The band pass filter (BPF) filters the RF signal received through the antenna to the radio frequency band of the RFID system, and the low noise amplifier (LNA) amplifies the received RF signal while suppressing low noise components.

The first mixer 20 collects the RF signal amplified by the RF receiver 10 and transmits a cosine signal having a predetermined phase to the first baseband processor 40.

The second mixer 30 collects the RF signal amplified by the RF receiver 10 and transmits a sine signal having a predetermined phase to the second baseband processor 50.

The first baseband processor 40 outputs an I (In-Phase) signal by filtering, amplifying, and AD-converting the cosine signal transmitted from the first mixer 20.

The first baseband processor 40 includes a low pass filter (LPF), an amplifier, an analog to digital converter (ADC), and the like.

The low pass filter LPF extracts only a frequency signal of less than a predetermined band from the entire frequency band of the cosine signal transmitted from the first mixer 20 to increase the efficiency of signal processing.

The amplifier amplifies the signal filtered by the low pass filter (LPF), and the ADC converts the amplified signal into a digital signal (I signal) and outputs it to the first data processor 60.

The second baseband processor 50 filters, amplifies, and AD to convert the sine signal transmitted from the second mixer 30 to output a Q (Quadrature) signal.

Like the first baseband processor 40, the second baseband processor 50 includes a low pass filter (LPF), an amplifier, an analog to digital converter (ADC), and the like. .

The low pass filter LPF extracts only a frequency signal of a predetermined band or less from all frequency bands of the sine signal transmitted from the second mixer 30 to increase the efficiency of signal processing.

The amplifier amplifies the signal filtered by the low pass filter (LPF), and the ADC converts the amplified signal into a digital signal (Q signal) and outputs it to the second data processor 70.

The first data processor 60 extracts the actual digital data by converting the data format from the I signal transmitted from the first baseband processor 40 and checks the CRC (Cyclic Redundancy Check) data to see if there is an error. Check whether or not.

That is, since the I signal transmitted from the first baseband processor 40 is over sampled data, digital data is extracted by obtaining an actual digital value from the over sampled data.

After checking CRC (Cyclic Redundancy Check) data included in the I signal to check whether there is an error in the data, the result is transmitted to the controller 80.

After the second data processor 70 extracts the actual digital data from the Q signal transmitted from the second baseband processor 50 and checks the cyclic redundancy check (CRC) data to determine whether there is an error in the data, The result is transmitted to the controller 80.

The controller 80 selects and uses any one of an I signal and a Q signal output from the first data processor 60 and the second data processor 70.

At this time, the controller 80 uses a signal having no error as a result of checking the cyclic redundancy check (CRC) data of the first data processor 60 and the second data processor 70 among the I signal or the Q signal.

If, as a result of checking the Cyclic Redundancy Check (CRC) data, and no error occurs in both the I and Q signals, the controller 80 may randomly select one of the I and Q signals. do.

In the case of an RFID system, an ASC (Amplitude Shift Keying) modulation method or a PSK (Phase Shift Keying) modulation method is used to communicate between an RFID reader and an RFID tag, wherein the I and Q signals have the same information.

In the conventional RFID reader, the input RF signal is separated into an I signal and a Q signal having the same information as described above, and the separated I and Q signals are respectively processed and output to the control unit 80. Two data processing units are required for data processing of the signal and the Q signal, respectively.

That is, in the conventional RFID reader, the first data processor 60 and the second data processor 70 having the same structure are required to process the I and Q signals, respectively. In this case, the total volume of the RFID reader There is a problem that it becomes large and power efficiency is low.

Accordingly, an object of the present invention is to compare the magnitude of the I signal and the Q signal separated from the RF receiver, and then select a signal having a large signal and output the signal to the data processor, thereby reducing the overall volume and reducing power consumption. An RFID reader and its operation method are provided.

Another object of the present invention is to select one of the I signal and Q signal according to the selection signal when the preamble is detected from the input I signal and Q signal, thereby preventing malfunction due to noise, etc. It is to provide a reader and its operation method.

A preferred embodiment of the RFID reader of the present invention includes a receiver for receiving an RF signal transmitted from an RFID tag and separating the I (In-Phase) signal and the Q (Quadrature) signal, and the I and Q signals inputted from the receiver. After comparing the magnitudes of the signals, the selection signal generator generates a select signal according to the comparison result, and a signal having a larger magnitude among the I and Q signals input from the receiver according to the selection signal. It characterized in that it comprises a signal selection unit for selecting and outputting.

And a first preamble detector for detecting a preamble from the I signal input from the receiver and generating a first preamble detection signal to the signal selector, and detecting the preamble from the Q signal input from the receiver. And a second preamble detector configured to generate a second preamble detection signal, wherein the signal selector is input from the receiver according to the selection signal at a time point when any one of the first preamble detection signal and the second preamble detection signal is generated. The signal generated from the preamble detection signal is selected from the I signal and the Q signal to be output.

Here, the selection signal generator may include a subtractor for outputting a difference signal corresponding to a difference between the magnitudes of the I and Q signals input from the receiver, and a delay circuit for delaying the difference signal output from the subtractor for a predetermined time and outputting the difference signal. And a sum of the difference signal output from the subtractor and the difference signal output delayed by the delay circuit for a predetermined time to obtain a cumulative average of the difference between the magnitudes of the I signal and the Q signal, and then select a selection signal with the signal selection unit. And an accumulator that outputs.

According to a preferred embodiment of the present invention, a receiver receives an RF signal transmitted from an RFID tag, and separates the signal into an I (In-Phase) signal and a Q (Quadrature) signal. After comparing the magnitudes of the I signal and the Q signal input from the receiving unit, generating a select signal according to the comparison result, the signal selector in accordance with the selection signal, the I signal input from the receiving unit Checking whether a selection control signal for selecting one of the Q signals is generated from the control unit; and when the selection control signal is generated as a result of the checking, the signal selection unit is input from the receiving unit according to the selection signal. And selecting and outputting any one of an I signal and a Q signal.

According to another preferred embodiment of the method of operating the RFID reader of the present invention, the receiving unit receives an RF signal transmitted from the RFID tag, and separates the I (In-Phase) signal and the Q (Quadrature) signal, and the selection signal generation unit After comparing the magnitudes of the I signal and the Q signal input from the receiver, generating a select signal according to the comparison result, and the first preamble detector and the second preamble detector are respectively input from the receiver After checking whether the preamble is detected in the I signal and the Q signal, when the preamble is detected, generating a first preamble detection signal and a second preamble detection signal, respectively, and a signal selector configured to generate the first preamble detector and the second preamble detector. Checking whether a preamble detection signal is generated from any one of the preamble detectors, and as a result of the checking, the first preamble detector and And when the preamble detection signal is generated from any one of the two preamble detection units, selecting and outputting any one of an I signal and a Q signal input from the receiver according to the selection signal. do.

The generating of the selection signal by the selection signal generator may include outputting a difference signal corresponding to a difference between the magnitudes of the I signal and the Q signal inputted from the receiver, and the delay circuit outputting the difference signal from the subtractor. Outputting the delayed difference signal after a predetermined time delay, and a cumulative calculator adds the difference signal outputted from the subtracter and the difference signal delayed and outputted by the delay circuit for a predetermined time, And after calculating the cumulative average of the differences, generating a selection signal.

Hereinafter, the RFID reader and its operation method of the present invention will be described in detail with reference to FIGS. 2 to 7. In describing the present invention, when it is determined that the detailed description of the known technology related to the present invention may unnecessarily obscure the subject matter of the present invention, the detailed description thereof will be omitted. In addition, terms to be described below are terms defined in consideration of functions in the present invention, which may vary according to the intention or custom of a user or an operator. Therefore, the definition should be made based on the contents throughout the specification.

2 is a block diagram showing an embodiment of the RFID reader of the present invention.

As shown in the drawing, the RFID reader of the present invention includes an RF receiver 100, a first mixer 110, a second mixer 120, a first baseband processor 130, a second baseband processor 140, The selection signal generator 150, the signal selector 160, the data processor 170, and the controller 180 are included.

The RF receiver 100 includes a band pass filter (BPF) and a low noise amplifier (LNA).

The band pass filter (BPF) filters the RF signal received through the antenna to the radio frequency band of the RFID system, and the low noise amplifier (LNA) amplifies the received RF signal while suppressing low noise components.

The first mixer 110 collects the RF signal amplified by the RF receiver 100 and transmits a cosine signal having a predetermined phase to the first baseband processor 130.

The second mixer 120 collects the RF signal amplified by the RF receiver 100 and transmits a sine signal having a predetermined phase to the second baseband processor 140.

The first baseband processor 130 filters, amplifies, and converts the cosine signal transmitted from the first mixer 110 to output an in-phase signal, which is a digital signal.

The second baseband processor 140 filters, amplifies, and AD to convert the sine signal transmitted from the second mixer 120 to output a Q (Quadrature) signal, which is a digital signal.

The first baseband processor 130 and the second baseband processor 140 include a low pass filter (LPF), an amplifier, an analog to digital converter (ADC), and the like.

The low pass filter LPF extracts only a frequency signal having a predetermined band or less from the entire frequency bands of the cosine signal or the sine signal transmitted from the first mixer 110 or the second mixer 120, and the amplifier is a low pass filter. Amplifying the signal filtered in the LPF, the ADC converts the amplified signal into a digital signal (I signal or Q signal) and outputs it.

The selection signal generator 150 compares the magnitudes of the I and Q signals output from the first baseband processor 130 and the second baseband processor 140, and then selects one of an I signal and a Q signal. A select signal is generated to select the signal of.

That is, the selection signal generator 150 compares the magnitudes of the input I signal and the Q signal for a predetermined time, and then allows the signal selector 160 to select a signal having a large signal size from the I signal and the Q signal. The select signal is output to the signal selector 160.

As described above, the I signal and the Q signal contain the same information, but the magnitude of the signal is affected by the phase offset, and the selection signal generator 150 uses the two signals for a predetermined time. After comparing the magnitudes of the signals, a selection signal for selecting a signal having a large signal size is output.

The signal selector 160 has a large signal size among the I and Q signals input according to the selection signal output from the selection signal generator 150 at the time when the controller 180 generates the selection control signal. The signal is selected and output to the data processor 170.

The data processor 170 extracts real digital data from the I or Q signal selected by the signal selector 160, performs an error detection process, and outputs the digital data to the controller 180.

Since the signal output from the signal selector 160 is a signal having a large magnitude among the I and Q signals, it is easier to process the digital data in the data processor 170.

As the data processor 170, a field programmable gate array (FPGA) circuit or a digital signal processing (DSP) circuit may be used.

The FPGA circuit refers to a gate array circuit (logical integrated circuit) that can be added to the programming, if necessary to implement the function of the RFID reader outside the production process of the chip, the gate array and the programmable logic devices (PLD) The property is implemented.

FPGA circuits have the advantages of being able to use multiple I / Os like a gate array, programmable at a time, and increasing the utility of the gate by 95%.

In addition, the DSP circuit performs algebraic operations on digital data obtained by A / D conversion of analog signals to perform signal processing such as filtering and spectral analysis.

The DSP circuit has the advantage of being able to quickly and mathematically process digital signals and upgrade the system by replacing only software.

The control unit 180 selects one of the input I signal and the Q signal according to the selection signal output from the selection signal generator 150 at a predetermined point in time. Outputs

As described above, according to the present invention, a signal having a large signal size is selected from the I signal and the Q signal through the selection signal generator 150 and the signal selector 160 and output to the data processor 170. The number of receiving circuits required to receive and signal both I and Q signals can be reduced, thereby reducing the total volume of the RFID reader and reducing power consumption.

3 is a block diagram showing the configuration of the selection signal generator of the present invention.

As shown therein, the selection signal generator of the present invention includes a subtractor 151, a delay circuit 154, and an accumulator 157.

The subtractor 151 outputs a difference signal having a magnitude corresponding to a difference between an I signal and a Q signal respectively input from the first base band processor (not shown) and the second base band processor (not shown). That is, the magnitude of the difference signal output from the subtractor 151 corresponds to (I signal-Q signal).

The delay circuit 154 delays the difference signal output from the subtractor 151 for a predetermined time, and then transfers the difference signal to the accumulation calculator 157.

At this time, the delay circuit 154 delays the difference signal by a predetermined unit time for which the cumulative arithmetic operator 157 intends to obtain a cumulative average.

The accumulator 157 calculates a cumulative average of the difference between the I signal and the Q signal by using the difference signal output from the subtractor 151 and the difference signal transmitted from the delay circuit 124, and then the I signal and A select signal for selecting any one of the Q signals is output.

That is, the accumulator 157 uses the difference signal output from the subtractor 121 and the difference signal transmitted from the delay circuit 154 for a predetermined unit time (for example, 200 ms), and the I and Q signals. The cumulative average of the difference is obtained, and then it is possible to know which of the I and Q signals has a large signal value for a predetermined unit time.

Thereafter, the accumulator 157 outputs a selection signal such that the signal selector 160 selects a signal having a large signal size from the I and Q signals using the cumulative average.

In this case, the accumulation calculator 157 may output a high signal as a selection signal when the magnitude of the I signal is greater than the magnitude of the Q signal for a predetermined unit time, and the magnitude of the Q signal for the predetermined unit time may be greater than that of the I signal. When the size is larger than the magnitude, a low signal may be output as the selection signal.

4 is a flowchart illustrating an embodiment of a method of operating the RFID reader of the present invention.

Referring to FIG. 2 together, first, after receiving an RF signal transmitted from an RFID tag through an antenna, the RF receiver 100 filters and amplifies the received RF signal into a radio frequency band of the RFID system (step S 100). .

Next, the received RF signal is separated into an I (In-Phase) signal and a Q (Quadrature) signal which are digital signals (step S 110).

That is, when the first mixer 110 collects the RF signal amplified by the RF receiver 100 and transmits a cosine signal having a predetermined phase to the first baseband processor 130, the first baseband The processor 130 filters, amplifies, and AD-converts the cosine signal to output an In-Phase signal, which is a digital signal.

When the second mixer 120 collects the RF signal amplified by the RF receiver 100 and transmits a sine signal having a predetermined phase to the second base band processor 140, the second base band. The processor 140 filters, amplifies, and AD-converts the sine signal to output a Q (Quadrature) signal, which is a digital signal.

Subsequently, after the selection signal generation unit 150 compares the magnitudes of the I and Q signals, the selection signal for selecting one of the I and Q signals is selected by the signal selection unit 160. Output (step S 120).

Subsequently, the signal selector 160 checks whether a selection control signal for selecting one of the input I and Q signals according to the selection signal is generated from the controller 180 (step S 130).

As a result of checking in step S 130, when a selection control signal is generated from the control unit 180, the signal selection unit 160 generates an I signal and a Q signal according to the selection signal output from the selection signal generation unit 150. Any one of the signals is selected and output to the data processor 170 (step S 140).

5 is a block diagram showing another embodiment of the RFID reader of the present invention.

As shown in the drawing, the RFID reader of the present invention includes an RF receiver 200, a first mixer 211, a second mixer 214, a first baseband processor 220, and a second baseband processor 230. The selection signal generator 240, the first preamble detector 250, the second preamble detector 260, the signal selector 270, the data processor 280, and the controller 290 are included.

In the RFID reader of the present invention configured as described above, the RF receiver 200 filters the RF signal received through the antenna to the radio frequency band of the RFID system and amplifies the received RF signal while suppressing a low noise component.

The first mixer 211 collects the RF signal amplified by the RF receiver 200 and transmits a cosine signal having a predetermined phase to the first baseband processor 220.

The second mixer 214 collects the RF signal amplified by the RF receiver 200 and transmits a sine signal having a predetermined phase to the second baseband processor 230.

The first baseband processor 220 filters, amplifies, and AD-converts the cosine signal transmitted from the first mixer 211 to output an In-Phase signal, which is a digital signal. .

The second baseband processor 230 filters, amplifies, and AD-converts the sine signal transmitted from the second mixer 214 to output a Q (Quadrature) signal, which is a digital signal.

The selection signal generator 240 compares the magnitudes of the I signal and the Q signal output from the first base band processor 220 and the second base band processor 230, respectively, by a predetermined time unit, and then the I signal. And a select signal for selecting one of the Q signals.

The first preamble detector 250 compares the preamble value of the pre-stored I signal with the preamble value of the I signal output from the first baseband processor 220, and then compares the preamble value of the pre-stored I signal with the preamble value. When the preamble values of the I signals output from the first baseband processor 220 are the same, the first preamble detection signal is output to the signal selector 270.

The second preamble detector 260 compares the preamble value of the prestored Q signal with the preamble value of the Q signal output from the second baseband processor 230, and then compares the preamble value of the prestored Q signal with the second preamble value. When the preamble values of the Q signals output from the baseband processor 230 are the same, the second preamble detection signal is output to the signal selector 270.

Here, the preamble is data included in the head of the I signal and the Q signal, and is a field for performing synchronization in the RFID reader.

The preamble is displayed in a predetermined fixed pattern, followed by the actual data included in the RFID tag chip after the preamble.

Therefore, it is possible to know whether a signal currently input from the first preamble detector 250 and the second preamble detector 260 is a signal transmitted from an actual RFID tag, and thus, to prevent an error due to noise or the like. do.

The signal selector 270 selects any one of an I signal and a Q signal input according to a selection signal output from the selection signal generator 240 at the time when the preamble detection signal is generated, and selects a data processor ( 280).

That is, when the preamble detection signal is generated from any one of the first preamble detector 250 and the second preamble detector 260, the signal selector 270 receives one of an I signal and a Q signal input according to the selection signal. Selects a signal and outputs the signal to the data processor 280.

The data processor 280 extracts real digital data from an I signal or a Q signal selected by the signal selector 270, performs an error detection process, and outputs the digital data to the controller 290.

As described above, according to the present invention, whether the I signal and the Q signal input through the first preamble detector 250 and the second preamble detector 260 include the same information as the preamble of the pre-stored I signal and the Q signal. By generating the preamble detection signal after confirmation, malfunctions due to noise components can be prevented.

In addition, the select signal generator 240 and the signal selector 270 select a signal having a large magnitude of the I signal and the Q signal, and output the signal to the data processor 280, thereby comparing the I with the conventional RFID reader. The number of receiving circuits required to receive and signal both signals and Q signals can be reduced, thereby reducing the total volume of the RFID reader and reducing power consumption.

6 is a block diagram illustrating a configuration of a first preamble detection unit of the present invention.

As shown therein, the first preamble detector of the present invention includes a memory 251, a shift register 254, and a correlator 257, and the second preamble detector of the present invention is also It consists of the same components.

The memory 251 stores the preamble value of the I signal. Here, it is assumed that the preamble of the I signal has a size of 10 bits.

The shift register 251 sequentially stores a predetermined amount of data among the I signals input from the first baseband processor (not shown) and outputs the data to the correlator 257.

That is, the shift register 251 stores data (that is, 10 bits) having the size corresponding to the preamble of the I signal stored in the memory 251 in the order of input, and outputs the data to the correlator 257.

The correlator 257 compares the data output from the shift register 251 with the preamble value of the I signal stored in the memory 251 and generates a preamble detection signal according to the comparison result.

That is, the correlator 257 compares a predetermined size (10 bits) of data output from the shift register 251 with a preamble (10 bits) value of an I signal stored in the memory 251, and then compares the result of the comparison. In this case, the preamble detection signal is output to the signal selection unit (not shown).

7 is a flowchart illustrating another embodiment of a method of operating an RFID reader of the present invention.

Referring to FIG. 5, first, after receiving an RF signal transmitted from an RFID tag through an antenna, the RF receiver 200 filters and amplifies the received RF signal into a radio frequency band of the RFID system (step S 200). .

Next, the received RF signal is separated into an I (In-Phase) signal and a Q (Quadrature) signal which are digital signals (step S 210).

That is, when the first mixer 211 collects the RF signal amplified by the RF receiver 200 and transmits a cosine signal having a predetermined phase to the first base band processor 220, the first base band. The processor 220 filters, amplifies, and AD-converts the cosine signal to output an In-Phase signal, which is a digital signal.

When the second mixer 214 collects the RF signal amplified by the RF receiver 200 and transmits a sine signal having a predetermined phase to the second base band processor 230, the second base band. The processor 230 filters, amplifies, and AD converts the sine signal to output a Q (Quadrature) signal, which is a digital signal.

Subsequently, the select signal generator 240 compares the magnitudes of the I and Q signals, and then selects a select signal to the signal selector 270 to select one of the I and Q signals. Output (step S220).

Subsequently, when the first preamble detector 250 and the second preamble detector 260 detect the preambles of the I and Q signals, the first and second preamble detection signals are sent to the signal selector 270. Output (step S230).

That is, the first preamble detector 250 compares the preamble value of the pre-stored I signal with the preamble value of the I signal output from the first baseband processor 220, and then compares the preamble value of the pre-stored I signal with the preamble value. When the preamble values of the I signals output from the first baseband processor 220 are the same, the first preamble detection signal is output to the signal selector 270.

The second preamble detector 260 compares the preamble value of the prestored Q signal with the preamble value of the Q signal output from the second baseband processor 230, and then compares the preamble value of the prestored Q signal with the preamble value. When the preamble values of the Q signals output from the second baseband processor 230 are the same, the second preamble detection signal is output to the signal selector 270.

Next, the signal selector 270 checks whether a preamble detection signal is generated from one of the first preamble detector 250 and the second preamble detector 260 (step S 240).

When the preamble detection signal is generated from any one of the first preamble detector 250 and the second preamble detector 260 as a result of the checking of step S 240, the signal selector 270 is the selection signal generator 240. One of the I signal and the Q signal is selected and output to the data processor 280 in accordance with the selection signal outputted from step S250.

Although the present invention has been described in detail with reference to exemplary embodiments above, those skilled in the art to which the present invention pertains can make various modifications to the above-described embodiments without departing from the scope of the present invention. I will understand.

Therefore, the scope of the present invention should not be limited to the described embodiments, but should be defined by the claims below and equivalents thereof.

As described above, according to the present invention, after comparing the magnitudes of the I and Q signals separated by the receiver, a signal having a large signal is selected and output to the data processor, thereby receiving both the existing I and Q signals. Therefore, the number of receiving circuits required for signal processing can be reduced, thereby reducing the total volume of the RFID reader and reducing power consumption.

When the preamble is detected from the input I and Q signals, the present invention allows the signal selector to select one of the I and Q signals according to the selection signal, thereby preventing malfunction due to noise. have.

Claims (16)

A receiving unit which receives an RF signal transmitted from an RFID tag and separates the I (In-Phase) signal and the Q (Quadrature) signal; A selection signal generator for comparing the magnitudes of the I signal and the Q signal input from the receiver, and generating a select signal for a signal having a large signal size among the I and Q signals; And And a signal selector which selects and outputs a signal having a large magnitude from among the I signal and the Q signal according to the selection signal. The method of claim 1, A first preamble detector for detecting a preamble from the I signal input from the receiver and generating a first preamble detection signal to the signal selector; And A second preamble detection unit detecting a preamble from the Q signal input from the receiving unit to generate a second preamble detection signal to the signal selection unit; The signal selector selects a signal in which a preamble detection signal is generated from an I signal and a Q signal input from the receiver according to the selection signal at a time when any one of the first preamble detection signal and the second preamble detection signal is generated. RFID reader, characterized in that the output. The method of claim 1, And a control unit for generating a selection control signal so that the signal selection unit selects any one of an I signal and a Q signal input from the receiving unit according to the selection signal. The method according to any one of claims 1 to 3, The receiving unit, An RF receiver configured to receive an RF signal transmitted from the RFID tag; A first mixer for collecting the RF signal received by the RF receiver into a cosine signal having a predetermined phase; A second mixer for collecting the RF signal received by the RF receiver into a sine signal having a predetermined phase; A first baseband processor configured to digitally process the cosine signal transmitted from the first mixer and output an I (In-Phase) signal; And And a second base band processor configured to digitally process the sine signal transmitted from the second mixer and output a Q (quadrature) signal. The method of claim 4, wherein The RF receiver, A band pass filter for filtering the RF signal received from the RFID tag into a predetermined frequency band; And And a low noise amplifier configured to amplify the magnitude of the signal while suppressing the low noise component of the filtered RF signal. delete The method according to any one of claims 1 to 3, The selection signal generator, A subtractor for outputting a difference signal corresponding to a difference between magnitudes of an I signal and a Q signal input from the receiving unit; A delay circuit for delaying and outputting a difference signal output from the subtractor by a predetermined time; And After calculating the cumulative average of the difference between the magnitude of the I signal and the Q signal by adding the difference signal output from the subtractor and the difference signal delayed by the delay circuit for a predetermined time, and outputting a selection signal to the signal selector. RFID reader comprising a cumulative calculator. delete The method of claim 2, The first preamble detector, A memory for storing a preamble of the I signal; A shift register for sequentially storing data corresponding to the size of the preamble stored in the memory from the I signal input from the receiving unit and outputting the data; And A correlator for comparing the preamble stored in the memory with data output from the shift register and generating a first preamble detection signal if the preamble stored in the memory and the data output from the shift register are the same; RFID reader, characterized in that made. The method of claim 2, The second preamble detector, A memory for storing the preamble of the Q signal; A shift register sequentially storing data corresponding to the size of the preamble stored in the memory in the Q signal input from the receiving unit and outputting the data; And And comparing the preamble stored in the memory with the data output from the shift register, and generating a second preamble detection signal if the preamble stored in the memory and the data output from the shift register are the same. RFID reader. Receiving a RF signal transmitted from an RFID tag and separating the RF signal into an I (In-Phase) signal and a Q (Quadrature) signal; Generating a select signal by selecting a signal having a large signal size from the I signal and the Q signal after comparing the magnitudes of the I and Q signals inputted from the receiver; Checking whether a signal selection unit generates a selection control signal from the control unit to select a signal having a larger magnitude among the I signal and the Q signal according to the selection signal; And And when the selection control signal is generated as a result of the checking, selecting and outputting a signal having a larger magnitude among the I signal and the Q signal according to the selection signal. Receiving a RF signal transmitted from an RFID tag and separating the RF signal into an I (In-Phase) signal and a Q (Quadrature) signal; Generating a select signal according to the comparison result after comparing the magnitudes of the I signal and the Q signal inputted from the receiver by the selection signal generator; The first preamble detector and the second preamble detector determine whether a preamble is detected in the I signal and the Q signal respectively input from the receiver, and when the preamble is detected, the first preamble detection signal and the second preamble detection signal are respectively detected. Generating; Checking, by a signal selector, whether a preamble detection signal is generated from one of the first preamble detector and the second preamble detector; And If the preamble detection signal is generated from one of the first preamble detector and the second preamble detector, the signal selector selects and outputs a signal in which the preamble detection signal is generated among the I and Q signals according to the selection signal. Method of operation of the RFID reader comprising a step. The method according to claim 11 or 12, wherein The generating of the selection signal by the selection signal generator may include: Outputting a difference signal corresponding to a difference between magnitudes of an I signal and a Q signal inputted from the receiver; Outputting a difference signal output from the subtractor by a delay circuit after a predetermined time delay; And A cumulative calculator adding a difference signal output from the subtractor and a difference signal delayed by the delay circuit for a predetermined time to obtain a cumulative average of the difference between the magnitudes of the I signal and the Q signal, and then generating a selection signal. Method of operation of the RFID reader, characterized in that comprises a. The method of claim 13, And the accumulator is configured to generate a selection signal such that the signal selector selects a signal having a large signal size from among the I signal and the Q signal. The method of claim 12, The generating of the first preamble detection signal may include: A shift register sequentially storing data corresponding to the size of a preamble of an I signal pre-stored in a memory from an I signal input from the receiver; And After a correlator compares the preamble of the pre-stored I signal in the memory with the data output from the shift register, and outputs the first preamble detection signal when the preamble stored in the memory and the data output from the shift register are the same. Operating method of the RFID reader characterized in that it comprises a step of generating. The method of claim 12, The generating of the second preamble detection signal may include: A shift register sequentially storing data corresponding to the size of a preamble of a Q signal pre-stored in a memory from a Q signal input from the receiving unit, and then outputting the data; And After the correlator compares the preamble of the Q signal pre-stored in the memory with the data output from the shift register, the second preamble detection signal when the preamble stored in the memory and the data output from the shift register are the same. Operating method of an RFID reader, characterized in that it comprises a step of generating.

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